coreboot-gerrit September 2021

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Change in coreboot[master]: arch/x86: smbios write 7 table using deterministic cache functions
by Kyösti Mälkki (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Subrata Banik. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56121 ) Change subject: arch/x86: smbios write 7 table using deterministic cache functions ...................................................................... Patch Set 10: (1 comment) File src/arch/x86/smbios.c: https://review.coreboot.org/c/coreboot/+/56121/comment/de611603_b37bdf7f PS10, Line 813: continue; Is it an infinite loop here when fill_cpu_cache_info() return false (will happen if cpu_get_cache_info_leaf() returns 0). -- To view, visit https://review.coreboot.org/c/coreboot/+/56121 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iedbd3b745629dea57c3ad6b0d187eab2bcc3f7d3 Gerrit-Change-Number: 56121 Gerrit-PatchSet: 10 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-CC: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Wed, 01 Sep 2021 06:42:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: smbios write 7 table using deterministic cache functions
by Paul Menzel (Code Review) 01 Sep '21

01 Sep '21

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56121 ) Change subject: arch/x86: smbios write 7 table using deterministic cache functions ...................................................................... Patch Set 10: (1 comment) Patchset: PS10: > Do we have some more details about the brokenness, that would help to understand what might have wen […] swiftgeek reports, the boot hangs after ``` ACPI: added table 7/32, length now 64 CBFS: Found 'pci1002,9802.rom' @0x4d6c0 size 0xe200 in mcache @0x67fdd1bc In CBFS, ROM address for PCI: 00:01.0 = 0xffc4d8ec Copying VBIOS image from 0xffc4d8ec ACPI: * VFCT at 67e5a430 ACPI: added table 8/32, length now 68 ACPI: * HPET ACPI: added table 9/32, length now 72 ACPI: done. ACPI tables: 75488 bytes. smbios_write_tables: 67e55000 SMBIOS firmware version is set to coreboot_version: '4.14-1439-g81d5a25fbb-dirty' ``` with `-dirty` coming from 3rdparty submodule pointer differences: ``` diff --git a/3rdparty/arm-trusted-firmware b/3rdparty/arm-trusted-firmware index 586aafa3a4..7ad39818b1 160000 --- a/3rdparty/arm-trusted-firmware +++ b/3rdparty/arm-trusted-firmware @@ -1 +1 @@ -Subproject commit 586aafa3a4b13971339f78e430075592c3fe74b5 +Subproject commit 7ad39818b184850d263008e7d36ba16adf72a669 diff --git a/3rdparty/blobs b/3rdparty/blobs index f388b6794e..fc2d4e2587 160000 --- a/3rdparty/blobs +++ b/3rdparty/blobs @@ -1 +1 @@ -Subproject commit f388b6794e6f1f93b847de353f5eab8ba3e3b328 +Subproject commit fc2d4e2587e1260f4fe4114e797541229bcc6b9e diff --git a/3rdparty/chromeec b/3rdparty/chromeec index 4c21b57eb9..1e800ac838 160000 --- a/3rdparty/chromeec +++ b/3rdparty/chromeec @@ -1 +1 @@ -Subproject commit 4c21b57eb9619cc3dc86d11226917d25f62f1bc8 +Subproject commit 1e800ac838504c0d2950c7aa90cdfe7bde251545 diff --git a/3rdparty/intel-microcode b/3rdparty/intel-microcode index 3f97690f0d..49bb67f32a 160000 --- a/3rdparty/intel-microcode +++ b/3rdparty/intel-microcode @@ -1 +1 @@ -Subproject commit 3f97690f0da8011f52209b232450a1e5c4f2e1f6 +Subproject commit 49bb67f32a2e3e631ba1a9a73da1c52e1cac7fd9 diff --git a/3rdparty/intel-sec-tools b/3rdparty/intel-sec-tools index 0031ac7344..a86ff5d400 160000 --- a/3rdparty/intel-sec-tools +++ b/3rdparty/intel-sec-tools @@ -1 +1 @@ -Subproject commit 0031ac73447baeb197fb2d80e5fba2470716e76d +Subproject commit a86ff5d400983d685d4389c07433452c7a503300 diff --git a/3rdparty/libgfxinit b/3rdparty/libgfxinit index 1b04c517b3..bc0588e482 160000 --- a/3rdparty/libgfxinit +++ b/3rdparty/libgfxinit @@ -1 +1 @@ -Subproject commit 1b04c517b377468b3b470d38607fb539187391dd +Subproject commit bc0588e482b1320d5739900b00a45033f5b587f4 diff --git a/3rdparty/libhwbase b/3rdparty/libhwbase index fc2102f560..a3edc6ef32 160000 --- a/3rdparty/libhwbase +++ b/3rdparty/libhwbase @@ -1 +1 @@ -Subproject commit fc2102f560f25e0f2e5be91ec36646dcb69e6e1b +Subproject commit a3edc6ef32d09c566b7ea3555bc753458ec63039 diff --git a/3rdparty/vboot b/3rdparty/vboot index ccc56f46c5..48195e5878 160000 --- a/3rdparty/vboot +++ b/3rdparty/vboot @@ -1 +1 @@ -Subproject commit ccc56f46c51fa9d0c2b3c086ace97c14fe887c32 +Subproject commit 48195e5878006ac2cf74cb7f02953ab06c68202d diff --git a/util/nvidia/cbootimage b/util/nvidia/cbootimage --- a/util/nvidia/cbootimage +++ b/util/nvidia/cbootimage @@ -1 +1 @@ -Subproject commit 65a6d94dd5f442578551e0a81ecbe5235e673fd4 +Subproject commit 65a6d94dd5f442578551e0a81ecbe5235e673fd4-dirty ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/56121 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iedbd3b745629dea57c3ad6b0d187eab2bcc3f7d3 Gerrit-Change-Number: 56121 Gerrit-PatchSet: 10 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-CC: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Comment-Date: Wed, 01 Sep 2021 06:41:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/gooey: Configure I2C times for I2C devices
by Henry Sun (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Stanley Wu, Paul Fagerburg, Karthik Ramasubramanian. Henry Sun has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57297 ) Change subject: mb/google/dedede/var/gooey: Configure I2C times for I2C devices ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: Differ to Karthik to Review and approve. LGTM. Thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/57297 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic5d5660181f36f161ae04cbf5003f6d7ad4bc16f Gerrit-Change-Number: 57297 Gerrit-PatchSet: 1 Gerrit-Owner: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Attention: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Attention: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 01 Sep 2021 06:33:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: smbios write 7 table using deterministic cache functions
by Subrata Banik (Code Review) 01 Sep '21

01 Sep '21

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56121 ) Change subject: arch/x86: smbios write 7 table using deterministic cache functions ...................................................................... Patch Set 10: (1 comment) Patchset: PS10: > In #coreboot(a)irc.libera. […] Do we have some more details about the brokenness, that would help to understand what might have went wrong with this CL ? -- To view, visit https://review.coreboot.org/c/coreboot/+/56121 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iedbd3b745629dea57c3ad6b0d187eab2bcc3f7d3 Gerrit-Change-Number: 56121 Gerrit-PatchSet: 10 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-CC: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Comment-Date: Wed, 01 Sep 2021 06:23:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/cse: Add argument to send message to appropriate fix...
by Furquan Shaikh (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Tim Wawrzynczak, Rizwan Qureshi, Aseda Aboagye, Patrick Rudolph, Karthik Ramasubramanian. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57295 ) Change subject: soc/intel/common/cse: Add argument to send message to appropriate fixed client ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/common/block/include/intelblocks/cse.h: https://review.coreboot.org/c/coreboot/+/57295/comment/49365162_60350f8b PS2, Line 156: client This is not really client. It is client_addr, right? Also, I think it would be good to have consistency in the parameter name for `heci_send()` and `heci_send_receive()`. Probably use `cse_addr` here as well? -- To view, visit https://review.coreboot.org/c/coreboot/+/57295 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icde6d0155b62472b6a7caadc5fc8ea2e2ba6eb0c Gerrit-Change-Number: 57295 Gerrit-PatchSet: 2 Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 01 Sep 2021 06:16:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: smbios write 7 table using deterministic cache functions
by Paul Menzel (Code Review) 01 Sep '21

01 Sep '21

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Change in coreboot[master]: mb/google/zork: correct MST probes
by Furquan Shaikh (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Sam McNally, Peter Marheine, Felix Held. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57298 ) Change subject: mb/google/zork: correct MST probes ...................................................................... Patch Set 2: Code-Review+2 (1 comment) Patchset: PS2: > There might be a case for the behavior this is working around being a bug, but since `device ref` be […] The way the override feature works in device tree is by walking the tree in base tree and override tree and comparing the exact paths to ensure that the correct device from the base tree is overriden. Thus, even if reference is used, you still need to have the correct path. This can possibly be optimized, but not something that sconfig supports right now. -- To view, visit https://review.coreboot.org/c/coreboot/+/57298 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2a8feb544f3fc198fe6313b226ad8995aad31c3e Gerrit-Change-Number: 57298 Gerrit-PatchSet: 2 Gerrit-Owner: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel Kurtz <djkurtz(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sam McNally <sammc(a)google.com> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 01 Sep 2021 06:09:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Peter Marheine <pmarheine(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: util/cbftool: Fix the bug in parsing Uefipayload with extended header
by duntan (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Ray Ni. duntan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57296 ) Change subject: util/cbftool: Fix the bug in parsing Uefipayload with extended header ...................................................................... Patch Set 2: (1 comment) Patchset: PS1: > Can you please update the commit message to explain what issue was met that needs this fix? Hi Ray, I have update the commit message to explain the issue. -- To view, visit https://review.coreboot.org/c/coreboot/+/57296 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id063efb1c8e6c7a96ec2182e87b71c7e8b7b6423 Gerrit-Change-Number: 57296 Gerrit-PatchSet: 2 Gerrit-Owner: duntan <dun.tan(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ray Ni <ray.ni(a)intel.com> Gerrit-Attention: Ray Ni <ray.ni(a)intel.com> Gerrit-Comment-Date: Wed, 01 Sep 2021 05:40:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Ray Ni <ray.ni(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: util/cbftool: Fix the bug in parsing Uefipayload with extended header
by duntan (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: duntan. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57296 to look at the new patch set (#2). Change subject: util/cbftool: Fix the bug in parsing Uefipayload with extended header ...................................................................... util/cbftool: Fix the bug in parsing Uefipayload with extended header The patch is to fix "Not a usable UEFI firmware volume" issue when creating the CBFS/flash image. This issue is caused by adding FvNameGuid in UefiPayloadEntry.inf of UefiPayload. There is an ext header between header of Fv and header of UefiPayloadEntry in Fv with a FvNameGuid. The ext header causes the address of UefiPayloadEntry to be found incorrectly when parsing Fv. Signed-off-by: Dun Tan <dun.tan(a)intel.com> Change-Id: Id063efb1c8e6c7a96ec2182e87b71c7e8b7b6423 --- M util/cbfstool/cbfs-mkpayload.c M util/cbfstool/fv.h 2 files changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/57296/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57296 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id063efb1c8e6c7a96ec2182e87b71c7e8b7b6423 Gerrit-Change-Number: 57296 Gerrit-PatchSet: 2 Gerrit-Owner: duntan <dun.tan(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ray Ni <ray.ni(a)intel.com> Gerrit-Attention: duntan <dun.tan(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: coreboot tables: Add type-c port info to coreboot table
by Nick Vaccaro (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Nico Huber, Furquan Shaikh, Tim Wawrzynczak, Paul Menzel, Zhuohao Lee, Patrick Rudolph. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57069 ) Change subject: coreboot tables: Add type-c port info to coreboot table ...................................................................... Patch Set 9: (1 comment) File src/mainboard/google/volteer/mainboard.c: https://review.coreboot.org/c/coreboot/+/57069/comment/b9a30788_91505cde PS8, Line 99: struct drivers_intel_pmc_mux_conn_config *config = child->chip_info; : if (config) { : info[count].usb2_port_number = config->usb2_port_number; : info[count].usb3_port_number = config->usb3_port_number; : info[count].sbu_orientation = config->sbu_orientation; : info[count].data_orientation = config->hsl_orientation; : count++; : } > WDYT about adding a function like here https://review.coreboot. […] Is the new conn_get_type_c_list() sufficient for that purpose? If not, are there additional checks that should be added to conn_get_type_c_list() so that it serves the verify purpose? -- To view, visit https://review.coreboot.org/c/coreboot/+/57069 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ice732be2fa634dbf31ec620552b383c4a5b41451 Gerrit-Change-Number: 57069 Gerrit-PatchSet: 9 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 01 Sep 2021 05:18:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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coreboot-gerrit September 2021