coreboot-gerrit September 2021

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Change in coreboot[master]: mb/google/zork: correct MST probes
by Peter Marheine (Code Review) 01 Sep '21

01 Sep '21

Peter Marheine has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57298 ) Change subject: mb/google/zork: correct MST probes ...................................................................... mb/google/zork: correct MST probes It turns out that putting a device ref in an overridetree at a different point in the tree will generate a duplicate device definition, such that the change introducing this support was ignoring the device presence specified by overridetree.cb and only using the baseboard configuration. I believe testing of that change was not redone after the baseboard was changed to disable the MST, so that conflicting behavior was not noticed. The incorrect behavior generated a disabled device for the MST at the location specified by the baseboard, and one with the probe as a child of the soc. At runtime this did a fw_config probe of the "I2C 00:4a" device, and later probed a different "I2C 00:4a" which was already disabled. As the disabled one came later, it seems to have completely disabled the MST, discarding the results of the variant-specific probe. BUG=b:185862297 TEST=10EC2141 device is now present on a Dali berknip BRANCH=zork Change-Id: I2a8feb544f3fc198fe6313b226ad8995aad31c3e --- M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb M src/mainboard/google/zork/variants/berknip/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/mainboard/google/zork/variants/trembyle/overridetree.cb M src/mainboard/google/zork/variants/woomax/overridetree.cb 5 files changed, 66 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/57298/1 diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb index 824a007..f8e5d9a 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb @@ -372,7 +372,7 @@ end device ref lpc_bridge on chip ec/google/chromeec - device pnp 0c09.0 on + device pnp 0c09.0 alias cros_ec on chip ec/google/chromeec/i2c_tunnel register "uid" = "0" register "remote_bus" = "8" @@ -398,7 +398,7 @@ register "name" = ""MSTH"" register "uid" = "1" register "remote_bus" = "9" - device generic 1.0 on + device generic 1.0 alias cros_ec_i2c_9 on chip drivers/i2c/generic register "hid" = ""10EC2141"" register "name" = ""MSTH"" diff --git a/src/mainboard/google/zork/variants/berknip/overridetree.cb b/src/mainboard/google/zork/variants/berknip/overridetree.cb index 793be78..434d4b3 100644 --- a/src/mainboard/google/zork/variants/berknip/overridetree.cb +++ b/src/mainboard/google/zork/variants/berknip/overridetree.cb @@ -104,6 +104,22 @@ # See AMD 55570-B1 Table 13: PCI Device ID Assignments. device domain 0 on subsystemid 0x1022 0x1510 inherit + + device ref lpc_bridge on + chip ec/google/chromeec + device ref cros_ec on + chip ec/google/chromeec/i2c_tunnel + device ref cros_ec_i2c_9 on + chip drivers/i2c/generic + device ref db_mst on + probe USB_DAUGHTERBOARD BERKNIP_DB_DALI + end + end + end + end + end + end + end end # domain device ref i2c_2 on @@ -179,8 +195,4 @@ end end - device ref db_mst on - probe USB_DAUGHTERBOARD BERKNIP_DB_DALI - end - end # chip soc/amd/picasso diff --git a/src/mainboard/google/zork/variants/morphius/overridetree.cb b/src/mainboard/google/zork/variants/morphius/overridetree.cb index bb5e0e7..c5507e9 100644 --- a/src/mainboard/google/zork/variants/morphius/overridetree.cb +++ b/src/mainboard/google/zork/variants/morphius/overridetree.cb @@ -80,6 +80,22 @@ # See AMD 55570-B1 Table 13: PCI Device ID Assignments. device domain 0 on subsystemid 0x1022 0x1510 inherit + + device ref lpc_bridge on + chip ec/google/chromeec + device ref cros_ec on + chip ec/google/chromeec/i2c_tunnel + device ref cros_ec_i2c_9 on + chip drivers/i2c/generic + device ref db_mst on + probe USB_DAUGHTERBOARD MORPHIUS_DB_DALI + end + end + end + end + end + end + end end # domain device ref i2c_2 on @@ -144,8 +160,4 @@ end end - device ref db_mst on - probe USB_DAUGHTERBOARD MORPHIUS_DB_DALI - end - end # chip soc/amd/picasso diff --git a/src/mainboard/google/zork/variants/trembyle/overridetree.cb b/src/mainboard/google/zork/variants/trembyle/overridetree.cb index 394b3bc..c4ddc57 100644 --- a/src/mainboard/google/zork/variants/trembyle/overridetree.cb +++ b/src/mainboard/google/zork/variants/trembyle/overridetree.cb @@ -53,6 +53,22 @@ # See AMD 55570-B1 Table 13: PCI Device ID Assignments. device domain 0 on subsystemid 0x1022 0x1510 inherit + + device ref lpc_bridge on + chip ec/google/chromeec + device ref cros_ec on + chip ec/google/chromeec/i2c_tunnel + device ref cros_ec_i2c_9 on + chip drivers/i2c/generic + device ref db_mst on + probe USB_DAUGHTERBOARD TREMBYLE_DB_DALI_HDMI + end + end + end + end + end + end + end end # domain device ref i2c_2 on @@ -113,8 +129,4 @@ end end - device ref db_mst on - probe USB_DAUGHTERBOARD TREMBYLE_DB_DALI_HDMI - end - end # chip soc/amd/picasso diff --git a/src/mainboard/google/zork/variants/woomax/overridetree.cb b/src/mainboard/google/zork/variants/woomax/overridetree.cb index 82a060f..dd2bddd 100644 --- a/src/mainboard/google/zork/variants/woomax/overridetree.cb +++ b/src/mainboard/google/zork/variants/woomax/overridetree.cb @@ -87,6 +87,22 @@ chip drivers/usb/acpi device usb 3.2 off end end + + device ref lpc_bridge on + chip ec/google/chromeec + device ref cros_ec on + chip ec/google/chromeec/i2c_tunnel + device ref cros_ec_i2c_9 on + chip drivers/i2c/generic + device ref db_mst on + probe USB_DAUGHTERBOARD WOOMAX_DB_DALI + end + end + end + end + end + end + end end # domain device ref i2c_2 on @@ -117,8 +133,4 @@ end end - device ref db_mst on - probe USB_DAUGHTERBOARD WOOMAX_DB_DALI - end - end # chip soc/amd/picasso -- To view, visit https://review.coreboot.org/c/coreboot/+/57298 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2a8feb544f3fc198fe6313b226ad8995aad31c3e Gerrit-Change-Number: 57298 Gerrit-PatchSet: 1 Gerrit-Owner: Peter Marheine <pmarheine(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: amdfwtool: Add support for traditional recovery
by build bot (Jenkins) (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Zheng Bao. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57131 ) Change subject: amdfwtool: Add support for traditional recovery ...................................................................... Patch Set 4: (4 comments) File util/amdfwtool/amdfwtool.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-127175): https://review.coreboot.org/c/coreboot/+/57131/comment/c7c7a469_1cfda03d PS4, Line 519: index ++; space prohibited before that '++' (ctx:WxO) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-127175): https://review.coreboot.org/c/coreboot/+/57131/comment/45a03d46_aa701c95 PS4, Line 806: for (index = 0; index < count; index ++) { space prohibited before that '++' (ctx:WxB) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-127175): https://review.coreboot.org/c/coreboot/+/57131/comment/ca7f5d3b_a2457191 PS4, Line 817: count ++; space prohibited before that '++' (ctx:WxO) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-127175): https://review.coreboot.org/c/coreboot/+/57131/comment/80ffb562_9e404442 PS4, Line 1799: BUFF_OFFSET(ctx, RUN_TO_OFFSET(ctx, pspdir2->entries[etr].addr)), line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/57131 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2671b95fe089aafdaf61b55bc9d2e8dcf6a66dbc Gerrit-Change-Number: 57131 Gerrit-PatchSet: 4 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Wed, 01 Sep 2021 03:20:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Add support for A/B recovery
by build bot (Jenkins) (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56773 ) Change subject: amdfwtool: Add support for A/B recovery ...................................................................... Patch Set 9: (2 comments) File util/amdfwtool/amdfwtool.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-127172): https://review.coreboot.org/c/coreboot/+/56773/comment/0714e058_d33efe9c PS9, Line 1698: pspdir2_b = new_psp_dir(&ctx, cb_config.multi_level); /* same as above */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-127172): https://review.coreboot.org/c/coreboot/+/56773/comment/41e1051f_fd3ba009 PS9, Line 1749: //biosdir = new_bios_dir(&ctx, cb_config.multi_level); /* TODO: move here? */ line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/56773 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27f5d3476f648fcecafb8d258ccb6cfad4f50036 Gerrit-Change-Number: 56773 Gerrit-PatchSet: 9 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 01 Sep 2021 03:19:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/gooey: Configure I2C times for I2C devices
by Stanley Wu (Code Review) 01 Sep '21

01 Sep '21

Stanley Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57297 ) Change subject: mb/google/dedede/var/gooey: Configure I2C times for I2C devices ...................................................................... mb/google/dedede/var/gooey: Configure I2C times for I2C devices Configure I2C high / low time in device tree to ensure I2C CLK runs under I2C_SPEED_FAST (400 kHz). Measured I2C frequency just as below after tuning: Touchpad: 386.7kHz Touchscreen: 387.4kHz Audio: 385.7kHz P-sensor: 378.1kHz BaUG=b:197247706 BRANCH=dedede TEST=Build and check I2C clock is under 400kHz Signed-off-by: stanley.wu <stanley1.wu(a)lcfc.corp-partner.google.com> Change-Id: Ic5d5660181f36f161ae04cbf5003f6d7ad4bc16f --- M src/mainboard/google/dedede/variants/gooey/overridetree.cb 1 file changed, 8 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/57297/1 diff --git a/src/mainboard/google/dedede/variants/gooey/overridetree.cb b/src/mainboard/google/dedede/variants/gooey/overridetree.cb index 9b291fb..ab0e410 100644 --- a/src/mainboard/google/dedede/variants/gooey/overridetree.cb +++ b/src/mainboard/google/dedede/variants/gooey/overridetree.cb @@ -13,18 +13,26 @@ register "common_soc_config" = "{ .i2c[0] = { .speed = I2C_SPEED_FAST, + .rise_time_ns = 212, + .fall_time_ns = 38, }, .i2c[1] = { .speed = I2C_SPEED_FAST, }, .i2c[2] = { .speed = I2C_SPEED_FAST, + .rise_time_ns = 212, + .fall_time_ns = 38, }, .i2c[4] = { .speed = I2C_SPEED_FAST, + .rise_time_ns = 212, + .fall_time_ns = 38, }, .i2c[5] = { .speed = I2C_SPEED_FAST, + .rise_time_ns = 212, + .fall_time_ns = 38, }, }" -- To view, visit https://review.coreboot.org/c/coreboot/+/57297 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic5d5660181f36f161ae04cbf5003f6d7ad4bc16f Gerrit-Change-Number: 57297 Gerrit-PatchSet: 1 Gerrit-Owner: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: amdfwtool: Add support for traditional recovery
by Bao Zheng (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Zheng Bao. Hello build bot (Jenkins), Zheng Bao, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/57131 to look at the new patch set (#4). Change subject: amdfwtool: Add support for traditional recovery ...................................................................... amdfwtool: Add support for traditional recovery Change-Id: I2671b95fe089aafdaf61b55bc9d2e8dcf6a66dbc Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h M util/amdfwtool/data_parse.c 3 files changed, 54 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/57131/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/57131 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2671b95fe089aafdaf61b55bc9d2e8dcf6a66dbc Gerrit-Change-Number: 57131 Gerrit-PatchSet: 4 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Zheng Bao Gerrit-MessageType: newpatchset

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Change in coreboot[master]: amdfwtool: Add support for A/B recovery
by Bao Zheng (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56773 to look at the new patch set (#9). Change subject: amdfwtool: Add support for A/B recovery ...................................................................... amdfwtool: Add support for A/B recovery The rom layout for A/B recovery: EFS -> PSP L1 0x48 -> PSP L2 A -> BIOS L2 A 0x4A -> PSP L2 B -> BIOS L2 B To enable A/B recovery in PSP layout, add "--recovery-ab" to amdfwtool. Change-Id: I27f5d3476f648fcecafb8d258ccb6cfad4f50036 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h M util/amdfwtool/data_parse.c 3 files changed, 216 insertions(+), 55 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/56773/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/56773 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27f5d3476f648fcecafb8d258ccb6cfad4f50036 Gerrit-Change-Number: 56773 Gerrit-PatchSet: 9 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/cbftool: Fix the bug in parsing Uefipayload with extended header
by Ray Ni (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: duntan. Ray Ni has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57296 ) Change subject: util/cbftool: Fix the bug in parsing Uefipayload with extended header ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Can you please update the commit message to explain what issue was met that needs this fix? -- To view, visit https://review.coreboot.org/c/coreboot/+/57296 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id063efb1c8e6c7a96ec2182e87b71c7e8b7b6423 Gerrit-Change-Number: 57296 Gerrit-PatchSet: 1 Gerrit-Owner: duntan <dun.tan(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ray Ni <ray.ni(a)intel.com> Gerrit-Attention: duntan <dun.tan(a)intel.com> Gerrit-Comment-Date: Wed, 01 Sep 2021 03:07:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Detect the flag multilevel to decide the actual value
by build bot (Jenkins) (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Bao Zheng, Zheng Bao. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57063 ) Change subject: amdfwtool: Detect the flag multilevel to decide the actual value ...................................................................... Patch Set 4: (2 comments) File util/amdfwtool/amdfwtool.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-127168): https://review.coreboot.org/c/coreboot/+/57063/comment/cf7cabda_3d61a230 PS4, Line 589: amd_cb_config *cb_config) need consistent spacing around '*' (ctx:WxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-127168): https://review.coreboot.org/c/coreboot/+/57063/comment/d032842a_9d335f0f PS4, Line 770: amd_cb_config *cb_config) need consistent spacing around '*' (ctx:WxV) -- To view, visit https://review.coreboot.org/c/coreboot/+/57063 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe8cdd5c14225899352b02bb19aae6059d56d428 Gerrit-Change-Number: 57063 Gerrit-PatchSet: 4 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Wed, 01 Sep 2021 03:06:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: tpch: Introduce new thermal control mechanism for pch device
by Sumeet R Pawnikar (Code Review) 01 Sep '21

01 Sep '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Patrick Rudolph, Karthik Ramasubramanian. Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57096 ) Change subject: tpch: Introduce new thermal control mechanism for pch device ...................................................................... Patch Set 2: (4 comments) Patchset: PS1: > Why did you break this out into a separate chip driver? […] ACK File src/drivers/intel/tpch/tpch.h: https://review.coreboot.org/c/coreboot/+/57096/comment/15059077_c2d2c1d5 PS1, Line 15: /* IPC command to control FIVR Configuration */ : #define V_PMC_PWRM_IPC_CMD_COMMAND_FIVR 0xA3 : /* IPC subcommand to write FIVR Register */ : #define V_PMC_PWRM_IPC_CMD_CMD_ID_FIVR_WRITE 0x01 : /* IPC subcommand to control RFI Control 0 register logic write */ : #define V_PMC_PWRM_IPC_SUBCMD_RFI_CTRL0_LOGIC 0x00 : /* IPC subcommand to control RFI Control 4 register logic write */ : #define V_PMC_PWRM_IPC_SUBCMD_RFI_CTRL4_LOGIC 0x01 > These should probably go in […] Done File src/drivers/intel/tpch/tpch.c: https://review.coreboot.org/c/coreboot/+/57096/comment/cdd241e3_ffe03abb PS1, Line 26: acpigen_emit_namestring("IPCS"); : acpigen_write_integer(V_PMC_PWRM_IPC_CMD_COMMAND_FIVR); : acpigen_write_integer(V_PMC_PWRM_IPC_CMD_CMD_ID_FIVR_WRITE); : acpigen_write_integer(0x8); : acpigen_write_integer(V_PMC_PWRM_IPC_SUBCMD_RFI_CTRL0_LOGIC); : acpigen_write_dword(3); : acpigen_emit_byte(RETURN_OP); : acpigen_write_package(0); : acpigen_write_method_end(); : acpigen_pop_len(); : : acpigen_write_method_serialized("RFC1", 1); : acpigen_emit_namestring("IPCS"); : acpigen_write_integer(V_PMC_PWRM_IPC_CMD_COMMAND_FIVR); : acpigen_write_integer(V_PMC_PWRM_IPC_CMD_CMD_ID_FIVR_WRITE); : acpigen_write_integer(0x8); : acpigen_write_integer(V_PMC_PWRM_IPC_SUBCMD_RFI_CTRL4_LOGIC); > Got it, thanks! Should the GFC0 and GFC1 methods be implemented too? Welcome. Yes, I'm working phase wise manner, will submit separate new CL for GFC0 and GFC1 methods on top of this. https://review.coreboot.org/c/coreboot/+/57096/comment/57ce1790_64a8c763 PS1, Line 51: devices > nit: space after `devices` Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/57096 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I035d2844b9ba6a9532ae006fc1c43e34cb94328a Gerrit-Change-Number: 57096 Gerrit-PatchSet: 2 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 01 Sep 2021 02:40:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: util/cbftool: Fix the bug in parsing Uefipayload with extended header
by duntan (Code Review) 01 Sep '21

01 Sep '21

duntan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57296 ) Change subject: util/cbftool: Fix the bug in parsing Uefipayload with extended header ...................................................................... util/cbftool: Fix the bug in parsing Uefipayload with extended header There is an extended header in Fv file with FvNameGuid. The existence of ext header can be confirmed by the value of ext_header_offs. Signed-off-by: Dun Tan <dun.tan(a)intel.com> Change-Id: Id063efb1c8e6c7a96ec2182e87b71c7e8b7b6423 --- M util/cbfstool/cbfs-mkpayload.c M util/cbfstool/fv.h 2 files changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/57296/1 diff --git a/util/cbfstool/cbfs-mkpayload.c b/util/cbfstool/cbfs-mkpayload.c index ae875f3..5341337 100644 --- a/util/cbfstool/cbfs-mkpayload.c +++ b/util/cbfstool/cbfs-mkpayload.c @@ -283,6 +283,7 @@ struct cbfs_payload_segment segs[2] = { {0} }; int doffset, len = 0; firmware_volume_header_t *fv; + firmware_volume_ext_header_t *fvh_ext; ffs_file_header_t *fh; common_section_header_t *cs; dos_header_t *dh; @@ -305,6 +306,12 @@ } fh = (ffs_file_header_t *)(input->data + fv->header_length); + if (fv->ext_header_offs != 0) { + fvh_ext = (firmware_volume_ext_header_t *)((uintptr_t)fv + fv->ext_header_offs); + fh = (ffs_file_header_t *)((uintptr_t)fvh_ext + fvh_ext->ext_header_size); + fh = (ffs_file_header_t *)(((uintptr_t)fh + 7) & ~7); + } + while (fh->file_type == FILETYPE_PAD) { unsigned long offset = (fh->size[2] << 16) | (fh->size[1] << 8) | fh->size[0]; DEBUG("skipping %lu bytes of FV padding\n", offset); diff --git a/util/cbfstool/fv.h b/util/cbfstool/fv.h index 21bd89f..0ad650f 100644 --- a/util/cbfstool/fv.h +++ b/util/cbfstool/fv.h @@ -32,3 +32,8 @@ uint8_t size[3]; uint8_t section_type; } common_section_header_t; + +typedef struct { + uint8_t guid[16]; + uint32_t ext_header_size; +} firmware_volume_ext_header_t; -- To view, visit https://review.coreboot.org/c/coreboot/+/57296 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id063efb1c8e6c7a96ec2182e87b71c7e8b7b6423 Gerrit-Change-Number: 57296 Gerrit-PatchSet: 1 Gerrit-Owner: duntan <dun.tan(a)intel.com> Gerrit-MessageType: newchange

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coreboot-gerrit September 2021