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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57305 )
Change subject: arch/x86: Skip returning default leaf value as `0`
......................................................................
Patch Set 3:
(1 comment)
File src/arch/x86/cpu_common.c:
https://review.coreboot.org/c/coreboot/+/57305/comment/e1b8231b_38fd38f9
PS2, Line 115: return DETERMINISTIC_CACHE_PARAMETERS_CPUID_IA;
> Thanks Angel, […]
@Angel, looks like Tim also +2'ed this. Do you have any concern if I let this CL merge with ternary operator in place ? Please suggest.
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57343 )
Change subject: drivers/intel/fsp2_0: Allow `mp_startup_all_cpus()` to run serially
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/57343/comment/fd919908_5412b3ba
PS1, Line 17: But another MP service API `StartupAllCPUs` doesn't specifies any such
: requirement. Running the `func` simultaneously on APs results into
: coherency issue due to lack of acquire spin lock while accessing common
: data structure in multiprocessor environment.
> It's hard to figure out if this is called out explicitly anywhere... is this defined somewhere, or is this FSP behavior?
Please take a look into EDK2 code https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/Library/MpInitLib/… to understand the UEFI MP module default assumption.
>
> Is this causing any known issues?
yes, we are seeing a random hang while running the cycle test inside FSP while running CPU feature programming using coreboot MP services wrappers. Ronak will raise the crossbug with more details and update the bug id here. Thanks
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Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Paul Menzel, Tim Wawrzynczak, Subrata Banik, Angel Pons, Patrick Rudolph, Felix Held.
Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Furquan Shaikh, Marshall Dawson, Paul Menzel, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56628
to look at the new patch set (#10).
Change subject: arch/x86: Refactor the SMBIOS type 17 write function
......................................................................
arch/x86: Refactor the SMBIOS type 17 write function
List of changes:
1. Create Module Type macros as per Memory Type
(i.e. DDR2/DDR3/DDR4/DDR5/LPDDR4/LPDDR5) and fix compilation
issue due to renaming of existing macros due to scoping the Memory
Type.
2. Skip fixed module type to form factor conversion using DDR2 SPD4
specification (inside dimm_info_fill()).
3. Use dedicated Memory Type and Module type for `Form Factor`
conversion using `get_spd_info()` function.
4. Use dedicated Memory Type and Module type for `TypeDetail`
conversion using `get_spd_info()` function.
5. Create a new API (convert_form_factor_to_module_type()) for
`Form Factor` to 'Module type' conversion as per `Memory Type`.
6. Add DDR5 and LPDDR5 memory technology into the SMBIOS Memory Type
table.
7. Add new argument as `Memory Type`
smbios_form_factor_to_spd_mod_type().
8. smbios_form_factor_to_spd_mod_type() internally calls
convert_form_factor_to_module_type() for `Module Type` conversion.
Refer to datasheet SPD4.1.2.M-1 for LPDDRx and SPD4.1.2.L-3 for DDRx.
BUG=b:194659789
TEST=Refer to dmidecode -t 17 output as below:
Without this code change:
Handle 0x0012, DMI type 17, 40 bytes
Memory Device
Array Handle: 0x000A
Error Information Handle: Not Provided
Total Width: 16 bits
Data Width: 16 bits
Size: 2048 MB
Form Factor: Unknown
....
With this code change:
Handle 0x0012, DMI type 17, 40 bytes
Memory Device
Array Handle: 0x000A
Error Information Handle: Not Provided
Total Width: 16 bits
Data Width: 16 bits
Size: 2048 MB
Form Factor: Row Of Chips
....
Change-Id: Ia337ac8f50b61ae78d86a07c7a86aa9c248bad50
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/arch/x86/smbios.c
M src/device/dram/ddr3.c
M src/device/dram/ddr4.c
M src/device/dram/spd.c
M src/include/device/dram/spd.h
M src/include/dimm_info_util.h
M src/include/smbios.h
M src/include/spd.h
M src/lib/dimm_info_util.c
M src/northbridge/intel/haswell/haswell_mrc/raminit.c
M src/soc/amd/common/block/pi/amd_late_init.c
M src/soc/amd/common/fsp/dmi.c
M src/soc/intel/common/smbios.c
13 files changed, 325 insertions(+), 93 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/56628/10
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Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57270 )
Change subject: soc/mediatek: preserve WDT reset reason for debugging
......................................................................
Patch Set 5:
(1 comment)
File src/soc/mediatek/common/wdt.c:
https://review.coreboot.org/c/coreboot/+/57270/comment/1980e386_d3a1458a
PS2, Line 22: write32(&mtk_wdt->wdt_swrst, MTK_WDT_SWRST_KEY);
> Just want to make sure, so for the 2nd reset, we don't tell EC (GPIO_RESET) to reset, and has to res […]
for 2nd reset, we need to tell EC to reset.
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Hello Timofey Komarov, build bot (Jenkins), Patrick Georgi, Patrick Rudolph, Paul Menzel, Thomas Heijligen, Michael Niewöhner, Krystian Hebel, Nico Huber, Maciej Pijanowski, Michał Żygowski, Maxim Polyakov, Edward O'Callaghan, Marcello Sylvester Bauer,
I'd like you to reexamine a change. Please visit
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Change subject: util/liveiso: Add NixOS configs for bootable live systems
......................................................................
util/liveiso: Add NixOS configs for bootable live systems
Add NixOS configurations for bootable live systems containing a set of
tools which might be useful for firmware development in general and for
working on coreboot.
There are two configurations provided. One for console-only and a
graphical one, which is mostly the same as the console image but it
comes with Gnome Shell as window manager and some graphical tools in
addition.
An image can be built using `build-console.sh`, respectively
`build-graphical.sh`. The resulting iso image can be found in
`result/iso/`.
The console image results in ~700MB, while the graphical one results in
~2GB.
Change-Id: Iaf49d198e99781434bd89d2a8a125a4988b77e1c
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M MAINTAINERS
A util/liveiso/.gitignore
A util/liveiso/build-console.sh
A util/liveiso/build-graphical.sh
A util/liveiso/common.nix
A util/liveiso/console.nix
A util/liveiso/description.md
A util/liveiso/graphical.nix
8 files changed, 270 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/50194/39
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Hello Timofey Komarov, build bot (Jenkins), Patrick Georgi, Patrick Rudolph, Paul Menzel, Thomas Heijligen, Michael Niewöhner, Krystian Hebel, Nico Huber, Maciej Pijanowski, Michał Żygowski, Maxim Polyakov, Edward O'Callaghan, Marcello Sylvester Bauer,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/50194
to look at the new patch set (#38).
Change subject: util/liveiso: Add NixOS configs for bootable live systems
......................................................................
util/liveiso: Add NixOS configs for bootable live systems
Add NixOS configurations for bootable live systems containing a set of
tools which might be useful for firmware development in general and for
working on coreboot.
There are two configurations provided. One for console-only and a
graphical one, which is mostly the same as the console image but it
comes with Gnome Shell as window manager and some graphical tools in
addition.
An image can be built using `build-console.sh`, respectively
`build-graphical.sh`. The resulting iso image can be found in
`result/iso/`.
The console image results in ~700MB, while the graphical one results in
~2GB.
Change-Id: Iaf49d198e99781434bd89d2a8a125a4988b77e1c
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M MAINTAINERS
A util/liveiso/.gitignore
A util/liveiso/build-console.sh
A util/liveiso/build-graphical.sh
A util/liveiso/common.nix
A util/liveiso/console.nix
A util/liveiso/description.md
A util/liveiso/graphical.nix
8 files changed, 270 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/50194/38
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Change subject: documentation: add a section on devicetree refs
......................................................................
Patch Set 2: Code-Review+2
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Change subject: lib/edid_fill_fb: Make framebuffer orientation to be configurable
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS2:
> I mean, I think this is the wrong way to do this. […]
I just followed Kconfig option is better than c code for the static return for orientation, but I also understand that the static return could set only one orientation property for each mainboard/variant even it uses multiple panels.
Please see this new patch adding weak function.
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Attention is currently required from: shkim, Paul Menzel, SH Kim, Yu-Ping Wu, Karthik Ramasubramanian.
Hello build bot (Jenkins), Nico Huber, Paul Menzel, SH Kim, Julius Werner, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/57327
to look at the new patch set (#4).
Change subject: lib/edid_fill_fb: Make framebuffer orientation to be configurable
......................................................................
lib/edid_fill_fb: Make framebuffer orientation to be configurable
Some panels have portrait orientation as default. This change makes
framebuffer orientation to be configurable to adjust the proper firmware
screen UI orientation for them.
BUG=b:194967458
TEST=Build and checked the firmware screen UI orientation on bugzzy
BRANCH=None
Change-Id: Ice7f7ab66e40d19c76fbf5876e7d4d3e3b2088fa
Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com>
---
M src/include/framebuffer_info.h
M src/lib/edid_fill_fb.c
M src/mainboard/google/cherry/mainboard.c
M src/mainboard/google/kukui/mainboard.c
4 files changed, 17 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/57327/4
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Gerrit-Change-Number: 57327
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Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57270 )
Change subject: soc/mediatek: preserve WDT reset reason for debugging
......................................................................
Patch Set 5:
(1 comment)
File src/soc/mediatek/common/wdt.c:
https://review.coreboot.org/c/coreboot/+/57270/comment/33143935_6f0ace35
PS2, Line 22: write32(&mtk_wdt->wdt_swrst, MTK_WDT_SWRST_KEY);
> So I think we still remain the modification of this patch instead of using do_board_reset()?
Just want to make sure, so for the 2nd reset, we don't tell EC (GPIO_RESET) to reset, and has to reset from AP?
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Gerrit-Project: coreboot
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