coreboot-gerrit September 2021

coreboot-gerrit@coreboot.org

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6530 discussions

Change in coreboot[master]: src/mainboard/herobrine: Initialize SPI FW for EC and TPM
by Ravi Kumar Bokka (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: Shelley Chen, Ravi kumar, mturney mturney, Julius Werner, Rajesh Patil. Ravi Kumar Bokka has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50581 ) Change subject: src/mainboard/herobrine: Initialize SPI FW for EC and TPM ...................................................................... Patch Set 65: (1 comment) File src/mainboard/google/herobrine/Kconfig: https://review.coreboot.org/c/coreboot/+/50581/comment/df389c16_47736f2c PS58, Line 55: 0xA > i will check with hardware team and update to you Done -- To view, visit https://review.coreboot.org/c/coreboot/+/50581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8cbdd1d59a0166688d52d61646db1b6764879a7c Gerrit-Change-Number: 50581 Gerrit-PatchSet: 65 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rajesh Patil <rajpat(a)qualcomm.corp-partner.google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Rajesh Patil <rajpat(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Fri, 03 Sep 2021 05:37:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Rajesh Patil <rajpat(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: src/mainboard/trogdor: Initialize SPI FW for EC and TPM
by Ravi Kumar Bokka (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: Shelley Chen, Ravi kumar. Ravi Kumar Bokka has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56398 ) Change subject: src/mainboard/trogdor: Initialize SPI FW for EC and TPM ...................................................................... Patch Set 10: (1 comment) Patchset: PS8: > unresolving Hi Shelly, In trogdor, we are maintaining separate commits for SOC and Mainboard changes. Due to this reason, we have split this changes separately. -Ravi -- To view, visit https://review.coreboot.org/c/coreboot/+/56398 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifb89e36517f6a32b8b5881b89112dac4a3f292b0 Gerrit-Change-Number: 56398 Gerrit-PatchSet: 10 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Comment-Date: Fri, 03 Sep 2021 05:26:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Refactor the SMBIOS type 17 write function
by Subrata Banik (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Paul Menzel, Tim Wawrzynczak, Subrata Banik, Angel Pons, Patrick Rudolph, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Furquan Shaikh, Marshall Dawson, Paul Menzel, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56628 to look at the new patch set (#11). Change subject: arch/x86: Refactor the SMBIOS type 17 write function ...................................................................... arch/x86: Refactor the SMBIOS type 17 write function List of changes: 1. Create Module Type macros as per Memory Type (i.e. DDR2/DDR3/DDR4/DDR5/LPDDR4/LPDDR5) and fix compilation issue due to renaming of existing macros due to scoping the Memory Type. 2. Skip fixed module type to form factor conversion using DDR2 SPD4 specification (inside dimm_info_fill()). 3. Use dedicated Memory Type and Module type for `Form Factor` conversion using `get_spd_info()` function. 4. Use dedicated Memory Type and Module type for `TypeDetail` conversion using `get_spd_info()` function. 5. Create a new API (convert_form_factor_to_module_type()) for `Form Factor` to 'Module type' conversion as per `Memory Type`. 6. Add DDR5 and LPDDR5 memory technology into the SMBIOS Memory Type table. 7. Add new argument as `Memory Type` smbios_form_factor_to_spd_mod_type(). 8. smbios_form_factor_to_spd_mod_type() internally calls convert_form_factor_to_module_type() for `Module Type` conversion. Refer to datasheet SPD4.1.2.M-1 for LPDDRx and SPD4.1.2.L-3 for DDRx. BUG=b:194659789 TEST=Refer to dmidecode -t 17 output as below: Without this code change: Handle 0x0012, DMI type 17, 40 bytes Memory Device Array Handle: 0x000A Error Information Handle: Not Provided Total Width: 16 bits Data Width: 16 bits Size: 2048 MB Form Factor: Unknown .... With this code change: Handle 0x0012, DMI type 17, 40 bytes Memory Device Array Handle: 0x000A Error Information Handle: Not Provided Total Width: 16 bits Data Width: 16 bits Size: 2048 MB Form Factor: Row Of Chips .... Change-Id: Ia337ac8f50b61ae78d86a07c7a86aa9c248bad50 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/arch/x86/smbios.c M src/device/dram/ddr3.c M src/device/dram/ddr4.c M src/device/dram/spd.c M src/include/device/dram/spd.h M src/include/dimm_info_util.h M src/include/smbios.h M src/include/spd.h M src/lib/dimm_info_util.c M src/mainboard/scaleway/tagada/ramstage.c M src/northbridge/intel/haswell/haswell_mrc/raminit.c M src/soc/amd/common/block/pi/amd_late_init.c M src/soc/amd/common/fsp/dmi.c M src/soc/intel/common/smbios.c 14 files changed, 326 insertions(+), 94 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/56628/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/56628 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia337ac8f50b61ae78d86a07c7a86aa9c248bad50 Gerrit-Change-Number: 56628 Gerrit-PatchSet: 11 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: arch/x86: Skip returning default leaf value as `0`
by Subrata Banik (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: Furquan Shaikh, Paul Menzel, Angel Pons, Kyösti Mälkki. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57305 ) Change subject: arch/x86: Skip returning default leaf value as `0` ...................................................................... Patch Set 3: (1 comment) File src/arch/x86/cpu_common.c: https://review.coreboot.org/c/coreboot/+/57305/comment/e1b8231b_38fd38f9 PS2, Line 115: return DETERMINISTIC_CACHE_PARAMETERS_CPUID_IA; > Thanks Angel, […] @Angel, looks like Tim also +2'ed this. Do you have any concern if I let this CL merge with ternary operator in place ? Please suggest. -- To view, visit https://review.coreboot.org/c/coreboot/+/57305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iee33b39298e7821ac5280d998172b58a70c8715b Gerrit-Change-Number: 57305 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Fri, 03 Sep 2021 04:41:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2_0: Allow `mp_startup_all_cpus()` to run serially
by Subrata Banik (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Ronak Kanabar, Andrey Petrov, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57343 ) Change subject: drivers/intel/fsp2_0: Allow `mp_startup_all_cpus()` to run serially ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57343/comment/fd919908_5412b3ba PS1, Line 17: But another MP service API `StartupAllCPUs` doesn't specifies any such : requirement. Running the `func` simultaneously on APs results into : coherency issue due to lack of acquire spin lock while accessing common : data structure in multiprocessor environment. > It's hard to figure out if this is called out explicitly anywhere... is this defined somewhere, or is this FSP behavior? Please take a look into EDK2 code https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/Library/MpInitLib/… to understand the UEFI MP module default assumption. > > Is this causing any known issues? yes, we are seeing a random hang while running the cycle test inside FSP while running CPU feature programming using coreboot MP services wrappers. Ronak will raise the crossbug with more details and update the bug id here. Thanks -- To view, visit https://review.coreboot.org/c/coreboot/+/57343 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia95d11408f663212fd40daa9fd9b0881a07f1ce7 Gerrit-Change-Number: 57343 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 03 Sep 2021 04:40:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Refactor the SMBIOS type 17 write function
by Subrata Banik (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Paul Menzel, Tim Wawrzynczak, Subrata Banik, Angel Pons, Patrick Rudolph, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Furquan Shaikh, Marshall Dawson, Paul Menzel, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56628 to look at the new patch set (#10). Change subject: arch/x86: Refactor the SMBIOS type 17 write function ...................................................................... arch/x86: Refactor the SMBIOS type 17 write function List of changes: 1. Create Module Type macros as per Memory Type (i.e. DDR2/DDR3/DDR4/DDR5/LPDDR4/LPDDR5) and fix compilation issue due to renaming of existing macros due to scoping the Memory Type. 2. Skip fixed module type to form factor conversion using DDR2 SPD4 specification (inside dimm_info_fill()). 3. Use dedicated Memory Type and Module type for `Form Factor` conversion using `get_spd_info()` function. 4. Use dedicated Memory Type and Module type for `TypeDetail` conversion using `get_spd_info()` function. 5. Create a new API (convert_form_factor_to_module_type()) for `Form Factor` to 'Module type' conversion as per `Memory Type`. 6. Add DDR5 and LPDDR5 memory technology into the SMBIOS Memory Type table. 7. Add new argument as `Memory Type` smbios_form_factor_to_spd_mod_type(). 8. smbios_form_factor_to_spd_mod_type() internally calls convert_form_factor_to_module_type() for `Module Type` conversion. Refer to datasheet SPD4.1.2.M-1 for LPDDRx and SPD4.1.2.L-3 for DDRx. BUG=b:194659789 TEST=Refer to dmidecode -t 17 output as below: Without this code change: Handle 0x0012, DMI type 17, 40 bytes Memory Device Array Handle: 0x000A Error Information Handle: Not Provided Total Width: 16 bits Data Width: 16 bits Size: 2048 MB Form Factor: Unknown .... With this code change: Handle 0x0012, DMI type 17, 40 bytes Memory Device Array Handle: 0x000A Error Information Handle: Not Provided Total Width: 16 bits Data Width: 16 bits Size: 2048 MB Form Factor: Row Of Chips .... Change-Id: Ia337ac8f50b61ae78d86a07c7a86aa9c248bad50 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/arch/x86/smbios.c M src/device/dram/ddr3.c M src/device/dram/ddr4.c M src/device/dram/spd.c M src/include/device/dram/spd.h M src/include/dimm_info_util.h M src/include/smbios.h M src/include/spd.h M src/lib/dimm_info_util.c M src/northbridge/intel/haswell/haswell_mrc/raminit.c M src/soc/amd/common/block/pi/amd_late_init.c M src/soc/amd/common/fsp/dmi.c M src/soc/intel/common/smbios.c 13 files changed, 325 insertions(+), 93 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/56628/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/56628 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia337ac8f50b61ae78d86a07c7a86aa9c248bad50 Gerrit-Change-Number: 56628 Gerrit-PatchSet: 10 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek: preserve WDT reset reason for debugging
by Rex-BC Chen (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: Hung-Te Lin, Paul Menzel, Felix Held. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57270 ) Change subject: soc/mediatek: preserve WDT reset reason for debugging ...................................................................... Patch Set 5: (1 comment) File src/soc/mediatek/common/wdt.c: https://review.coreboot.org/c/coreboot/+/57270/comment/1980e386_d3a1458a PS2, Line 22: write32(&mtk_wdt->wdt_swrst, MTK_WDT_SWRST_KEY); > Just want to make sure, so for the 2nd reset, we don't tell EC (GPIO_RESET) to reset, and has to res […] for 2nd reset, we need to tell EC to reset. -- To view, visit https://review.coreboot.org/c/coreboot/+/57270 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5887a8312f4daab3cbd0a30fea0195670a932e52 Gerrit-Change-Number: 57270 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 03 Sep 2021 04:07:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: util/liveiso: Add NixOS configs for bootable live systems
by Felix Singer (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: Felix Singer, Timofey Komarov, Patrick Rudolph, Paul Menzel, Thomas Heijligen, Michael Niewöhner, Krystian Hebel, Nico Huber, Maciej Pijanowski, Michał Żygowski, Maxim Polyakov, Edward O'Callaghan, Marcello Sylvester Bauer. Hello Timofey Komarov, build bot (Jenkins), Patrick Georgi, Patrick Rudolph, Paul Menzel, Thomas Heijligen, Michael Niewöhner, Krystian Hebel, Nico Huber, Maciej Pijanowski, Michał Żygowski, Maxim Polyakov, Edward O'Callaghan, Marcello Sylvester Bauer, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50194 to look at the new patch set (#39). Change subject: util/liveiso: Add NixOS configs for bootable live systems ...................................................................... util/liveiso: Add NixOS configs for bootable live systems Add NixOS configurations for bootable live systems containing a set of tools which might be useful for firmware development in general and for working on coreboot. There are two configurations provided. One for console-only and a graphical one, which is mostly the same as the console image but it comes with Gnome Shell as window manager and some graphical tools in addition. An image can be built using `build-console.sh`, respectively `build-graphical.sh`. The resulting iso image can be found in `result/iso/`. The console image results in ~700MB, while the graphical one results in ~2GB. Change-Id: Iaf49d198e99781434bd89d2a8a125a4988b77e1c Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M MAINTAINERS A util/liveiso/.gitignore A util/liveiso/build-console.sh A util/liveiso/build-graphical.sh A util/liveiso/common.nix A util/liveiso/console.nix A util/liveiso/description.md A util/liveiso/graphical.nix 8 files changed, 270 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/50194/39 -- To view, visit https://review.coreboot.org/c/coreboot/+/50194 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaf49d198e99781434bd89d2a8a125a4988b77e1c Gerrit-Change-Number: 50194 Gerrit-PatchSet: 39 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Marcello Sylvester Bauer <sylv(a)sylv.io> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Marcello Sylvester Bauer <sylv(a)sylv.io> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/liveiso: Add NixOS configs for bootable live systems
by Felix Singer (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: Felix Singer, Timofey Komarov, Patrick Rudolph, Paul Menzel, Thomas Heijligen, Michael Niewöhner, Krystian Hebel, Nico Huber, Maciej Pijanowski, Michał Żygowski, Maxim Polyakov, Edward O'Callaghan, Marcello Sylvester Bauer. Hello Timofey Komarov, build bot (Jenkins), Patrick Georgi, Patrick Rudolph, Paul Menzel, Thomas Heijligen, Michael Niewöhner, Krystian Hebel, Nico Huber, Maciej Pijanowski, Michał Żygowski, Maxim Polyakov, Edward O'Callaghan, Marcello Sylvester Bauer, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50194 to look at the new patch set (#38). Change subject: util/liveiso: Add NixOS configs for bootable live systems ...................................................................... util/liveiso: Add NixOS configs for bootable live systems Add NixOS configurations for bootable live systems containing a set of tools which might be useful for firmware development in general and for working on coreboot. There are two configurations provided. One for console-only and a graphical one, which is mostly the same as the console image but it comes with Gnome Shell as window manager and some graphical tools in addition. An image can be built using `build-console.sh`, respectively `build-graphical.sh`. The resulting iso image can be found in `result/iso/`. The console image results in ~700MB, while the graphical one results in ~2GB. Change-Id: Iaf49d198e99781434bd89d2a8a125a4988b77e1c Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M MAINTAINERS A util/liveiso/.gitignore A util/liveiso/build-console.sh A util/liveiso/build-graphical.sh A util/liveiso/common.nix A util/liveiso/console.nix A util/liveiso/description.md A util/liveiso/graphical.nix 8 files changed, 270 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/50194/38 -- To view, visit https://review.coreboot.org/c/coreboot/+/50194 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaf49d198e99781434bd89d2a8a125a4988b77e1c Gerrit-Change-Number: 50194 Gerrit-PatchSet: 38 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Marcello Sylvester Bauer <sylv(a)sylv.io> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Marcello Sylvester Bauer <sylv(a)sylv.io> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: documentation: add a section on devicetree refs
by Furquan Shaikh (Code Review) 03 Sep '21

03 Sep '21

Attention is currently required from: Edward O'Callaghan, Peter Marheine. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57354 ) Change subject: documentation: add a section on devicetree refs ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57354 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4b30f7d531cfc3453d6523a76084f1969125b4bf Gerrit-Change-Number: 57354 Gerrit-PatchSet: 2 Gerrit-Owner: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Comment-Date: Fri, 03 Sep 2021 03:59:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit September 2021