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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57257 )
Change subject: src/*: Specify type of `DIMM_SPD_SIZE` once
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/57257/comment/1471a97c_76ae7294
PS1, Line 9: Specify the type of the `DIMM_SPD_SIZE` Kconfig symbol once.
> maybe add in which Kconfig file the type is defined?
hm, it's probably not worth delaying this patch train for this and since the change touches a lot of files, it's better to not have it to sit in review for too long
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Change subject: device/dram: Add addtional LPDDR4 speed grades
......................................................................
Patch Set 1:
(4 comments)
File src/device/dram/lpddr4.c:
https://review.coreboot.org/c/coreboot/+/57294/comment/5977a6b1_ebaeec75
PS1, Line 42: 1600
1333
https://review.coreboot.org/c/coreboot/+/57294/comment/d7fd70a5_96881bcd
PS1, Line 51: 934
should this be 933?
https://review.coreboot.org/c/coreboot/+/57294/comment/317702a4_0665e377
PS1, Line 52: 2400
1866
https://review.coreboot.org/c/coreboot/+/57294/comment/43d37f94_8d1c2651
PS1, Line 81: 2137
should this be 2133?
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Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57333 )
Change subject: Rename MMCONF Kconfigs to ECAM_MMCONF
......................................................................
Patch Set 3:
(3 comments)
File src/device/Kconfig:
https://review.coreboot.org/c/coreboot/+/57333/comment/a904178e_2a2f00a2
PS3, Line 502: NO_ECAM_MMCONF_SUPPORT
Maybe add some help text to this and the config below explaining what ECAM_MMCONF is? Basically just what you have in the commit message.
The ECAM_MMCONF support uses the Enhanced Configuration Access mechanism (ECAM)
method for accessing PCI config space. This method is specific to x86 platforms.
Other platforms, such as ARM, use a different way of mapping the PCI config
space to memory.
https://review.coreboot.org/c/coreboot/+/57333/comment/9b5c7ac0_52c87a97
PS3, Line 504: default n
default y if !x86 ?
https://review.coreboot.org/c/coreboot/+/57333/comment/8946e2ca_ff53ddcd
PS3, Line 506: ECAM_MMCONF_SUPPORT
Make this depend on X86?
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Change subject: mb/google/guybrush: If not using PCIe WWAN, disable the port
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/57316/comment/83cc64dd_3b3aeaa8
PS1, Line 10: and not do
: the PCIe training.
> In the next CL, it is mentioned that PCIE Training is not done at all for the WWAN port whereas here […]
PCIE training is no longer being run for the USB WWAN card, I updated the commit message of the next patch to fix that.
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Hello build bot (Jenkins), Raul Rangel, Karthik Ramasubramanian, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/57317
to look at the new patch set (#3).
Change subject: mb/google/guybrush: Initialize WWAN GPIOs the same for PCI vs USB
......................................................................
mb/google/guybrush: Initialize WWAN GPIOs the same for PCI vs USB
Since the PCIE training for the USB WWAN card is no longer being run,
we can initialize the GPIOs the same for all WWAN cards.
BUG=b:193036827
TEST=Boot and reboot with fibocom FM350-GL & L850GL modules
Signed-off-by: Martin Roth <martinroth(a)chromium.org>
Change-Id: Idc9a7cb883fc8dd6bbc6077b8ea99182f17f888b
---
M src/mainboard/google/guybrush/variants/baseboard/gpio.c
M src/mainboard/google/guybrush/variants/guybrush/gpio.c
2 files changed, 24 insertions(+), 44 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/57317/3
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