coreboot-gerrit June 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: ec/google/chromeec: Separate SMBIOS SKU functions
by Yu-Ping Wu (Code Review) 05 Jun '21

05 Jun '21

Attention is currently required from: Hung-Te Lin, Tim Wawrzynczak. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55174 ) Change subject: ec/google/chromeec: Separate SMBIOS SKU functions ...................................................................... Patch Set 2: (2 comments) File src/ec/google/chromeec/Makefile.inc: https://review.coreboot.org/c/coreboot/+/55174/comment/99b7d3d9_b1dab070 PS1, Line 17: smm-$(CONFIG_EC_GOOGLE_CHROMEEC_SKUID) += ec_smbios_skuid.c > I don't believe this is required Done File src/ec/google/chromeec/ec_smbios_skuid.c: PS1: > suggestion: name this file […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/55174 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8916223f5f04afe4761be4ad3313e900efae90d4 Gerrit-Change-Number: 55174 Gerrit-PatchSet: 2 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Sat, 05 Jun 2021 08:54:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: ec/google/chromeec: Separate SMBIOS SKU functions
by Yu-Ping Wu (Code Review) 05 Jun '21

05 Jun '21

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Hello Hung-Te Lin, build bot (Jenkins), Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55174 to look at the new patch set (#2). Change subject: ec/google/chromeec: Separate SMBIOS SKU functions ...................................................................... ec/google/chromeec: Separate SMBIOS SKU functions All functions in ec_skuid.c except google_chromeec_get_board_sku() are for SMBIOS platforms. Move these functions to a new file to allow non-SMBIOS platforms to use google_chromeec_get_board_sku() without having to declare MAINBOARD_SMBIOS_MANUFACTURER. BUG=none TEST=emerge-cherry coreboot BRANCH=none Change-Id: I8916223f5f04afe4761be4ad3313e900efae90d4 Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M src/ec/google/chromeec/Makefile.inc M src/ec/google/chromeec/ec_skuid.c A src/ec/google/chromeec/ec_smbios.c 3 files changed, 44 insertions(+), 36 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/55174/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55174 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8916223f5f04afe4761be4ad3313e900efae90d4 Gerrit-Change-Number: 55174 Gerrit-PatchSet: 2 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: lib: set up specific purpose memory as LB_MEM_SOFT_RESERVED
by Kyösti Mälkki (Code Review) 05 Jun '21

05 Jun '21

Attention is currently required from: Lance Zhao, Marc Jones, Nico Huber, Jonathan Zhang, Philipp Deppenwiese, Tim Wawrzynczak, Julius Werner, Angel Pons, Subrata Banik, Patrick Rudolph, Peter Tsung Ho Wu, Ron Minnich. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52585 ) Change subject: lib: set up specific purpose memory as LB_MEM_SOFT_RESERVED ...................................................................... Patch Set 4: (1 comment) File src/include/device/resource.h: https://review.coreboot.org/c/coreboot/+/52585/comment/c18a7657_7da63d02 PS4, Line 30: #define IORESOURCE_SOFT_RESERVE 0x01000000 Why not 0x0200000 which would be the next unused bit. -- To view, visit https://review.coreboot.org/c/coreboot/+/52585 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie70795bcb8c97e9dd5fb772adc060e1606f9bab0 Gerrit-Change-Number: 52585 Gerrit-PatchSet: 4 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Peter Tsung Ho Wu <tsung(a)amazon.com> Gerrit-Reviewer: Philipp Deppenwiese <philipp.deppenwiese(a)9elements.com> Gerrit-Reviewer: Ron Minnich <rminnich(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Philipp Deppenwiese <philipp.deppenwiese(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Peter Tsung Ho Wu <tsung(a)amazon.com> Gerrit-Attention: Ron Minnich <rminnich(a)google.com> Gerrit-Comment-Date: Sat, 05 Jun 2021 08:52:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: ACPI: Refactor use of global and device NVS
by Kyösti Mälkki (Code Review) 05 Jun '21

05 Jun '21

Attention is currently required from: Lance Zhao, Tim Wawrzynczak, Patrick Rudolph. Hello Lance Zhao, build bot (Jenkins), Tim Wawrzynczak, Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51639 to look at the new patch set (#5). Change subject: ACPI: Refactor use of global and device NVS ...................................................................... ACPI: Refactor use of global and device NVS After ChromeOS NVS was moved to a separate allocation and the use of multiple OperationRegions, maintaining the fixed offsets is not necessary. Use actual structure size for OperationRegions, but align the allocations to 8 bytes. Change-Id: I9c73b7c44d234af42c571b23187b924ca2c3894a Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/acpi/Kconfig M src/acpi/acpigen_extern.asl M src/acpi/gnvs.c M src/include/acpi/acpi_gnvs.h M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/ramstage.c M src/soc/intel/baytrail/smihandler.c M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/acpi.c M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/pch/ramstage.c M src/vendorcode/google/chromeos/gnvs.h 12 files changed, 37 insertions(+), 34 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/51639/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/51639 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9c73b7c44d234af42c571b23187b924ca2c3894a Gerrit-Change-Number: 51639 Gerrit-PatchSet: 5 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: ChromeOS: Separate NVS from global GNVS
by Kyösti Mälkki (Code Review) 05 Jun '21

05 Jun '21

Attention is currently required from: Lance Zhao, Angel Pons, Kyösti Mälkki. Hello Lance Zhao, build bot (Jenkins), Tim Wawrzynczak, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51638 to look at the new patch set (#5). Change subject: ChromeOS: Separate NVS from global GNVS ...................................................................... ChromeOS: Separate NVS from global GNVS Allocate chromeos_acpi in CBMEM separately from GNVS. Change-Id: Ide55964ed53ea1d5b3c1c4e3ebd67286b7d568e4 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/acpi/acpi.c M src/acpi/gnvs.c M src/commonlib/include/commonlib/cbmem_id.h M src/include/acpi/acpi.h M src/lib/hardwaremain.c M src/vendorcode/google/chromeos/gnvs.c M src/vendorcode/google/chromeos/gnvs.h 7 files changed, 28 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/51638/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/51638 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ide55964ed53ea1d5b3c1c4e3ebd67286b7d568e4 Gerrit-Change-Number: 51638 Gerrit-PatchSet: 5 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [TEST] Enable link time optimization
by Jacob Garber (Code Review) 05 Jun '21

05 Jun '21

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40815 ) Change subject: [TEST] Enable link time optimization ...................................................................... [TEST] Enable link time optimization Enable LTO to shake out the bugs. Current problems: - GCC does not track symbol origins when using LTO, so it must be disabled for AGESA so it can be excluded from the illegal_globals check. - GCC segfaults when compiling ARMV7 - Most of the Google boards do not compile because of a missing reference to _watchdog_tombstone Change-Id: I37474d4adbf653729bb2e631a1ff812b4319c17a Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M src/Kconfig M src/vendorcode/amd/agesa/Makefile.inc 2 files changed, 7 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/40815/1 diff --git a/src/Kconfig b/src/Kconfig index e4821e8..375bca2 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -116,7 +116,7 @@ config LTO bool "Use link time optimization (LTO)" - default n + default y depends on COMPILER_GCC help Compile with link time optimization. This can often decrease the diff --git a/src/vendorcode/amd/agesa/Makefile.inc b/src/vendorcode/amd/agesa/Makefile.inc index b96af84..3e4a53c 100644 --- a/src/vendorcode/amd/agesa/Makefile.inc +++ b/src/vendorcode/amd/agesa/Makefile.inc @@ -14,6 +14,12 @@ AGESA_CFLAGS := -march=k8-sse3 -mtune=k8-sse3 -fno-strict-aliasing +# GCC currently does not track symbol origins when using LTO, so +# AGESA gets caught in the illegal_globals check. Disable for now. +ifeq ($(CONFIG_LTO),y) +AGESA_CFLAGS += -fno-lto +endif + CFLAGS_x86_32 += $(AGESA_CFLAGS) CFLAGS_x86_64 += $(AGESA_CFLAGS) -- To view, visit https://review.coreboot.org/c/coreboot/+/40815 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37474d4adbf653729bb2e631a1ff812b4319c17a Gerrit-Change-Number: 40815 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: [WIP]Allow to build romstage sources inside the bootblock
by Paul Menzel (Code Review) 05 Jun '21

05 Jun '21

Attention is currently required from: Arthur Heymans, Martin Roth, ron minnich, Stefan Reinauer, Angel Pons, Keith Hui, Patrick Rudolph, Ron Minnich, Felix Held. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55068 ) Change subject: [WIP]Allow to build romstage sources inside the bootblock ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > I still have to build it with seabios with a ps/2 init patch for boot testing - I do have issues with a real Model M on ps/2 port. If you ever mentioned it, I forgot. Is there a bug report with your patch? (Let’s move that discussion out of this change-set.) -- To view, visit https://review.coreboot.org/c/coreboot/+/55068 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id68390edc1ba228b121cca89b80c64a92553e284 Gerrit-Change-Number: 55068 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)chromium.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Branden Waldner <scruffy99(a)gmail.com> Gerrit-CC: Keith Hui <buurin(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: ron minnich <rminnich(a)chromium.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Ron Minnich <rminnich(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sat, 05 Jun 2021 08:14:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Keith Hui <buurin(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Fix X2APIC NMI entry in ACPI MADT
by Kyösti Mälkki (Code Review) 05 Jun '21

05 Jun '21

Attention is currently required from: Wonkyu Kim, Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55182 ) Change subject: soc/intel/common: Fix X2APIC NMI entry in ACPI MADT ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/common/block/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/55182/comment/e1e20ce5_72896f31 PS1, Line 86: 0xffffffff, 0xd, 1); > if (is_x2apic_mode()) […] I have no original failure, caught this doing code review and that platform with x2apic has not been upstreamed yet? My question was only about the usage of the changed flags field 5 -> 0xd and the use of level trigger. I don't really care what a proprietary reference BIOS does and you should not offer copy-pasted solutions to be included in GPL'd repository. So I need a documentation reference, preferably one not under NDA. I am going per the ACPI specification, which essentially says to always have madt_lapic_nmi() and to add madt_lx2apic_nmi() if there is any APIC ID > 255 present. IA64 manual about lapic vectors "keyword: LVT LINT" "Selects the trigger mode for the local LINT0 and LINT1 pins: (0) edge sensitive and (1) level sensitive. This flag is only used when the delivery mode is Fixed. When the delivery mode is NMI, SMI, or INIT, the trigger mode is always edge sensitive." -- To view, visit https://review.coreboot.org/c/coreboot/+/55182 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9c0537a3efba942329f80d7cfdbd910b8958516f Gerrit-Change-Number: 55182 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sat, 05 Jun 2021 08:06:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Wonkyu Kim <wonkyu.kim(a)intel.com> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Add EC_HOST_EVENT_USB_MUX
by John Zhao (Code Review) 05 Jun '21

05 Jun '21

Attention is currently required from: Tim Wawrzynczak. John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55126 ) Change subject: mb/google/brya: Add EC_HOST_EVENT_USB_MUX ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/55126/comment/c68c07d6_d0adde10 PS1, Line 11: BUG=b:183140386 > this is a bug for a different board (i don't think we need one for this) Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/55126 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f4dcbc60a6cb131f28de205bd9ef436f2b508eb Gerrit-Change-Number: 55126 Gerrit-PatchSet: 2 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Sat, 05 Jun 2021 07:53:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Add EC_HOST_EVENT_USB_MUX
by John Zhao (Code Review) 05 Jun '21

05 Jun '21

Attention is currently required from: John Zhao. Hello build bot (Jenkins), Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55126 to look at the new patch set (#2). Change subject: mb/google/brya: Add EC_HOST_EVENT_USB_MUX ...................................................................... mb/google/brya: Add EC_HOST_EVENT_USB_MUX This changes adds the EC_HOST_EVENT_USB_MUX to be dark resume source. BUG=None TEST=Build coreboot image successfully. Signed-off-by: John Zhao <john.zhao(a)intel.com> Change-Id: I6f4dcbc60a6cb131f28de205bd9ef436f2b508eb --- M src/mainboard/google/brya/variants/baseboard/include/baseboard/ec.h 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/55126/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55126 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f4dcbc60a6cb131f28de205bd9ef436f2b508eb Gerrit-Change-Number: 55126 Gerrit-PatchSet: 2 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit June 2021