Attention is currently required from: Wonkyu Kim, Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55182 )
Change subject: soc/intel/common: Fix X2APIC NMI entry in ACPI MADT ......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/common/block/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/55182/comment/e1e20ce5_72896f31 PS1, Line 86: 0xffffffff, 0xd, 1);
if (is_x2apic_mode()) […]
I have no original failure, caught this doing code review and that platform with x2apic has not been upstreamed yet? My question was only about the usage of the changed flags field 5 -> 0xd and the use of level trigger.
I don't really care what a proprietary reference BIOS does and you should not offer copy-pasted solutions to be included in GPL'd repository. So I need a documentation reference, preferably one not under NDA.
I am going per the ACPI specification, which essentially says to always have madt_lapic_nmi() and to add madt_lx2apic_nmi() if there is any APIC ID > 255 present.
IA64 manual about lapic vectors "keyword: LVT LINT"
"Selects the trigger mode for the local LINT0 and LINT1 pins: (0) edge sensitive and (1) level sensitive. This flag is only used when the delivery mode is Fixed. When the delivery mode is NMI, SMI, or INIT, the trigger mode is always edge sensitive."
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Kyösti Mälkki (Code Review)