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Change subject: security/tpm/tss/tcg-2.0: Add `tlcl_set_bits()`
......................................................................
Patch Set 1:
(1 comment)
File src/security/tpm/tss/tcg-2.0/tss.c:
https://review.coreboot.org/c/coreboot/+/55241/comment/3ff0bd27_7b8adbab
PS1, Line 333: printk(BIOS_INFO, "%s: response is %x\n",
Should that be more debug level? Please paste some of these lines from your device to the commit messages too. I see, it’s done elsewhere too, but for me this needs to be fixed to be debug.
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Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55114 )
Change subject: [RFC]soc/intel/common/block/pmc: Don't link get_uint_option in SMM
......................................................................
Patch Set 2: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/55114/comment/e10c9c37_f74b27e4
PS2, Line 19: With this change the option can no longer be updated at runtime.
Also see CB:55238 commit message text; update at runtime required going thru ACPI S5 to have desired affect anyways.
Patchset:
PS2:
Also CB:55238 squashed into this or fixed separately.
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Change subject: [RFC] pc80/rtc/option: Move register backup for SMI
......................................................................
Patch Set 7:
(2 comments)
File src/drivers/pc80/rtc/option.c:
https://review.coreboot.org/c/coreboot/+/49253/comment/8955332f_8148e208
PS7, Line 122: cmos_backup_idx();
"Datasheet says this register is write-only." Comment from lynxpoint about the CMOS index register pair 0x70/0x72.
File src/southbridge/intel/lynxpoint/smihandler.c:
https://review.coreboot.org/c/coreboot/+/49253/comment/41704a8b_ff85b09a
PS6, Line 85: tmp70 = inb(0x70);
> Datasheet says this register is write-only.
Ack
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Change subject: mb/google/dedede/var/storo: Update gpio setting
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Patch Set 1: Code-Review+1
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Change subject: mb/google/dedede/var/blipper: Update DPTF parameters
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Patch Set 2: Code-Review+1
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Change subject: soc/intel/tigerlake: Hook up FSP repository
......................................................................
Patch Set 15:
(4 comments)
File src/mainboard/google/volteer/Kconfig:
https://review.coreboot.org/c/coreboot/+/48713/comment/df96696a_abe63ac1
PS15, Line 23: FSP_TYPE_CLIENT
Since the default FSP type is FSP_TYPE_CLIENT, there is no need to explicitly select this at the mainboard level.
File src/soc/intel/tigerlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/48713/comment/b3626fe2_fba4b996
PS15, Line 220: depends on HAVE_INTEL_FSP_REPO
This is not really a dependency, right?
https://review.coreboot.org/c/coreboot/+/48713/comment/9e2d5d63_1839c269
PS15, Line 226: default y
```
default y if !FSP_TYPE_IOT
```
https://review.coreboot.org/c/coreboot/+/48713/comment/697ab9ac_0a93a701
PS15, Line 227: depends on HAVE_INTEL_FSP_REPO
same comment as L220.
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Change subject: soc/intel/common: Fix X2APIC NMI entry in ACPI MADT
......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/common/block/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/55182/comment/f4be5af7_6813e2f0
PS1, Line 86: 0xffffffff, 0xd, 1);
> Thanks for finding out the this. Do you have detail failure from original code? […]
if (is_x2apic_mode())
current += acpi_create_madt_lx2apic_nmi((acpi_madt_lx2apic_nmi_t *)current,
0xffffffff, 0xd, 1);
else
current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0xff, 5, 1);
This logic is working fine. Can you also check it from your side?
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Change subject: soc/intel/common: Fix X2APIC NMI entry in ACPI MADT
......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/common/block/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/55182/comment/de02a493_fc9524ef
PS1, Line 86: 0xffffffff, 0xd, 1);
> I'd like to know reasoning for the different flags here. 5 vs 0xd.
Thanks for finding out the this. Do you have detail failure from original code?
It's better add this info as test method for x2apic mode.
According to our testing to boot and check x2apic mode from OS, we did not find out any issue. So, we may also add the use case one of verification method
0xD is active high and level trigger is the value is from reference BIOS code.
Checked reference bios code again, it looks we may need to use either acpi_create_madt_lapic_nmi or acpi_create_madt_lx2apic_nmi.
I mean like below.
current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0xff, 5, 1);
if (is_x2apic_mode())
current += acpi_create_madt_lx2apic_nmi((acpi_madt_lx2apic_nmi_t *)current,
0xffffffff, 0xd, 1);
else
current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0xff, 5, 1);
Let me also check this from my side.
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