coreboot-gerrit January 2021

coreboot-gerrit@coreboot.org

1 participants
6505 discussions

Change in coreboot[master]: util/cbfstool: unbreak compilation on FreeBSD
by Julius Werner (Code Review) 11 Jan '21

11 Jan '21

Attention is currently required from: Idwer Vollering. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49314 ) Change subject: util/cbfstool: unbreak compilation on FreeBSD ...................................................................... Patch Set 1: Code-Review+2 (2 comments) Patchset: PS1: > Another approach is to append __BSD_VISIBLE to HOSTCFLAGS in Makefile. That would probably be a bit more in line with what we do for the glibc control macros, but doesn't really matter much either way. PS1: Well... in my defense I did check the FreeBSD man page (https://www.freebsd.org/cgi/man.cgi?query=flock&sektion=2) and it doesn't say anything about needing this. :P -- To view, visit https://review.coreboot.org/c/coreboot/+/49314 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3433e4c9269880d3202dd494e5b2e962757a6b87 Gerrit-Change-Number: 49314 Gerrit-PatchSet: 1 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Comment-Date: Mon, 11 Jan 2021 21:39:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Idwer Vollering <vidwer(a)gmail.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: drivers/genesyslogic/gl9763e: Fix boot on eMMC failed issue on Volteer
by 陳建宏 (Code Review) 11 Jan '21

11 Jan '21

陳建宏 has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48941 ) Change subject: drivers/genesyslogic/gl9763e: Fix boot on eMMC failed issue on Volteer ...................................................................... drivers/genesyslogic/gl9763e: Fix boot on eMMC failed issue on Volteer Boot on Kingston(EMMC64G-TA29/TX29-HP) and Hynix(H26M74002HMR) eMMC will be failed. This is a workaround for improving the compatibiliy between GL9763E(revision 03) and these two eMMC. Signed-off-by: Renius Chen <reniuschengl(a)gmail.com> Change-Id: Iddb145ed6a9edb2d7a50248e64659cda78b88ae6 --- M src/drivers/genesyslogic/gl9763e/gl9763e.c M src/drivers/genesyslogic/gl9763e/gl9763e.h 2 files changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/48941/1 diff --git a/src/drivers/genesyslogic/gl9763e/gl9763e.c b/src/drivers/genesyslogic/gl9763e/gl9763e.c index 48e520b..9b44215 100644 --- a/src/drivers/genesyslogic/gl9763e/gl9763e.c +++ b/src/drivers/genesyslogic/gl9763e/gl9763e.c @@ -12,6 +12,8 @@ static void gl9763e_init(struct device *dev) { + uint32_t ver; + printk(BIOS_INFO, "GL9763E: init\n"); pci_dev_init(dev); @@ -25,6 +27,12 @@ pci_update_config32(dev, PLL_CTL_2, ~PLL_CTL_2_MAX_SSC_MASK, MAX_SSC_30000PPM); /* Enable SSC */ pci_or_config32(dev, PLL_CTL, PLL_CTL_SSC); + /* Check CHIP version */ + ver = pci_read_config32(dev, HW_VER_2); + if ((ver & HW_VER_MASK) == REVISION_03) { + /* Set clock source for RX path */ + pci_update_config32(dev, SDCLKRX_DLY, ~CLK_SRC_MASK, AFTER_OUTPUT_BUFF); + } /* Set VHS to read-only */ pci_update_config32(dev, VHS, ~VHS_REV_MASK, VHS_REV_R); } diff --git a/src/drivers/genesyslogic/gl9763e/gl9763e.h b/src/drivers/genesyslogic/gl9763e/gl9763e.h index fd9c6ba..5cdaa68 100644 --- a/src/drivers/genesyslogic/gl9763e/gl9763e.h +++ b/src/drivers/genesyslogic/gl9763e/gl9763e.h @@ -21,3 +21,11 @@ #define PLL_CTL_2 0x93C #define PLL_CTL_2_MAX_SSC_MASK (0xFFFF << 16) #define MAX_SSC_30000PPM (0xF5C3 << 16) + +#define HW_VER_2 0x8F8 +#define HW_VER_MASK 0xFFFF +#define REVISION_03 0x0011 + +#define SD_CLKRX_DLY 0x934 +#define CLK_SRC_MASK (0x3 << 24) +#define AFTER_OUTPUT_BUFF (0x0 << 24) -- To view, visit https://review.coreboot.org/c/coreboot/+/48941 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iddb145ed6a9edb2d7a50248e64659cda78b88ae6 Gerrit-Change-Number: 48941 Gerrit-PatchSet: 1 Gerrit-Owner: 陳建宏 <renius.chen(a)genesyslogic.com.tw> Gerrit-MessageType: newchange

4 10

Change in coreboot[master]: soc/intel/common/fast_spi: Fix ignored build error
by Raul Rangel (Code Review) 11 Jan '21

11 Jan '21

Attention is currently required from: Furquan Shaikh, Martin Roth, Caveh Jalali, Patrick Rudolph. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49316 ) Change subject: soc/intel/common/fast_spi: Fix ignored build error ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/49316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib579dcba7ffea898345ef0bbc21b0cdcffaedc3e Gerrit-Change-Number: 49316 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 11 Jan 2021 21:30:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/common/fast_spi: Fix ignored build error
by Caveh Jalali (Code Review) 11 Jan '21

11 Jan '21

Attention is currently required from: Furquan Shaikh, Martin Roth, Patrick Rudolph. Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49316 ) Change subject: soc/intel/common/fast_spi: Fix ignored build error ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/common/block/fast_spi/Makefile.inc: https://review.coreboot.org/c/coreboot/+/49316/comment/8e493fd2_e168e578 PS1, Line 45: $$start > required here too? and for $$end? start and end are assigned values unconditionally, so this should be OK. ideally, all variable references would be quoted to avoid such situations. i'm more surprised by the use of $((...)) here. where are we guaranteeing the use of bash for coreboot makefiles? -- To view, visit https://review.coreboot.org/c/coreboot/+/49316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib579dcba7ffea898345ef0bbc21b0cdcffaedc3e Gerrit-Change-Number: 49316 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 11 Jan 2021 21:16:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: util/cbfstool: unbreak compilation on FreeBSD
by Idwer Vollering (Code Review) 11 Jan '21

11 Jan '21

Attention is currently required from: Julius Werner. Idwer Vollering has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49314 ) Change subject: util/cbfstool: unbreak compilation on FreeBSD ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Another approach is to append __BSD_VISIBLE to HOSTCFLAGS in Makefile. -- To view, visit https://review.coreboot.org/c/coreboot/+/49314 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3433e4c9269880d3202dd494e5b2e962757a6b87 Gerrit-Change-Number: 49314 Gerrit-PatchSet: 1 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Mon, 11 Jan 2021 21:03:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/common/fast_spi: Fix ignored build error
by Furquan Shaikh (Code Review) 11 Jan '21

11 Jan '21

Attention is currently required from: Martin Roth, Caveh Jalali, Patrick Rudolph. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49316 ) Change subject: soc/intel/common/fast_spi: Fix ignored build error ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/common/block/fast_spi/Makefile.inc: https://review.coreboot.org/c/coreboot/+/49316/comment/2ef3b1fd_913a0ea5 PS1, Line 45: $$start required here too? and for $$end? -- To view, visit https://review.coreboot.org/c/coreboot/+/49316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib579dcba7ffea898345ef0bbc21b0cdcffaedc3e Gerrit-Change-Number: 49316 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 11 Jan 2021 21:00:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/common/fast_spi: Fix ignored build error
by Furquan Shaikh (Code Review) 11 Jan '21

11 Jan '21

Attention is currently required from: Martin Roth, Caveh Jalali, Patrick Rudolph. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49316 ) Change subject: soc/intel/common/fast_spi: Fix ignored build error ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Patchset: PS1: Thanks for fixing this Caveh! -- To view, visit https://review.coreboot.org/c/coreboot/+/49316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib579dcba7ffea898345ef0bbc21b0cdcffaedc3e Gerrit-Change-Number: 49316 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 11 Jan 2021 20:59:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/common/fast_spi: Fix ignored build error
by Caveh Jalali (Code Review) 11 Jan '21

11 Jan '21

Attention is currently required from: Furquan Shaikh. Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49316 ) Change subject: soc/intel/common/fast_spi: Fix ignored build error ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/49316 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib579dcba7ffea898345ef0bbc21b0cdcffaedc3e Gerrit-Change-Number: 49316 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Comment-Date: Mon, 11 Jan 2021 20:57:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/{icl,tgl,jsl,ehl}: add LPIT support
by Michael Niewöhner (Code Review) 11 Jan '21

11 Jan '21

Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/49048 ) Change subject: soc/intel/{icl,tgl,jsl,ehl}: add LPIT support ...................................................................... soc/intel/{icl,tgl,jsl,ehl}: add LPIT support Add SLP_S0 residency register and enable LPIT support. Change-Id: Id1abbe8dcb7796eeb26ccb72f1f26cf7a040dba4 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49048 Reviewed-by: Lance Zhao Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/elkhartlake/Kconfig M src/soc/intel/elkhartlake/include/soc/pmc.h M src/soc/intel/icelake/Kconfig M src/soc/intel/icelake/include/soc/pmc.h M src/soc/intel/jasperlake/Kconfig M src/soc/intel/jasperlake/include/soc/pmc.h M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/include/soc/pmc.h 8 files changed, 12 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Lance Zhao: Looks good to me, approved Karthik Ramasubramanian: Looks good to me, but someone else must approve diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig index 3031769..25aea15 100644 --- a/src/soc/intel/elkhartlake/Kconfig +++ b/src/soc/intel/elkhartlake/Kconfig @@ -40,6 +40,7 @@ select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK select SOC_INTEL_COMMON_BLOCK_ACPI + select SOC_INTEL_COMMON_BLOCK_ACPI_LPIT select SOC_INTEL_COMMON_BLOCK_CAR select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG select SOC_INTEL_COMMON_BLOCK_CPU diff --git a/src/soc/intel/elkhartlake/include/soc/pmc.h b/src/soc/intel/elkhartlake/include/soc/pmc.h index f331961..1c8cb1a 100644 --- a/src/soc/intel/elkhartlake/include/soc/pmc.h +++ b/src/soc/intel/elkhartlake/include/soc/pmc.h @@ -123,6 +123,8 @@ #define GBLRST_CAUSE0_THERMTRIP (1 << 5) #define GBLRST_CAUSE1 0x1928 +#define SLP_S0_RES 0x193c + #define CPPMVRIC 0x1B1C #define XTALSDQDIS (1 << 22) diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 06c1a9b..d1efa55 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -42,6 +42,7 @@ select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK select SOC_INTEL_COMMON_BLOCK_ACPI + select SOC_INTEL_COMMON_BLOCK_ACPI_LPIT select SOC_INTEL_COMMON_BLOCK_CAR select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG select SOC_INTEL_COMMON_BLOCK_CNVI diff --git a/src/soc/intel/icelake/include/soc/pmc.h b/src/soc/intel/icelake/include/soc/pmc.h index 26dae7e..2ca3328 100644 --- a/src/soc/intel/icelake/include/soc/pmc.h +++ b/src/soc/intel/icelake/include/soc/pmc.h @@ -119,6 +119,8 @@ #define GBLRST_CAUSE0_THERMTRIP (1 << 5) #define GBLRST_CAUSE1 0x1928 +#define SLP_S0_RES 0x193c + #define CPPMVRIC 0x1B1C #define XTALSDQDIS (1 << 22) diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index 0a15f05..9e15a50 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -40,6 +40,7 @@ select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK select SOC_INTEL_COMMON_BLOCK_ACPI + select SOC_INTEL_COMMON_BLOCK_ACPI_LPIT select SOC_INTEL_COMMON_BLOCK_CAR select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG select SOC_INTEL_COMMON_BLOCK_CNVI diff --git a/src/soc/intel/jasperlake/include/soc/pmc.h b/src/soc/intel/jasperlake/include/soc/pmc.h index e65e884..1df2c63 100644 --- a/src/soc/intel/jasperlake/include/soc/pmc.h +++ b/src/soc/intel/jasperlake/include/soc/pmc.h @@ -119,6 +119,8 @@ #define GBLRST_CAUSE0_THERMTRIP (1 << 5) #define GBLRST_CAUSE1 0x1928 +#define SLP_S0_RES 0x193c + #define CPPMVRIC 0x1B1C #define XTALSDQDIS (1 << 22) diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index c7e10a9..9d073fa 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -43,6 +43,7 @@ select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK select SOC_INTEL_COMMON_BLOCK_ACPI + select SOC_INTEL_COMMON_BLOCK_ACPI_LPIT select SOC_INTEL_COMMON_BLOCK_CAR select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG select SOC_INTEL_COMMON_BLOCK_CNVI diff --git a/src/soc/intel/tigerlake/include/soc/pmc.h b/src/soc/intel/tigerlake/include/soc/pmc.h index f926799..cd0299a 100644 --- a/src/soc/intel/tigerlake/include/soc/pmc.h +++ b/src/soc/intel/tigerlake/include/soc/pmc.h @@ -152,6 +152,8 @@ #define HPR_CAUSE0_MI_HRPC (1 << 9) #define HPR_CAUSE0_MI_HR (1 << 8) +#define SLP_S0_RES 0x193c + #define CPPMVRIC 0x1B1C #define XTALSDQDIS (1 << 22) -- To view, visit https://review.coreboot.org/c/coreboot/+/49048 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id1abbe8dcb7796eeb26ccb72f1f26cf7a040dba4 Gerrit-Change-Number: 49048 Gerrit-PatchSet: 7 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: soc/intel/skl: add SLP_S0 residency register and enable LPIT support
by Michael Niewöhner (Code Review) 11 Jan '21

11 Jan '21

Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/49047 ) Change subject: soc/intel/skl: add SLP_S0 residency register and enable LPIT support ...................................................................... soc/intel/skl: add SLP_S0 residency register and enable LPIT support Test: Linux adds the cpuidle sysfs interface; Windows with s0ix_enable=1 boots without crashing with an INTERNAL_POWER_ERROR. Change-Id: Icccd9d15a9e9a22c9bfe7a9843e95d77013c9c8f Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49047 Reviewed-by: Lance Zhao Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/include/soc/pmc.h 2 files changed, 2 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Lance Zhao: Looks good to me, approved diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 0a14bc7..0969a9b 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -49,6 +49,7 @@ select SOC_INTEL_COMMON select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK + select SOC_INTEL_COMMON_BLOCK_ACPI_LPIT select SOC_INTEL_COMMON_BLOCK_CAR select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG select SOC_INTEL_COMMON_BLOCK_CPU diff --git a/src/soc/intel/skylake/include/soc/pmc.h b/src/soc/intel/skylake/include/soc/pmc.h index 350649a..8fe3f83 100644 --- a/src/soc/intel/skylake/include/soc/pmc.h +++ b/src/soc/intel/skylake/include/soc/pmc.h @@ -84,6 +84,7 @@ #define GPE0_DW_SHIFT(x) (4*(x)) #define GBLRST_CAUSE0 0x124 #define GBLRST_CAUSE1 0x128 +#define SLP_S0_RES 0x13c #define CPPMVRIC 0x31c #define XTALSDQDIS (1 << 22) #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/49047 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icccd9d15a9e9a22c9bfe7a9843e95d77013c9c8f Gerrit-Change-Number: 49047 Gerrit-PatchSet: 7 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit January 2021