coreboot-gerrit August 2020

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Change in coreboot[master]: mb/purism/librem_whl: Add new board Librem Mini (WHL-U)
by Matt DeVillier (Code Review) 14 Aug '20

14 Aug '20

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40278 ) Change subject: mb/purism/librem_whl: Add new board Librem Mini (WHL-U) ...................................................................... Patch Set 7: (2 comments) https://review.coreboot.org/c/coreboot/+/40278/2//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/40278/2//COMMIT_MSG@10 PS2, Line 10: > documentation added in CB:42882 Done https://review.coreboot.org/c/coreboot/+/40278/5/src/mainboard/purism/libre… File src/mainboard/purism/librem_whl/Makefile.inc: https://review.coreboot.org/c/coreboot/+/40278/5/src/mainboard/purism/libre… PS5, Line 1: ## : ## : ## > I looked at a handful of other Makefiles with the spdx header and they all had it, so figured I shou […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/40278 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I36af42766f85eb17f86f6ec9b48b87125fb911e6 Gerrit-Change-Number: 40278 Gerrit-PatchSet: 7 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 14 Aug 2020 00:42:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/purism/librem_whl: Add new board Librem Mini (WHL-U)
by Matt DeVillier (Code Review) 14 Aug '20

14 Aug '20

Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/40278 to look at the new patch set (#7). Change subject: mb/purism/librem_whl: Add new board Librem Mini (WHL-U) ...................................................................... mb/purism/librem_whl: Add new board Librem Mini (WHL-U) Add new librem_whl baseboard and Librem Mini variant. Tested with SeaBIOS, Tianocore, and Heads payloads. All functions working normally except SATA, which is limited via a FSP UDP to 3Gbps until the correct HSIO PHY settings can be determined. https://puri.sm/products/librem-mini/ Signed-off-by: Matt DeVillier <matt.devillier(a)puri.sm> Change-Id: I36af42766f85eb17f86f6ec9b48b87125fb911e6 --- A src/mainboard/purism/librem_whl/Kconfig A src/mainboard/purism/librem_whl/Kconfig.name A src/mainboard/purism/librem_whl/Makefile.inc A src/mainboard/purism/librem_whl/acpi/mainboard.asl A src/mainboard/purism/librem_whl/board_info.txt A src/mainboard/purism/librem_whl/devicetree.cb A src/mainboard/purism/librem_whl/dsdt.asl A src/mainboard/purism/librem_whl/ramstage.c A src/mainboard/purism/librem_whl/romstage.c A src/mainboard/purism/librem_whl/variants/librem_mini/data.vbt A src/mainboard/purism/librem_whl/variants/librem_mini/gpio.c A src/mainboard/purism/librem_whl/variants/librem_mini/hda_verb.c A src/mainboard/purism/librem_whl/variants/librem_mini/include/variant/gpio.h 13 files changed, 687 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/40278/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/40278 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I36af42766f85eb17f86f6ec9b48b87125fb911e6 Gerrit-Change-Number: 40278 Gerrit-PatchSet: 7 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/zork: Use FW_CONFIG to enable/disable eMMC on Dalboz
by Bhanu Prakash Maiya (Code Review) 13 Aug '20

13 Aug '20

Bhanu Prakash Maiya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44421 ) Change subject: mb/google/zork: Use FW_CONFIG to enable/disable eMMC on Dalboz ...................................................................... mb/google/zork: Use FW_CONFIG to enable/disable eMMC on Dalboz Currently sku_id is used to enable/disable eMMC as boot media on Dalboz. This patch will check eMMC bit in firmware configuration table to enable/disable eMMC. On Dalboz Proto and EVT devices with eMMC, there was an issue found after SMT. This patch checks for board_version instead of SKU_ID to configure eMMC in HS200. Configure HDMI based on daughterboard_id in FW_CONFIG. BRANCH=none BUG=b:152817444 TEST=Check eMMC is enabled or disabled based on the eMMC bit in FW_CONFIG. Signed-off-by: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Change-Id: Ifa2a49a754d85fb6269f788c970bd9da58af1dad --- M src/mainboard/google/zork/variants/dalboz/variant.c 1 file changed, 19 insertions(+), 23 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/44421/1 diff --git a/src/mainboard/google/zork/variants/dalboz/variant.c b/src/mainboard/google/zork/variants/dalboz/variant.c index de4338e..1dab5fe 100644 --- a/src/mainboard/google/zork/variants/dalboz/variant.c +++ b/src/mainboard/google/zork/variants/dalboz/variant.c @@ -10,6 +10,8 @@ #include <string.h> #define EC_PNP_ID 0x0c09 +#define DALBOZ_DB_USBC 0x0 +#define DALBOZ_DB_HDMI 0x1 /* Look for an EC device of type PNP with id 0x0c09 */ static bool match_ec_dev(DEVTREE_CONST struct device *dev) @@ -104,30 +106,22 @@ cfg->remote_bus = 5; } -static int sku_has_emmc(void) -{ - uint32_t board_sku = sku_id(); - - /* Factory flow requires all OS boot media to be enabled. */ - if (boot_is_factory_unprovisioned()) - return 1; - - /* FIXME: This needs to be fw_config controlled. */ - /* Enable emmc0 for unknown skus. Only sku3/0xC really has it. */ - if (board_sku == 0x5A80000C || board_sku == 0x5A800003 || board_sku == CROS_SKU_UNKNOWN) - return 1; - - return 0; -} - void variant_devtree_update(void) { + uint32_t board_version; struct soc_amd_picasso_config *cfg; cfg = config_of_soc(); - if (sku_has_emmc()) { - if ((sku_id() == 0x5A800003) || (sku_id() == 0x5A80000C)) { + /* + * If CBI board version cannot be read, assume this is an older revision + * of hardware. + */ + if (google_chromeec_cbi_get_board_version(&board_version) != 0) + board_version = 1; + + if (variant_has_emmc() || boot_is_factory_unprovisioned()) { + if (board_version <= 2) { /* * rev0 and rev1 boards have issues with HS400 * @@ -196,14 +190,16 @@ const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num) { - uint32_t board_sku = sku_id(); + uint32_t daughterboard_id = variant_get_daughterboard_id(); *dxio_descs = baseboard_get_dxio_descriptors(dxio_num); - /* SKU 1, A, and D DB have HDMI, as well as unknown */ - /* FIXME: this needs to be fw_config controlled. */ - if ((board_sku == 0x5A80000A) || (board_sku == 0x5A80000D) || (board_sku == 0x5A800001) - || (board_sku == CROS_SKU_UNKNOWN)) { + /* + * SKU# ending 1, A, and D DB have HDMI and enable for + * unprovisioned boards. + */ + if ((daughterboard_id == DALBOZ_DB_HDMI) || + boot_is_factory_unprovisioned()) { *ddi_descs = &hdmi_ddi_descriptors[0]; *ddi_num = ARRAY_SIZE(hdmi_ddi_descriptors); } else { -- To view, visit https://review.coreboot.org/c/coreboot/+/44421 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifa2a49a754d85fb6269f788c970bd9da58af1dad Gerrit-Change-Number: 44421 Gerrit-PatchSet: 1 Gerrit-Owner: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/zork: Use FW_CONFIG to enable/disable eMMC on Ezkinil
by Bhanu Prakash Maiya (Code Review) 13 Aug '20

13 Aug '20

Bhanu Prakash Maiya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44423 ) Change subject: mb/google/zork: Use FW_CONFIG to enable/disable eMMC on Ezkinil ...................................................................... mb/google/zork: Use FW_CONFIG to enable/disable eMMC on Ezkinil Currently SKU_ID is used to enable/disable eMMC as boot media on Ezkinil. This patch will check eMMC bit in firmware configuration table to enable/disable eMMC. BRANCH=none BUG=b:162344105 TEST=Check eMMC is enabled or disabled based on the eMMC bit in FW_CONFIG. Signed-off-by: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Change-Id: I62318cf71ec70790f2d9e787febd1e0b787741fb --- M src/mainboard/google/zork/variants/ezkinil/variant.c 1 file changed, 6 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/44423/1 diff --git a/src/mainboard/google/zork/variants/ezkinil/variant.c b/src/mainboard/google/zork/variants/ezkinil/variant.c index afc24a7..be0d2aa 100644 --- a/src/mainboard/google/zork/variants/ezkinil/variant.c +++ b/src/mainboard/google/zork/variants/ezkinil/variant.c @@ -5,31 +5,17 @@ #include <soc/pci_devs.h> #include <ec/google/chromeec/ec.h> -static int sku_has_emmc(void) -{ - uint32_t board_sku = sku_id(); - - /* Factory flow requires all OS boot media to be enabled. */ - if (boot_is_factory_unprovisioned()) - return 1; - - if ((board_sku == 0x5A020000) || - (board_sku == 0x5A020001) || (board_sku == 0x5A020002) || - (board_sku == 0x5A020005) || (board_sku == 0x5A020006) || - (board_sku == 0x5A020009) || (board_sku == 0x5A02000A) || - (board_sku == 0x5A02000D) || (board_sku == 0x5A02000E) || - (board_sku == 0x5A020016) || (board_sku == 0x5A020017)) - return 1; - - return 0; -} - void variant_devtree_update(void) { struct soc_amd_picasso_config *cfg; cfg = config_of_soc(); - if (!sku_has_emmc()) + /* + * Enable EMMC if FW_CONFIG_MASK_EMMC bit is set + * or FW boots on unprovisioned board in factory. + */ + if (!(variant_has_emmc() || + boot_is_factory_unprovisioned())) cfg->sd_emmc_config = SD_EMMC_DISABLE; } -- To view, visit https://review.coreboot.org/c/coreboot/+/44423 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62318cf71ec70790f2d9e787febd1e0b787741fb Gerrit-Change-Number: 44423 Gerrit-PatchSet: 1 Gerrit-Owner: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/zork: Add helper function to read DB ID bits in FW_CONFIG
by Bhanu Prakash Maiya (Code Review) 13 Aug '20

13 Aug '20

Bhanu Prakash Maiya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44424 ) Change subject: mb/google/zork: Add helper function to read DB ID bits in FW_CONFIG ...................................................................... mb/google/zork: Add helper function to read DB ID bits in FW_CONFIG Add helper function variant_get_daughterboard_id() to read daughterboard id bits (0-3) in firmware configuration table in CBI. BRANCH=none BUG=b:162344105,b:152817444 TEST=Check if daughterboard id bits (0-3) can be read from FW_CONFIG. Signed-off-by: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Change-Id: Ia3c882439bfbe6da28be2df0ec0c976d5c142677 --- M src/mainboard/google/zork/variants/baseboard/helpers.c M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h 2 files changed, 7 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/44424/1 diff --git a/src/mainboard/google/zork/variants/baseboard/helpers.c b/src/mainboard/google/zork/variants/baseboard/helpers.c index 3f2b068..926a34b 100644 --- a/src/mainboard/google/zork/variants/baseboard/helpers.c +++ b/src/mainboard/google/zork/variants/baseboard/helpers.c @@ -144,3 +144,8 @@ return true; } + +int variant_get_daughterboard_id(void) +{ + return extract_field(FW_CONFIG_MASK_DB_INDEX, FW_CONFIG_DB_INDEX_SHIFT); +} diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h index 98ba565..bedcb0d 100644 --- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h @@ -72,5 +72,7 @@ bool variant_uses_codec_gpi(void); /* Return true if variant has active low power enable fow WiFi. */ bool variant_has_active_low_wifi_power(void); +/* Return value of daughterboard ID */ +int variant_get_daughterboard_id(void); #endif /* __BASEBOARD_VARIANTS_H__ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/44424 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia3c882439bfbe6da28be2df0ec0c976d5c142677 Gerrit-Change-Number: 44424 Gerrit-PatchSet: 1 Gerrit-Owner: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/zork: Remove validity checks for FW_CONFIG in CBI
by Bhanu Prakash Maiya (Code Review) 13 Aug '20

13 Aug '20

Bhanu Prakash Maiya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44422 ) Change subject: mb/google/zork: Remove validity checks for FW_CONFIG in CBI ...................................................................... mb/google/zork: Remove validity checks for FW_CONFIG in CBI After confirming that all zork variants and phases have valid FW_CONFIG value in CBI, this patch is dropping FW_CONFIG validity checks like VARIANT_HAS_FW_CONFIG and VARIANT_BOARD_VER_FW_CONFIG_VALID in Kconfig and will also remove associated helper functions. Add a helper function to get daughterboard_id from FW_CONIFG. BRANCH=none BUG=b:162344105,b:152817444 TEST=Check if FW_CONFIG bits can be read in coreboot and FW_CONIFG helper function do not return 0 if board has a valid FW_CONFIG in CBI. Signed-off-by: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Change-Id: I633dc7c500ef8759f3fffb0db6b76d96257c3c9a --- M src/mainboard/google/zork/Kconfig M src/mainboard/google/zork/variants/baseboard/helpers.c M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h 3 files changed, 7 insertions(+), 40 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/44422/1 diff --git a/src/mainboard/google/zork/Kconfig b/src/mainboard/google/zork/Kconfig index bf2fe2e..3a17a38 100644 --- a/src/mainboard/google/zork/Kconfig +++ b/src/mainboard/google/zork/Kconfig @@ -143,18 +143,6 @@ Location of the AMD firmware in the RW_B region. This is the start of the RW-A region + 64 bytes for the cbfs header. -config VARIANT_HAS_FW_CONFIG - bool - help - Honor FW_CONFIG in CBI. - -config VARIANT_BOARD_VER_FW_CONFIG_VALID - int - default 256 - depends on VARIANT_HAS_FW_CONFIG - help - Which board version did FW_CONFIG become valid in CBI. - config VARIANT_SUPPORTS_PRE_V3_SCHEMATICS bool default y if BOARD_GOOGLE_TREMBYLE diff --git a/src/mainboard/google/zork/variants/baseboard/helpers.c b/src/mainboard/google/zork/variants/baseboard/helpers.c index 7dc9fd3..d95ab82 100644 --- a/src/mainboard/google/zork/variants/baseboard/helpers.c +++ b/src/mainboard/google/zork/variants/baseboard/helpers.c @@ -48,36 +48,10 @@ FW_CONFIG_SHIFT_FAN = 27, }; -int variant_fw_config_valid(void) -{ - static uint32_t board_version; - const uint32_t bv_valid = CONFIG_VARIANT_BOARD_VER_FW_CONFIG_VALID; - - if (!CONFIG(VARIANT_HAS_FW_CONFIG)) - return 0; - - /* Fast path for non-zero board version. */ - if (board_version >= bv_valid) - return 1; - - if (google_chromeec_cbi_get_board_version(&board_version)) { - printk(BIOS_ERR, "Unable to obtain board version for FW_CONFIG\n"); - return 0; - } - - if (board_version >= bv_valid) - return 1; - - return 0; -} - static int get_fw_config(uint32_t *val) { static uint32_t known_value; - if (!variant_fw_config_valid()) - return -1; - if (known_value) { *val = known_value; return 0; @@ -170,3 +144,8 @@ return true; } + +int variant_get_daughterboard_id(void) +{ + return extract_field(FW_CONFIG_MASK_DB_INDEX, FW_CONFIG_DB_INDEX_SHIFT); +} diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h index 93aad0f..bedcb0d 100644 --- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h @@ -56,8 +56,6 @@ const fsp_ddi_descriptor *baseboard_get_ddi_descriptors(size_t *num); /* Retrieve attributes from FW_CONFIG in CBI. */ -/* Return 1 if FW_CONFIG expected to be valid, else 0. */ -int variant_fw_config_valid(void); /* Return 0 if non-existent, 1 if present. */ int variant_has_emmc(void); /* Return 0 if non-existent, 1 if present. */ @@ -74,5 +72,7 @@ bool variant_uses_codec_gpi(void); /* Return true if variant has active low power enable fow WiFi. */ bool variant_has_active_low_wifi_power(void); +/* Return value of daughterboard ID */ +int variant_get_daughterboard_id(void); #endif /* __BASEBOARD_VARIANTS_H__ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/44422 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I633dc7c500ef8759f3fffb0db6b76d96257c3c9a Gerrit-Change-Number: 44422 Gerrit-PatchSet: 1 Gerrit-Owner: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: {soc,drivers}: Enable ISH 'firmware-name' device property on TGL via ...
by Jes Klinke (Code Review) 13 Aug '20

13 Aug '20

Hello Jes Klinke, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/39475 to review the following change. Change subject: {soc,drivers}: Enable ISH 'firmware-name' device property on TGL via ACPI _DSD table ...................................................................... {soc,drivers}: Enable ISH 'firmware-name' device property on TGL via ACPI _DSD table Upstream of non-mainboard parts of commit c88f7d29565a5f24603bc6cf235d8f3d7d1caf12. Change-Id: I082c5bdd83a9d9e1a23dbc38b74e5f9752c98c99 Signed-off-by: Hu, Hebo <hebo.hu(a)intel.com> --- M src/drivers/intel/ish/Kconfig M src/drivers/intel/ish/ish.c M src/include/device/pci_ids.h A src/soc/intel/tigerlake/acpi/ish.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 5 files changed, 28 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/39475/1 diff --git a/src/drivers/intel/ish/Kconfig b/src/drivers/intel/ish/Kconfig index 635864e..a2828d1 100644 --- a/src/drivers/intel/ish/Kconfig +++ b/src/drivers/intel/ish/Kconfig @@ -1,5 +1,6 @@ config DRIVERS_INTEL_ISH bool + default n help When enabled, chip driver/intel/ish will publish information to the SSDT _DSD table for the ISH device. diff --git a/src/drivers/intel/ish/ish.c b/src/drivers/intel/ish/ish.c index e9d5ae96..d542bd3 100644 --- a/src/drivers/intel/ish/ish.c +++ b/src/drivers/intel/ish/ish.c @@ -65,6 +65,7 @@ static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_CNL_ISHB, PCI_DEVICE_ID_INTEL_CML_ISHB, + PCI_DEVICE_ID_INTEL_TGL_ISHB, 0 }; diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index ccbfe40..3da326b 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2105,6 +2105,7 @@ #define PCI_DEVICE_ID_INTEL_82439TX 0x7100 #define PCI_DEVICE_ID_INTEL_CNL_ISHB 0x9dfc #define PCI_DEVICE_ID_INTEL_CML_ISHB 0x02fc +#define PCI_DEVICE_ID_INTEL_TGL_ISHB 0xa0fc /* Intel 82371FB (PIIX) */ #define PCI_DEVICE_ID_INTEL_82371FB_ISA 0x122e diff --git a/src/soc/intel/tigerlake/acpi/ish.asl b/src/soc/intel/tigerlake/acpi/ish.asl new file mode 100644 index 0000000..186a147 --- /dev/null +++ b/src/soc/intel/tigerlake/acpi/ish.asl @@ -0,0 +1,22 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* Intel Integrated Sensor Hub Controller 0:12.0 */ + +Device (ISHB) +{ + Name (_ADR, 0x00120000) + Name (_DDN, "Integrated Sensor Hub Controller") +} diff --git a/src/soc/intel/tigerlake/acpi/southbridge.asl b/src/soc/intel/tigerlake/acpi/southbridge.asl index 8593d07..8e17abb 100644 --- a/src/soc/intel/tigerlake/acpi/southbridge.asl +++ b/src/soc/intel/tigerlake/acpi/southbridge.asl @@ -46,6 +46,9 @@ /* SMBus 0:1f.4 */ #include "smbus.asl" +/* ISH 0:12.0 */ +#include "ish.asl" + /* USB XHCI 0:14.0 */ #include "xhci.asl" -- To view, visit https://review.coreboot.org/c/coreboot/+/39475 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I082c5bdd83a9d9e1a23dbc38b74e5f9752c98c99 Gerrit-Change-Number: 39475 Gerrit-PatchSet: 1 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Jes Klinke <jbk(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb: Enable ISH 'firmware-name' device property on TGL via ACPI _DSD t...
by Jes Klinke (Code Review) 13 Aug '20

13 Aug '20

Hello Jes Klinke, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/39482 to review the following change. Change subject: mb: Enable ISH 'firmware-name' device property on TGL via ACPI _DSD table ...................................................................... mb: Enable ISH 'firmware-name' device property on TGL via ACPI _DSD table Upstream of mainboard parts of commit c88f7d29565a5f24603bc6cf235d8f3d7d1caf12. Change-Id: Ibc3d4c4ca5ea12d89cef8a4e37ecd4c3c2eb2e2d Signed-off-by: Hu, Hebo <hebo.hu(a)intel.com> --- M src/mainboard/intel/tglrvp/Kconfig M src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb M src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb 3 files changed, 18 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/39482/1 diff --git a/src/mainboard/intel/tglrvp/Kconfig b/src/mainboard/intel/tglrvp/Kconfig index 2051a05..d60918f 100644 --- a/src/mainboard/intel/tglrvp/Kconfig +++ b/src/mainboard/intel/tglrvp/Kconfig @@ -14,6 +14,7 @@ select GENERATE_SMBIOS_TABLES select SOC_INTEL_TIGERLAKE select INTEL_LPSS_UART_FOR_CONSOLE + select DRIVERS_INTEL_ISH config CHROMEOS bool diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb index 4492acb..ea2b264 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb @@ -133,6 +133,14 @@ device pci 10.2 off end # CNVi: BT 0xA0F5 - A0F7 device pci 10.6 off end # THC0 0xA0D0 device pci 10.7 off end # THC1 0xA0D1 + + device pci 12.0 off # SensorHUB 0xA0FC + chip drivers/intel/ish + register "firmware_name" = ""tglrvp_ish.bin"" + device generic 0 on end + end + end + device pci 12.0 off end # SensorHUB 0xA0FC device pci 12.6 off end # GSPI2 0x34FB device pci 13.0 off end # GSPI3 0xA0FD diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb index 643db36..b3558ca 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb @@ -129,7 +129,15 @@ device pci 10.2 off end # CNVi: BT 0xA0F5 - A0F7 device pci 10.6 off end # THC0 0xA0D0 device pci 10.7 off end # THC1 0xA0D1 - device pci 12.0 off end # SensorHUB 0xA0FC + + device pci 12.0 off # SensorHUB 0xA0FC + chip drivers/intel/ish + register "firmware_name" = ""tglrvp_ish.bin"" + device generic 0 on end + end + end + + device pci 12.6 off end # GSPI2 0x34FB device pci 13.0 off end # GSPI3 0xA0FD device pci 14.0 on end # USB3.1 xHCI 0xA0ED -- To view, visit https://review.coreboot.org/c/coreboot/+/39482 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc3d4c4ca5ea12d89cef8a4e37ecd4c3c2eb2e2d Gerrit-Change-Number: 39482 Gerrit-PatchSet: 1 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Jes Klinke <jbk(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: libpayload: cbgfx: Add color mapping functionality
by Yu-Ping Wu (Code Review) 13 Aug '20

13 Aug '20

Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44375 ) Change subject: libpayload: cbgfx: Add color mapping functionality ...................................................................... libpayload: cbgfx: Add color mapping functionality Similar to set_blend(), add set_color_map() for mapping background and foreground colors of a bitmap. Also add clear_color_map() for clearing the saved color mappings. Note that when drawing a bitmap, the color mapping will be applied before blending. BRANCH=puff BUG=b:146399181, b:162357639 TEST=emerge-puff libpayload Change-Id: I640ff3e8455cd4aaa5a41d03a0183dff282648a5 Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M payloads/libpayload/drivers/video/graphics.c M payloads/libpayload/include/cbgfx.h 2 files changed, 64 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/44375/1 diff --git a/payloads/libpayload/drivers/video/graphics.c b/payloads/libpayload/drivers/video/graphics.c index b52bd99..49a05fc 100644 --- a/payloads/libpayload/drivers/video/graphics.c +++ b/payloads/libpayload/drivers/video/graphics.c @@ -61,6 +61,32 @@ .y = 0, }; +struct color_mapping { + struct rgb_color bg; + struct rgb_color fg; + int enabled; +}; + +static struct color_mapping color_map; + +int set_color_map(const struct rgb_color *background, + const struct rgb_color *foreground) +{ + if (background == NULL || foreground == NULL) + return CBGFX_ERROR_INVALID_PARAMETER; + + color_map.bg = *background; + color_map.fg = *foreground; + color_map.enabled = 1; + + return CBGFX_SUCCESS; +} + +void clear_color_map(void) +{ + color_map.enabled = 0; +} + struct blend_value { uint8_t alpha; struct rgb_color rgb; @@ -185,6 +211,17 @@ return -1; } +/* Helper function that applies color_map to the color. */ +static inline uint8_t apply_map(uint8_t color, + uint8_t bg_color, uint8_t fg_color) +{ + if (!color_map.enabled) + return color; + + return ((int16_t)bg_color * (UINT8_MAX - color) + + (int16_t)fg_color * color) / UINT8_MAX; +} + /* * Helper function that applies color and opacity from blend struct * into the color. @@ -203,13 +240,19 @@ { uint32_t color = 0; - color |= (apply_blend(rgb->red, blend.rgb.red) + color |= (apply_blend(apply_map(rgb->red, + color_map.bg.red, color_map.fg.red), + blend.rgb.red) >> (8 - fbinfo->red_mask_size)) << fbinfo->red_mask_pos; - color |= (apply_blend(rgb->green, blend.rgb.green) + color |= (apply_blend(apply_map(rgb->green, + color_map.bg.green, color_map.fg.green), + blend.rgb.green) >> (8 - fbinfo->green_mask_size)) << fbinfo->green_mask_pos; - color |= (apply_blend(rgb->blue, blend.rgb.blue) + color |= (apply_blend(apply_map(rgb->blue, + color_map.bg.blue, color_map.fg.blue), + blend.rgb.blue) >> (8 - fbinfo->blue_mask_size)) << fbinfo->blue_mask_pos; if (invert) diff --git a/payloads/libpayload/include/cbgfx.h b/payloads/libpayload/include/cbgfx.h index f2883b0..85b61a7 100644 --- a/payloads/libpayload/include/cbgfx.h +++ b/payloads/libpayload/include/cbgfx.h @@ -228,6 +228,24 @@ int get_bitmap_dimension(const void *bitmap, size_t sz, struct scale *dim_rel); /** + * Setup color mappings of background and foreground colors. Black and white + * pixels will be mapped to the background and foreground colors, respectively. + * Call clear_color_map() to disabled color mapping. + * + * @param[in] background Background color. + * @param[in] foreground Foreground color. + * + * @return CBGFX_* error codes + */ +int set_color_map(const struct rgb_color *background, + const struct rgb_color *foreground); + +/** + * Clear color mappings. + */ +void clear_color_map(void); + +/** * Setup alpha and rgb values for alpha blending. When alpha is != 0, * this enables a translucent layer of color (defined by rgb) to be * blended at a given translucency (alpha) to all things drawn. Call @@ -244,8 +262,6 @@ /** * Clear alpha and rgb values, thus disabling any alpha blending. - * - * @return CBGFX_* error codes */ void clear_blend(void); -- To view, visit https://review.coreboot.org/c/coreboot/+/44375 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I640ff3e8455cd4aaa5a41d03a0183dff282648a5 Gerrit-Change-Number: 44375 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: [WIP]mb/intel/tglrvp: Set gpio GPP_H1
by Shaunak Saha (Code Review) 13 Aug '20

13 Aug '20

Shaunak Saha has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41811 ) Change subject: [WIP]mb/intel/tglrvp: Set gpio GPP_H1 ...................................................................... [WIP]mb/intel/tglrvp: Set gpio GPP_H1 BUG=none BRANCH=none TEST=Build and boot tglrvp successfully. Change-Id: Ic0ef33079af7940360c986efacabd6d367aad516 Signed-off-by: Shaunak Saha <shaunak.saha(a)intel.com> --- M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/41811/1 diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c index 4457506..6a33dcf 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c @@ -54,6 +54,8 @@ /* CNVi */ PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1), /* CNV_RF_RST_L */ PAD_CFG_NF(GPP_F5, NONE, DEEP, NF3), /* CNV_CLKREQ0 */ + + PAD_CFG_GPO(GPP_H1, 1, DEEP), }; /* Early pad configuration in bootblock */ -- To view, visit https://review.coreboot.org/c/coreboot/+/41811 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic0ef33079af7940360c986efacabd6d367aad516 Gerrit-Change-Number: 41811 Gerrit-PatchSet: 1 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-MessageType: newchange

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