coreboot-gerrit May 2020

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Change in coreboot[master]: mb/kontron/mal10: Add COMe-mAL10 minimal support
by Felix Singer (Code Review) 08 May '20

08 May '20

Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39133 ) Change subject: mb/kontron/mal10: Add COMe-mAL10 minimal support ...................................................................... Patch Set 20: (5 comments) https://review.coreboot.org/c/coreboot/+/39133/20/src/mainboard/kontron/mal… File src/mainboard/kontron/mal10/Kconfig: https://review.coreboot.org/c/coreboot/+/39133/20/src/mainboard/kontron/mal… PS20, Line 5: select USE_BLOBS : select ADD_FSP_BINARIES : select FSP_USE_REPO Remove https://review.coreboot.org/c/coreboot/+/39133/20/src/mainboard/kontron/mal… PS20, Line 23: config MAINBOARD_VENDOR : string : default "kontron" Remove, it is set by mb/kontron/Kconfig https://review.coreboot.org/c/coreboot/+/39133/20/src/mainboard/kontron/mal… File src/mainboard/kontron/mal10/Makefile.inc: https://review.coreboot.org/c/coreboot/+/39133/20/src/mainboard/kontron/mal… PS20, Line 2: romstage-y += romstage.c AFAIK not needed https://review.coreboot.org/c/coreboot/+/39133/20/src/mainboard/kontron/mal… File src/mainboard/kontron/mal10/cmos.layout: https://review.coreboot.org/c/coreboot/+/39133/20/src/mainboard/kontron/mal… PS20, Line 109: 5 0 Disable : 5 1 Enable Change to ID 2 https://review.coreboot.org/c/coreboot/+/39133/20/src/mainboard/kontron/mal… File src/mainboard/kontron/mal10/romstage.c: https://review.coreboot.org/c/coreboot/+/39133/20/src/mainboard/kontron/mal… PS20, Line 4: #include <string.h> : #include <soc/romstage.h> : #include <soc/gpio_apl.h> : #include <soc/meminit.h> : #include <fsp/api.h> : #include <FspmUpd.h> : #include <console/console.h> : #include <gpio.h> : #include <spd_bin.h> : #include <soc/gpio.h> : #include <intelblocks/lpc_lib.h> : #include "gpio.h" Are all these needed? string.h and console/console.h seem to be unused. -- To view, visit https://review.coreboot.org/c/coreboot/+/39133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8432e10396f77eb05a71af1ccaaa4437a2e43ea Gerrit-Change-Number: 39133 Gerrit-PatchSet: 20 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <anpetrov(a)fb.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 08 May 2020 11:08:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI F...
by Johnny Lin (Code Review) 08 May '20

08 May '20

Hello build bot (Jenkins), Andrey Petrov, Patrick Georgi, Martin Roth, Jonathan Zhang, Maxim Polyakov, David Hendricks, Jingle Hsu, Morgan Jang, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/40308 to look at the new patch set (#32). Change subject: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI FRU data ...................................................................... drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI FRU data It implements the SMBIOS IPMI FRU mapping table defined in https://www.opencompute.org/documents/facebook-xeon-motherboard-v31 22.3 SMBIOS FRU mapping table. Need to configure the correct values for FRU_DEVICE_ID and BMC_KCS_BASE. For type 11 string 1 to 6 are common and implemented in this driver, the rest are project dependent and can be added in the mainboard code. Tested on OCP Tioga Pass. Change-Id: I08c958dfad83216cd12545760a19d205efc2515b Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com> --- A src/drivers/ocp/dmi/Kconfig A src/drivers/ocp/dmi/Makefile.inc A src/drivers/ocp/dmi/ocp_dmi.h A src/drivers/ocp/dmi/smbios.c 4 files changed, 271 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/40308/32 -- To view, visit https://review.coreboot.org/c/coreboot/+/40308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I08c958dfad83216cd12545760a19d205efc2515b Gerrit-Change-Number: 40308 Gerrit-PatchSet: 32 Gerrit-Owner: Johnny Lin Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jingle Hsu Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Morgan Jang Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX
by Maxim Polyakov (Code Review) 08 May '20

08 May '20

Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41116 ) Change subject: soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/41116 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9cd25edd167ec71ee98c7ffa4fa6f95ca73a75e9 Gerrit-Change-Number: 41116 Gerrit-PatchSet: 5 Gerrit-Owner: Michael Niewöhner Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Johnny Lin Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 08 May 2020 07:16:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/puff: add a region to cache SPD data
by Edward O'Callaghan (Code Review) 08 May '20

08 May '20

Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40415 ) Change subject: mb/google/puff: add a region to cache SPD data ...................................................................... Patch Set 7: (1 comment) https://review.coreboot.org/c/coreboot/+/40415/7/src/mainboard/google/hatch… File src/mainboard/google/hatch/Kconfig: https://review.coreboot.org/c/coreboot/+/40415/7/src/mainboard/google/hatch… PS7, Line 82: if ROMSTAGE_SPD_CBFS > Add something like USE_SPD_CACHE config should be better. I think how it is at the moment makes more sense. The baseboard has two paths, one for cbfs for downed dimm's while the other smbus for socketted. I don't see why we would need yet another kconfig param since we wouldn't want to not have the spd cache enabled in the smbus path. We could however have something like: default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/chromeos-16MiB-spd.fmd" if BOARD_ROMSIZE_KB_16384 && ROMSTAGE_SPD_SMBUS .. -- To view, visit https://review.coreboot.org/c/coreboot/+/40415 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8d07fddf113a767d62394cb31e33b56f22f74351 Gerrit-Change-Number: 40415 Gerrit-PatchSet: 7 Gerrit-Owner: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 08 May 2020 05:09:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: lib/spd_bin: add get_spd_sn function
by Edward O'Callaghan (Code Review) 08 May '20

08 May '20

Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40414 ) Change subject: lib/spd_bin: add get_spd_sn function ...................................................................... Patch Set 6: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/40414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I406bba7cc56debbd9851d430f069e4fb96ec937c Gerrit-Change-Number: 40414 Gerrit-PatchSet: 6 Gerrit-Owner: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 08 May 2020 04:59:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI F...
by Johnny Lin (Code Review) 08 May '20

08 May '20

Hello build bot (Jenkins), Andrey Petrov, Patrick Georgi, Martin Roth, Jonathan Zhang, Maxim Polyakov, David Hendricks, Jingle Hsu, Morgan Jang, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/40308 to look at the new patch set (#31). Change subject: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI FRU data ...................................................................... drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI FRU data It implements the SMBIOS IPMI FRU mapping table defined in https://www.opencompute.org/documents/facebook-xeon-motherboard-v31 22.3 SMBIOS FRU mapping table. Need to configure the correct values for FRU_DEVICE_ID and BMC_KCS_BASE. Tested on OCP Tioga Pass. Change-Id: I08c958dfad83216cd12545760a19d205efc2515b Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com> --- A src/drivers/ocp/dmi/Kconfig A src/drivers/ocp/dmi/Makefile.inc A src/drivers/ocp/dmi/ocp_dmi.h A src/drivers/ocp/dmi/smbios.c 4 files changed, 276 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/40308/31 -- To view, visit https://review.coreboot.org/c/coreboot/+/40308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I08c958dfad83216cd12545760a19d205efc2515b Gerrit-Change-Number: 40308 Gerrit-PatchSet: 31 Gerrit-Owner: Johnny Lin Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jingle Hsu Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Morgan Jang Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI F...
by Johnny Lin (Code Review) 08 May '20

08 May '20

Hello build bot (Jenkins), Andrey Petrov, Patrick Georgi, Martin Roth, Jonathan Zhang, Maxim Polyakov, David Hendricks, Jingle Hsu, Morgan Jang, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/40308 to look at the new patch set (#30). Change subject: drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI FRU data ...................................................................... drivers/ocp/dmi: Add OCP_DMI driver for populating SMBIOS from IPMI FRU data It implements the SMBIOS IPMI FRU mapping table defined in https://www.opencompute.org/documents/facebook-xeon-motherboard-v31 22.3 SMBIOS FRU mapping table. Need to configure the correct values for FRU_DEVICE_ID and BMC_KCS_BASE. Tested on OCP Tioga Pass. Change-Id: I08c958dfad83216cd12545760a19d205efc2515b Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com> --- A src/drivers/ocp/dmi/Kconfig A src/drivers/ocp/dmi/Makefile.inc A src/drivers/ocp/dmi/ocp_dmi.h A src/drivers/ocp/dmi/smbios.c 4 files changed, 275 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/40308/30 -- To view, visit https://review.coreboot.org/c/coreboot/+/40308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I08c958dfad83216cd12545760a19d205efc2515b Gerrit-Change-Number: 40308 Gerrit-PatchSet: 30 Gerrit-Owner: Johnny Lin Gerrit-Reviewer: Andrey Petrov <anpetrov(a)fb.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jingle Hsu Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Morgan Jang Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/picasso: fix iomap for ACPI_PM
by Kangheui Won (Code Review) 08 May '20

08 May '20

Kangheui Won has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41128 ) Change subject: soc/amd/picasso: fix iomap for ACPI_PM ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/c/coreboot/+/41128/2//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/41128/2//COMMIT_MSG@9 PS2, Line 9: offsets for ACPI_PM are incorrectly configured for picasso SoC. > Any idea why? Error in the datasheet? […] It seems that confs are copied from stoneyridge files. I checked with picasso datasheet. -- To view, visit https://review.coreboot.org/c/coreboot/+/41128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6adf71479c30f5b6751a21edc4bfa311ddbef5ec Gerrit-Change-Number: 41128 Gerrit-PatchSet: 2 Gerrit-Owner: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 08 May 2020 02:24:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: memrange: constify memranges_is_empty()
by Aaron Durbin (Code Review) 08 May '20

08 May '20

Aaron Durbin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41102 ) Change subject: memrange: constify memranges_is_empty() ...................................................................... memrange: constify memranges_is_empty() memranges_is_empty() doesn't need to manipulate the object. Mark the parameter as const. Change-Id: I89f4ec404c144eac8d2900945a1ccaf5cc4f88bb Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- M src/include/memrange.h 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/41102/1 diff --git a/src/include/memrange.h b/src/include/memrange.h index 2579f20..deb8c1e 100644 --- a/src/include/memrange.h +++ b/src/include/memrange.h @@ -69,7 +69,7 @@ r->tag = new_tag; } -static inline bool memranges_is_empty(struct memranges *ranges) +static inline bool memranges_is_empty(const struct memranges *ranges) { return ranges->entries == NULL; } -- To view, visit https://review.coreboot.org/c/coreboot/+/41102 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89f4ec404c144eac8d2900945a1ccaf5cc4f88bb Gerrit-Change-Number: 41102 Gerrit-PatchSet: 1 Gerrit-Owner: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: arch/x86: unexpose postcar_frame_common_mtrrs()
by Aaron Durbin (Code Review) 08 May '20

08 May '20

Aaron Durbin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41101 ) Change subject: arch/x86: unexpose postcar_frame_common_mtrrs() ...................................................................... arch/x86: unexpose postcar_frame_common_mtrrs() The only caller is contained within the postcar_loader compilation unit. Therefore, remove postcar_frame_common_mtrrs() from the global symbol namespace. Change-Id: I90d308669d13eb2bebf1eca4d47e3f3b4f178714 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- M src/arch/x86/include/arch/romstage.h M src/arch/x86/postcar_loader.c 2 files changed, 1 insertion(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/41101/1 diff --git a/src/arch/x86/include/arch/romstage.h b/src/arch/x86/include/arch/romstage.h index 0f9a358..74ec7f4 100644 --- a/src/arch/x86/include/arch/romstage.h +++ b/src/arch/x86/include/arch/romstage.h @@ -42,11 +42,6 @@ void postcar_frame_add_romcache(struct postcar_frame *pcf, int type); /* - * Add a common MTRR setup most platforms will have as a subset. - */ -void postcar_frame_common_mtrrs(struct postcar_frame *pcf); - -/* * fill_postcar_frame() is called after raminit completes and right before * calling run_postcar_phase(). Implementation should call postcar_frame_add_mtrr() * to tag memory ranges as cacheable to speed up execution of postcar and diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c index 2efa7ac..1852edd 100644 --- a/src/arch/x86/postcar_loader.c +++ b/src/arch/x86/postcar_loader.c @@ -111,7 +111,7 @@ postcar_frame_add_mtrr(pcf, CACHE_ROM_BASE, CACHE_ROM_SIZE, type); } -void postcar_frame_common_mtrrs(struct postcar_frame *pcf) +static void postcar_frame_common_mtrrs(struct postcar_frame *pcf) { if (pcf->skip_common_mtrr) return; -- To view, visit https://review.coreboot.org/c/coreboot/+/41101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I90d308669d13eb2bebf1eca4d47e3f3b4f178714 Gerrit-Change-Number: 41101 Gerrit-PatchSet: 1 Gerrit-Owner: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: newchange

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coreboot-gerrit May 2020