coreboot-gerrit May 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/nvidia: Replace GPLv2 long form headers with SPDX header
by HAOUAS Elyes (Code Review) 08 May '20

08 May '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41133 ) Change subject: soc/nvidia: Replace GPLv2 long form headers with SPDX header ...................................................................... soc/nvidia: Replace GPLv2 long form headers with SPDX header Change-Id: I7cc9adc95af5a8fc3cd69462d49efb1550e30295 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/nvidia/tegra124/include/soc/sor.h M src/soc/nvidia/tegra210/include/soc/sor.h 2 files changed, 4 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/41133/1 diff --git a/src/soc/nvidia/tegra124/include/soc/sor.h b/src/soc/nvidia/tegra124/include/soc/sor.h index d998f84..3a9ac95d 100644 --- a/src/soc/nvidia/tegra124/include/soc/sor.h +++ b/src/soc/nvidia/tegra124/include/soc/sor.h @@ -1,17 +1,8 @@ /* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + /* * drivers/video/tegra/dc/sor_regs.h - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * */ #ifndef __TEGRA124_SOR_H__ diff --git a/src/soc/nvidia/tegra210/include/soc/sor.h b/src/soc/nvidia/tegra210/include/soc/sor.h index bb25c46..99672c3 100644 --- a/src/soc/nvidia/tegra210/include/soc/sor.h +++ b/src/soc/nvidia/tegra210/include/soc/sor.h @@ -1,17 +1,8 @@ /* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + /* * drivers/video/tegra/dc/sor_regs.h - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * */ #ifndef __TEGRA210_SOR_H__ -- To view, visit https://review.coreboot.org/c/coreboot/+/41133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7cc9adc95af5a8fc3cd69462d49efb1550e30295 Gerrit-Change-Number: 41133 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 5

Change in coreboot[master]: soc/qualcomm: Replace GPLv2 long form headers with SPDX header
by HAOUAS Elyes (Code Review) 08 May '20

08 May '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41131 ) Change subject: soc/qualcomm: Replace GPLv2 long form headers with SPDX header ...................................................................... soc/qualcomm: Replace GPLv2 long form headers with SPDX header Change-Id: Ib51e5e9c6159e9b3c2890d0455343bcc0c14b6fe Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/qualcomm/sc7180/include/soc/qupv3_config.h M src/soc/qualcomm/sc7180/qupv3_config.c 2 files changed, 2 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/41131/1 diff --git a/src/soc/qualcomm/sc7180/include/soc/qupv3_config.h b/src/soc/qualcomm/sc7180/include/soc/qupv3_config.h index 941f656..1124292 100644 --- a/src/soc/qualcomm/sc7180/include/soc/qupv3_config.h +++ b/src/soc/qualcomm/sc7180/include/soc/qupv3_config.h @@ -1,14 +1,5 @@ /* This file is part of the coreboot project. */ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef _SC7180_QUPV3_CONFIG_H_ #define _SC7180_QUPV3_CONFIG_H_ diff --git a/src/soc/qualcomm/sc7180/qupv3_config.c b/src/soc/qualcomm/sc7180/qupv3_config.c index 15b6b4d..90a4ff1 100644 --- a/src/soc/qualcomm/sc7180/qupv3_config.c +++ b/src/soc/qualcomm/sc7180/qupv3_config.c @@ -1,14 +1,5 @@ /* This file is part of the coreboot project. */ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ #include <soc/qupv3_config.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/41131 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib51e5e9c6159e9b3c2890d0455343bcc0c14b6fe Gerrit-Change-Number: 41131 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/facebook/monolith: Enable reading SPD using i2c eeprom read
by Wim Vervoorn (Code Review) 08 May '20

08 May '20

Wim Vervoorn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40943 ) Change subject: mb/facebook/monolith: Enable reading SPD using i2c eeprom read ...................................................................... mb/facebook/monolith: Enable reading SPD using i2c eeprom read Enable reading the SPD using i2c eeprom read routines to reduce boot time by 300 msec. BUG=N/A TEST=tested on facebook monolith Change-Id: Ic8995bcc9c65d05154396f7c866e95e24f263436 Signed-off-by: Wim Vervoorn <wvervoorn(a)eltan.com> --- M src/mainboard/facebook/monolith/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/40943/1 diff --git a/src/mainboard/facebook/monolith/Kconfig b/src/mainboard/facebook/monolith/Kconfig index b4b6370..e78ceb56 100644 --- a/src/mainboard/facebook/monolith/Kconfig +++ b/src/mainboard/facebook/monolith/Kconfig @@ -12,6 +12,7 @@ select MAINBOARD_USES_IFD_GBE_REGION select INTEL_GMA_HAVE_VBT select VPD + select SPD_READ_USING_I2C_READ_EEPROM config CBFS_SIZE hex "CBFS_SIZE" -- To view, visit https://review.coreboot.org/c/coreboot/+/40943 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic8995bcc9c65d05154396f7c866e95e24f263436 Gerrit-Change-Number: 40943 Gerrit-PatchSet: 1 Gerrit-Owner: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-MessageType: newchange

2 2

Change in coreboot[master]: soc/intel: Replace GPLv2 long form headers with SPDX header
by HAOUAS Elyes (Code Review) 08 May '20

08 May '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41130 ) Change subject: soc/intel: Replace GPLv2 long form headers with SPDX header ...................................................................... soc/intel: Replace GPLv2 long form headers with SPDX header Change-Id: I468d2ba85033c41ba53333ebbfd6f4108a36e407 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/apollolake/include/soc/gpio_apl.h M src/soc/intel/apollolake/include/soc/gpio_glk.h M src/soc/intel/denverton_ns/include/soc/romstage.h M src/soc/intel/icelake/me.c M src/soc/intel/tigerlake/me.c 5 files changed, 9 insertions(+), 64 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/41130/1 diff --git a/src/soc/intel/apollolake/include/soc/gpio_apl.h b/src/soc/intel/apollolake/include/soc/gpio_apl.h index 9c02b50..56cfadd 100644 --- a/src/soc/intel/apollolake/include/soc/gpio_apl.h +++ b/src/soc/intel/apollolake/include/soc/gpio_apl.h @@ -1,21 +1,11 @@ +/* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + /* * Definitions for the GPIO subsystem on Apollolake * * Placed in a separate file since some of these definitions can be used from * assembly code - * - * This file is part of the coreboot project. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #ifndef _SOC_APOLLOLAKE_GPIO_H_ diff --git a/src/soc/intel/apollolake/include/soc/gpio_glk.h b/src/soc/intel/apollolake/include/soc/gpio_glk.h index d704757..9eb3fac 100644 --- a/src/soc/intel/apollolake/include/soc/gpio_glk.h +++ b/src/soc/intel/apollolake/include/soc/gpio_glk.h @@ -1,20 +1,9 @@ +/* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + /* - * * Placed in a separate file since some of these definitions can be used from * assembly code - * - * This file is part of the coreboot project. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #ifndef _SOC_GLK_GPIO_H_ diff --git a/src/soc/intel/denverton_ns/include/soc/romstage.h b/src/soc/intel/denverton_ns/include/soc/romstage.h index 66f86ee..4b1a1e5 100644 --- a/src/soc/intel/denverton_ns/include/soc/romstage.h +++ b/src/soc/intel/denverton_ns/include/soc/romstage.h @@ -1,17 +1,5 @@ /* This file is part of the coreboot project. */ -/* - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef _SOC_DENVERTON_NS_ROMSTAGE_H_ #define _SOC_DENVERTON_NS_ROMSTAGE_H_ diff --git a/src/soc/intel/icelake/me.c b/src/soc/intel/icelake/me.c index 05ed199..dbd0b88 100644 --- a/src/soc/intel/icelake/me.c +++ b/src/soc/intel/icelake/me.c @@ -1,16 +1,5 @@ /* This file is part of the coreboot project. */ -/* - * Copyright (C) 2020 Google LLC. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ #include <bootstate.h> #include <intelblocks/cse.h> diff --git a/src/soc/intel/tigerlake/me.c b/src/soc/intel/tigerlake/me.c index a6ebcc3..6837e64 100644 --- a/src/soc/intel/tigerlake/me.c +++ b/src/soc/intel/tigerlake/me.c @@ -1,16 +1,5 @@ /* This file is part of the coreboot project. */ -/* - * Copyright (C) 2020 Google LLC. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ #include <bootstate.h> #include <intelblocks/cse.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/41130 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I468d2ba85033c41ba53333ebbfd6f4108a36e407 Gerrit-Change-Number: 41130 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: vboot: Provide declaration for verstage_mainboard_early_init()
by Furquan Shaikh (Code Review) 08 May '20

08 May '20

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41137 ) Change subject: vboot: Provide declaration for verstage_mainboard_early_init() ...................................................................... vboot: Provide declaration for verstage_mainboard_early_init() Similar to bootblock, provide declaration for verstage_mainboard_early_init() to support early mainboard initialization if verstage is run before bootblock. BUG=b:155824234 TEST=Verified that trembyle still builds Signed-off-by: Furquan Shaikh <furquan(a)google.com> Change-Id: I106213ecc1c44100f1f74071189518563ac08121 --- M src/security/vboot/vboot_common.h 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/41137/1 diff --git a/src/security/vboot/vboot_common.h b/src/security/vboot/vboot_common.h index f25ee46..a260475 100644 --- a/src/security/vboot/vboot_common.h +++ b/src/security/vboot/vboot_common.h @@ -43,6 +43,7 @@ * If the verstage is a separate stage, it should be entered via main(). */ void verstage_main(void); +void verstage_mainboard_early_init(void); void verstage_mainboard_init(void); /* Check boot modes */ -- To view, visit https://review.coreboot.org/c/coreboot/+/41137 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I106213ecc1c44100f1f74071189518563ac08121 Gerrit-Change-Number: 41137 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: soc/intel/skl: Drop `acpi_mainboard_gnvs`
by Angel Pons (Code Review) 08 May '20

08 May '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41112 ) Change subject: soc/intel/skl: Drop `acpi_mainboard_gnvs` ...................................................................... soc/intel/skl: Drop `acpi_mainboard_gnvs` Literally nobody else uses it and it does nothing. Change-Id: I7e6466137b5069a7f785972205bd43f3cb25d378 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/include/soc/acpi.h 2 files changed, 0 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/41112/1 diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 789af1d..20b60e9 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -654,7 +654,6 @@ if (gnvs) { acpi_create_gnvs(gnvs); - acpi_mainboard_gnvs(gnvs); /* And tell SMI about it */ smm_setup_structures(gnvs, NULL, NULL); @@ -707,10 +706,6 @@ return GPE0_REG_MAX; } -__weak void acpi_mainboard_gnvs(global_nvs_t *gnvs) -{ -} - const char *soc_acpi_name(const struct device *dev) { if (dev->path.type == DEVICE_PATH_DOMAIN) diff --git a/src/soc/intel/skylake/include/soc/acpi.h b/src/soc/intel/skylake/include/soc/acpi.h index 9b03697..02352f3 100644 --- a/src/soc/intel/skylake/include/soc/acpi.h +++ b/src/soc/intel/skylake/include/soc/acpi.h @@ -15,7 +15,6 @@ void acpi_fill_in_fadt(acpi_fadt_t *fadt); unsigned long acpi_madt_irq_overrides(unsigned long current); -void acpi_mainboard_gnvs(global_nvs_t *gnvs); void southbridge_inject_dsdt(const struct device *device); unsigned long southbridge_write_acpi_tables(const struct device *device, unsigned long current, struct acpi_rsdp *rsdp); -- To view, visit https://review.coreboot.org/c/coreboot/+/41112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7e6466137b5069a7f785972205bd43f3cb25d378 Gerrit-Change-Number: 41112 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/reef: add G2 TS support for snappy
by Kevin Chiu (Code Review) 08 May '20

08 May '20

Hello Kevin Chiu, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/41090 to review the following change. Change subject: mb/google/reef: add G2 TS support for snappy ...................................................................... mb/google/reef: add G2 TS support for snappy Add G2 GTCH7503 HID TS support spec from G2: G7500 / Ver.1.2 (3, April, 2018) BUG=None BRANCH=master TEST=emerge-snappy coreboot Signed-off-by: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Change-Id: I151bf141148f4f00b3dadd9c44ab3a6b7731cde1 --- M src/mainboard/google/reef/variants/snappy/devicetree.cb 1 file changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/41090/1 diff --git a/src/mainboard/google/reef/variants/snappy/devicetree.cb b/src/mainboard/google/reef/variants/snappy/devicetree.cb index 4edf739..7189508 100644 --- a/src/mainboard/google/reef/variants/snappy/devicetree.cb +++ b/src/mainboard/google/reef/variants/snappy/devicetree.cb @@ -244,6 +244,20 @@ register "hid_desc_reg_offset" = "0x20" device i2c 2c on end end + chip drivers/i2c/hid + register "generic.hid" = ""GTCH7503"" + register "generic.desc" = ""G2TOUCH Touchscreen"" + register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPIO_21_IRQ)" + register "generic.probed" = "1" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_36)" + register "generic.reset_delay_ms" = "50" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)" + register "generic.enable_delay_ms" = "1" + register "generic.has_power_resource" = "1" + register "generic.disable_gpio_export_in_crs" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 40 on end + end end # - I2C 3 device pci 17.0 on chip drivers/i2c/generic -- To view, visit https://review.coreboot.org/c/coreboot/+/41090 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I151bf141148f4f00b3dadd9c44ab3a6b7731cde1 Gerrit-Change-Number: 41090 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Kevin Chiu <kevin.chiu(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: tests: Add proper license headers
by Jan Dabros (Code Review) 08 May '20

08 May '20

Jan Dabros has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41088 ) Change subject: tests: Add proper license headers ...................................................................... tests: Add proper license headers Signed-off-by: Jan Dabros <jsd(a)semihalf.com> Change-Id: Id8ca7c53122632c674e6bf952046ea22c0408e55 --- M tests/device/Makefile.inc M tests/device/i2c-test.c M tests/lib/Makefile.inc M tests/lib/string-test.c 4 files changed, 9 insertions(+), 36 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/41088/1 diff --git a/tests/device/Makefile.inc b/tests/device/Makefile.inc index f23e72f..2bd6bb6 100644 --- a/tests/device/Makefile.inc +++ b/tests/device/Makefile.inc @@ -1,15 +1,5 @@ -## -## This file is part of the coreboot project. -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## +# SPDX-License-Identifier: GPL-2.0-only +# This file is part of the coreboot project. tests-y += i2c-test diff --git a/tests/device/i2c-test.c b/tests/device/i2c-test.c index 16e4d0d..c4fa812 100644 --- a/tests/device/i2c-test.c +++ b/tests/device/i2c-test.c @@ -1,15 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ #include <stdarg.h> #include <stddef.h> diff --git a/tests/lib/Makefile.inc b/tests/lib/Makefile.inc index 86ac323..fc2f8bc 100644 --- a/tests/lib/Makefile.inc +++ b/tests/lib/Makefile.inc @@ -1,15 +1,5 @@ -## -## This file is part of the coreboot project. -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## +# SPDX-License-Identifier: GPL-2.0-only +# This file is part of the coreboot project. # object filest should be under build/tests/ build/test/src/ build/test/run/ # two examples - first should be simply string.c, second should use -wrap diff --git a/tests/lib/string-test.c b/tests/lib/string-test.c index 210aaba..5d03d51 100644 --- a/tests/lib/string-test.c +++ b/tests/lib/string-test.c @@ -1,3 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ + #include <stdarg.h> #include <stddef.h> #include <setjmp.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/41088 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id8ca7c53122632c674e6bf952046ea22c0408e55 Gerrit-Change-Number: 41088 Gerrit-PatchSet: 1 Gerrit-Owner: Jan Dabros Gerrit-MessageType: newchange

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Change in coreboot[master]: max98373: add missing newline to printk
by Caveh Jalali (Code Review) 08 May '20

08 May '20

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41167 ) Change subject: max98373: add missing newline to printk ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/41167 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1c989729bdc71736975901566023e0057a6d0556 Gerrit-Change-Number: 41167 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Comment-Date: Fri, 08 May 2020 12:34:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/volteer: early audio subsystem selection
by Caveh Jalali (Code Review) 08 May '20

08 May '20

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41166 ) Change subject: mb/google/volteer: early audio subsystem selection ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/41166 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87e83325d2d0f57edf315e253b56bb881cf4ed18 Gerrit-Change-Number: 41166 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Comment-Date: Fri, 08 May 2020 12:30:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit May 2020