coreboot-gerrit May 2020

coreboot-gerrit@coreboot.org

1 participants
2587 discussions

Change in coreboot[master]: mb/google/volteer: add new generic SPD file
by Nick Vaccaro (Code Review) 09 May '20

09 May '20

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41149 ) Change subject: mb/google/volteer: add new generic SPD file ...................................................................... mb/google/volteer: add new generic SPD file - Adds SPD_LPDDR4X_556b_2R_64Gb_16GbD_QDP_4267.spd.hex, initially used by the MT53E2G32D4NQ-046 WT:F Micron part. BUG=b:147857288 TEST=none Change-Id: I1d16df877f00a297498daef8be43aaaea2b98b93 Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- A src/mainboard/google/volteer/spd/SPD_LPDDR4X_556b_2R_64Gb_16GbD_QDP_4267.spd.hex 1 file changed, 32 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/41149/1 diff --git a/src/mainboard/google/volteer/spd/SPD_LPDDR4X_556b_2R_64Gb_16GbD_QDP_4267.spd.hex b/src/mainboard/google/volteer/spd/SPD_LPDDR4X_556b_2R_64Gb_16GbD_QDP_4267.spd.hex new file mode 100644 index 0000000..8c45680 --- /dev/null +++ b/src/mainboard/google/volteer/spd/SPD_LPDDR4X_556b_2R_64Gb_16GbD_QDP_4267.spd.hex @@ -0,0 +1,32 @@ +23 11 11 0E 16 21 B5 08 00 00 00 00 0A 01 00 00 +49 00 04 0F 92 54 05 00 87 00 90 A8 90 E0 0B F0 +05 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 E5 00 E1 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -- To view, visit https://review.coreboot.org/c/coreboot/+/41149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d16df877f00a297498daef8be43aaaea2b98b93 Gerrit-Change-Number: 41149 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newchange

2 4

Change in coreboot[master]: mb/google/volteer: use the new generic SPDs
by Nick Vaccaro (Code Review) 09 May '20

09 May '20

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40540 ) Change subject: mb/google/volteer: use the new generic SPDs ...................................................................... mb/google/volteer: use the new generic SPDs Switch to using SPD file SPD_LPDDR4X_200b_1R_16Gb_4267 for part number K4U6E3S4AA-MGCL. Switch to using SPD file SPD_LPDDR4X_200b_2R_32Gb_4266 for part number K4UBE3D4AA-MGCR. Remove SPD_LPDDR4X_200b_8bank_1Rx16_16Gb_DDP_4267.spd.hex and SPD_LPDDR4X_200b_8bank_2Rx16_32Gb_DDP_4267.spd.hex as they're no longer needed. BUG=b:147857288 TEST="emerge-volteer coreboot chromeos-bootimage", flashed and booted a ripto and a volteer SKU4 successfully to the kernel. Change-Id: I3608968ce62c615645941d8e141a8df4cb9b41a8 Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- D src/mainboard/google/volteer/spd/SPD_LPDDR4X_200b_8bank_1Rx16_16Gb_DDP_4267.spd.hex D src/mainboard/google/volteer/spd/SPD_LPDDR4X_200b_8bank_2Rx16_32Gb_DDP_4267.spd.hex M src/mainboard/google/volteer/variants/malefor/Makefile.inc M src/mainboard/google/volteer/variants/ripto/Makefile.inc M src/mainboard/google/volteer/variants/volteer/Makefile.inc 5 files changed, 4 insertions(+), 68 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/40540/1 diff --git a/src/mainboard/google/volteer/spd/SPD_LPDDR4X_200b_8bank_1Rx16_16Gb_DDP_4267.spd.hex b/src/mainboard/google/volteer/spd/SPD_LPDDR4X_200b_8bank_1Rx16_16Gb_DDP_4267.spd.hex deleted file mode 100644 index 94f258e..0000000 --- a/src/mainboard/google/volteer/spd/SPD_LPDDR4X_200b_8bank_1Rx16_16Gb_DDP_4267.spd.hex +++ /dev/null @@ -1,32 +0,0 @@ -23 11 11 0E 15 21 95 08 00 00 00 00 02 01 00 00 -48 00 04 00 92 55 00 00 8C 00 90 A8 90 C0 08 60 -04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 7F E1 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/volteer/spd/SPD_LPDDR4X_200b_8bank_2Rx16_32Gb_DDP_4267.spd.hex b/src/mainboard/google/volteer/spd/SPD_LPDDR4X_200b_8bank_2Rx16_32Gb_DDP_4267.spd.hex deleted file mode 100644 index 90202f9..0000000 --- a/src/mainboard/google/volteer/spd/SPD_LPDDR4X_200b_8bank_2Rx16_32Gb_DDP_4267.spd.hex +++ /dev/null @@ -1,32 +0,0 @@ -23 11 11 0E 15 21 B5 08 00 00 00 00 0A 01 00 00 -48 00 04 00 92 54 05 00 87 00 90 A8 90 C0 08 60 -04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 E0 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/volteer/variants/malefor/Makefile.inc b/src/mainboard/google/volteer/variants/malefor/Makefile.inc index 8a7cbec..2c96e39 100644 --- a/src/mainboard/google/volteer/variants/malefor/Makefile.inc +++ b/src/mainboard/google/volteer/variants/malefor/Makefile.inc @@ -2,7 +2,7 @@ ## This file is part of the coreboot project. ## Memory Options -SPD_SOURCES = SPD_LPDDR4X_200b_8bank_1Rx16_16Gb_DDP_4267 # 0b0000 +SPD_SOURCES = SPD_LPDDR4X_200b_1R_16Gb_DDP_4267 # 0b0000 romstage-y += memory.c diff --git a/src/mainboard/google/volteer/variants/ripto/Makefile.inc b/src/mainboard/google/volteer/variants/ripto/Makefile.inc index ebfdbd5..1e156a8 100644 --- a/src/mainboard/google/volteer/variants/ripto/Makefile.inc +++ b/src/mainboard/google/volteer/variants/ripto/Makefile.inc @@ -12,7 +12,7 @@ ## GNU General Public License for more details. ## -SPD_SOURCES = SPD_LPDDR4X_200b_8bank_1Rx16_16Gb_DDP_4267 # 0b0000 +SPD_SOURCES = SPD_LPDDR4X_200b_1R_16Gb_DDP_4267 # 0b0000 bootblock-y += gpio.c diff --git a/src/mainboard/google/volteer/variants/volteer/Makefile.inc b/src/mainboard/google/volteer/variants/volteer/Makefile.inc index 3c3eba0..ae0275d 100644 --- a/src/mainboard/google/volteer/variants/volteer/Makefile.inc +++ b/src/mainboard/google/volteer/variants/volteer/Makefile.inc @@ -6,5 +6,5 @@ ## ## Memory Options -SPD_SOURCES = SPD_LPDDR4X_200b_8bank_1Rx16_16Gb_DDP_4267 # 0b0000 -SPD_SOURCES += SPD_LPDDR4X_200b_8bank_2Rx16_32Gb_DDP_4267 # 0b0001 +SPD_SOURCES = SPD_LPDDR4X_200b_1R_16Gb_DDP_4267 # 0b0000 +SPD_SOURCES += SPD_LPDDR4X_200b_2R_32Gb_QDP_4266 # 0b0001 -- To view, visit https://review.coreboot.org/c/coreboot/+/40540 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3608968ce62c615645941d8e141a8df4cb9b41a8 Gerrit-Change-Number: 40540 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newchange

4 18

Change in coreboot[master]: mb/google/volteer: add generic SPDs
by Nick Vaccaro (Code Review) 09 May '20

09 May '20

Nick Vaccaro has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/40463 ) Change subject: mb/google/volteer: add generic SPDs ...................................................................... Abandoned Changing direction, abandoned for 41184 -- To view, visit https://review.coreboot.org/c/coreboot/+/40463 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib4cd148e28efe458f2b312a7f1c5b6d71e8ef433 Gerrit-Change-Number: 40463 Gerrit-PatchSet: 21 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dossym Nurmukhanov <dossym(a)google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Shreesh Chhabbi <shreesh.chhabbi(a)intel.corp-partner.google.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: abandon

1 0

Change in coreboot[master]: lib/selfboot: simplify bounce buffer logic
by Stefan Reinauer (Code Review) 08 May '20

08 May '20

Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/15613 ) Change subject: lib/selfboot: simplify bounce buffer logic ...................................................................... Abandoned CB:28647 removed the bounce buffers -- To view, visit https://review.coreboot.org/c/coreboot/+/15613 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9b818f61fa7ada419c587962c98e08a9a5d99d67 Gerrit-Change-Number: 15613 Gerrit-PatchSet: 2 Gerrit-Owner: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Antonello Dettori <dev(a)dettori.io> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Raptor Engineering Automated Test Stand <noreply(a)raptorengineeringinc.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Zheng Bao <zheng.bao(a)amd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-MessageType: abandon

1 0

Change in coreboot[master]: mb/google/volteer: add generic SPDs
by Nick Vaccaro (Code Review) 08 May '20

08 May '20

Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40463 ) Change subject: mb/google/volteer: add generic SPDs ...................................................................... Patch Set 21: Code-Review-2 -- To view, visit https://review.coreboot.org/c/coreboot/+/40463 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib4cd148e28efe458f2b312a7f1c5b6d71e8ef433 Gerrit-Change-Number: 40463 Gerrit-PatchSet: 21 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dossym Nurmukhanov <dossym(a)google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Shreesh Chhabbi <shreesh.chhabbi(a)intel.corp-partner.google.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 08 May 2020 21:50:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in libgfxinit[master]: [TESTME]gma: Map dummy PTEs for buggy VT-d
by Nico Huber (Code Review) 08 May '20

08 May '20

Hello Matt DeVillier, Michael Niewöhner, I'd like you to do a code review. Please visit https://review.coreboot.org/c/libgfxinit/+/40499 to review the following change. Change subject: [TESTME]gma: Map dummy PTEs for buggy VT-d ...................................................................... [TESTME]gma: Map dummy PTEs for buggy VT-d Extend Setup_Default_GTT() to add 128 dummy page table entries after the framebuffer. Apparently the IOMMU may report spurious type 6 errors if nothing is mapped in this range. Also check for correct alignment of the start of the framebuffer and that the additonal PTEs fit into the GTT. Change-Id: I1b97c6b44c1ffb37d119541c1c97ffe21d244da8 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M common/hw-gfx-gma.adb 1 file changed, 18 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/99/40499/1 diff --git a/common/hw-gfx-gma.adb b/common/hw-gfx-gma.adb index be623e4..083b83c 100644 --- a/common/hw-gfx-gma.adb +++ b/common/hw-gfx-gma.adb @@ -603,9 +603,10 @@ function Valid_FB (FB : Framebuffer_Type) return Boolean is (Valid_Stride (FB) and FB_First_Page (FB) in GTT_Range and - FB_Last_Page (FB) in GTT_Range and + FB_Last_Page (FB) + 128 in GTT_Range and (not Rotation_90 (FB) or - (FB_Last_Page (FB) + GTT_Rotation_Offset in GTT_Range and + (FB_First_Page (FB) mod 64 = 0 and + FB_Last_Page (FB) + 128 + GTT_Rotation_Offset in GTT_Range and FB.Offset >= Word32 (GTT_Rotation_Offset) * GTT_Page_Size))); -- Also check that we don't overflow the GTT's 39-bit space @@ -650,6 +651,10 @@ Valid => True); Phys_Addr := Phys_Addr + GTT_Page_Size; end loop; + -- Add another 128 dummy pages to workaround buggy VT-d + for Idx in FB_Last_Page (FB) + 1 .. FB_Last_Page (FB) + 128 loop + Registers.Write_GTT (Idx, Phys_Addr, True); + end loop; if Rotation_90 (FB) and FB.Tiling = Y_Tiled and FB.V_Stride >= 32 then declare @@ -673,6 +678,10 @@ end if; end loop; end; + -- Add another 128 dummy pages to workaround buggy VT-d + for Idx in FB_Last_Page (FB) + 1 .. FB_Last_Page (FB) + 128 loop + Registers.Write_GTT (GTT_Rotation_Offset + Idx, Phys_Addr, True); + end loop; end if; end Setup_Default_GTT; @@ -752,6 +761,9 @@ Pre => Is_Initialized, Post => (if Valid then Valid_FB (FB)) is + GTT_Off : constant Natural := + (if Rotation_90 (FB) then GTT_Rotation_Offset else 0); + GTT_Size, Aperture_Size : Natural; Stolen_Size : Stolen_Size_Range; begin @@ -761,8 +773,10 @@ Decode_Stolen (GTT_Size, Stolen_Size); Dev.Resource_Size (Aperture_Size, PCI.Res2); Valid := - FB_Last_Page (FB) < GTT_Size / Config.GTT_PTE_Size and - FB_Last_Page (FB) < Natural (Stolen_Size / GTT_Page_Size) and + FB_Last_Page (FB) + 128 + GTT_Off < GTT_Size / Config.GTT_PTE_Size + and + FB_Last_Page (FB) < Natural (Stolen_Size / GTT_Page_Size) + and FB_Last_Page (FB) < Aperture_Size / GTT_Page_Size; pragma Debug (not Valid, Debug.Put_Line ("Stolen memory too small to hold framebuffer.")); -- To view, visit https://review.coreboot.org/c/libgfxinit/+/40499 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: I1b97c6b44c1ffb37d119541c1c97ffe21d244da8 Gerrit-Change-Number: 40499 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-MessageType: newchange

5 14

Change in coreboot[master]: soc/intel: Add acpi support for enabling GbE
by Varun Joshi (Code Review) 08 May '20

08 May '20

Hello Varun Joshi, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/40896 to review the following change. Change subject: soc/intel: Add acpi support for enabling GbE ...................................................................... soc/intel: Add acpi support for enabling GbE -Provides acpi irq info for enabling GbE Signed-off-by: Varun Joshi <varun.joshi(a)intel.corp-partner.google.com> Change-Id: I1e6ad3e38f001e934742df4bdc5de2f6b8a0f8b6 --- M src/soc/intel/tigerlake/acpi/pci_irqs.asl M src/soc/intel/tigerlake/include/soc/irq.h 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/40896/1 diff --git a/src/soc/intel/tigerlake/acpi/pci_irqs.asl b/src/soc/intel/tigerlake/acpi/pci_irqs.asl index 62520b1..865f91a 100644 --- a/src/soc/intel/tigerlake/acpi/pci_irqs.asl +++ b/src/soc/intel/tigerlake/acpi/pci_irqs.asl @@ -17,6 +17,7 @@ Name (PICP, Package () { /* D31:HDA, SMBUS, TraceHUB */ + Package(){0x001FFFFF, 0, 0, GbE_INTA_IRQ }, Package(){0x001FFFFF, 3, 0, HDA_IRQ }, Package(){0x001FFFFF, 4, 0, SMBUS_IRQ }, Package(){0x001FFFFF, 7, 0, TRACEHUB_IRQ }, diff --git a/src/soc/intel/tigerlake/include/soc/irq.h b/src/soc/intel/tigerlake/include/soc/irq.h index 01ee10b..7768fec 100644 --- a/src/soc/intel/tigerlake/include/soc/irq.h +++ b/src/soc/intel/tigerlake/include/soc/irq.h @@ -27,6 +27,7 @@ #define HDA_IRQ 16 #define SMBUS_IRQ 16 #define TRACEHUB_IRQ 16 +#define GbE_INTA_IRQ 16 #define PCIE_1_IRQ 16 #define PCIE_2_IRQ 17 -- To view, visit https://review.coreboot.org/c/coreboot/+/40896 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e6ad3e38f001e934742df4bdc5de2f6b8a0f8b6 Gerrit-Change-Number: 40896 Gerrit-PatchSet: 1 Gerrit-Owner: Varun Joshi <varun.joshi(a)intel.com> Gerrit-Reviewer: Varun Joshi <varun.joshi(a)intel.corp-partner.google.com> Gerrit-MessageType: newchange

3 6

Change in coreboot[master]: mb/google/volteer: add generic SPDs
by Nick Vaccaro (Code Review) 08 May '20

08 May '20

Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40463 ) Change subject: mb/google/volteer: add generic SPDs ...................................................................... Patch Set 21: (1 comment) https://review.coreboot.org/c/coreboot/+/40463/20//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/40463/20//COMMIT_MSG@7 PS20, Line 7: generic SPDs > Please see: https://docs.google. […] Done. I removed all of the ones that aren't currently needed. -- To view, visit https://review.coreboot.org/c/coreboot/+/40463 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib4cd148e28efe458f2b312a7f1c5b6d71e8ef433 Gerrit-Change-Number: 40463 Gerrit-PatchSet: 21 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dossym Nurmukhanov <dossym(a)google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Shreesh Chhabbi <shreesh.chhabbi(a)intel.corp-partner.google.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 08 May 2020 20:58:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/volteer: add generic SPDs
by Nick Vaccaro (Code Review) 08 May '20

08 May '20

Hello build bot (Jenkins), Furquan Shaikh, Caveh Jalali, Duncan Laurie, Dossym Nurmukhanov, Srinidhi N Kaushik, Raj Astekar, Shreesh Chhabbi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/40463 to look at the new patch set (#21). Change subject: mb/google/volteer: add generic SPDs ...................................................................... mb/google/volteer: add generic SPDs Adds two new generic SPDs: - SPD_LPDDR4X_200b_1R_16Gb_DDP_4267.spd.hex, initially used for the K4U6E3S4AA-MGCL Samsung memory part - SPD_LPDDR4X_200b_2R_32Gb_87MinCAS_QDP_4267.spd.hex, initially used for the K4UBE3D4AA-MGCL Samsung memory part BUG=b:147857288 TEST=none Change-Id: Ib4cd148e28efe458f2b312a7f1c5b6d71e8ef433 Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- A src/mainboard/google/volteer/spd/SPD_LPDDR4X_200b_1R_16Gb_DDP_4267.spd.hex A src/mainboard/google/volteer/spd/SPD_LPDDR4X_200b_2R_32Gb_87MinCAS_QDP_4267.spd.hex 2 files changed, 64 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/40463/21 -- To view, visit https://review.coreboot.org/c/coreboot/+/40463 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib4cd148e28efe458f2b312a7f1c5b6d71e8ef433 Gerrit-Change-Number: 40463 Gerrit-PatchSet: 21 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dossym Nurmukhanov <dossym(a)google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Shreesh Chhabbi <shreesh.chhabbi(a)intel.corp-partner.google.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/volteer: add generic SPDs
by Furquan Shaikh (Code Review) 08 May '20

08 May '20

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40463 ) Change subject: mb/google/volteer: add generic SPDs ...................................................................... Patch Set 20: (1 comment) https://review.coreboot.org/c/coreboot/+/40463/20//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/40463/20//COMMIT_MSG@7 PS20, Line 7: generic SPDs Please see: https://docs.google.com/document/d/1tbNSi8L9biJJhBiMJdum3B90p7EPFMXqsyJvnvs… -- To view, visit https://review.coreboot.org/c/coreboot/+/40463 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib4cd148e28efe458f2b312a7f1c5b6d71e8ef433 Gerrit-Change-Number: 40463 Gerrit-PatchSet: 20 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dossym Nurmukhanov <dossym(a)google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Shreesh Chhabbi <shreesh.chhabbi(a)intel.corp-partner.google.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 08 May 2020 19:57:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit May 2020