coreboot-gerrit May 2020

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Change in coreboot[master]: soc/intel/jasperlake: Add SATA related UPDs configuration
by Ronak Kanabar (Code Review) 11 May '20

11 May '20

Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41029 ) Change subject: soc/intel/jasperlake: Add SATA related UPDs configuration ...................................................................... Patch Set 11: (1 comment) https://review.coreboot.org/c/coreboot/+/41029/4//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/41029/4//COMMIT_MSG@11 PS4, Line 11: it can be set as per each board's requirement. > can I mark it resolved ? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/41029 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f7e7508b8cd483508293ee3e7b760574d8f025f Gerrit-Change-Number: 41029 Gerrit-PatchSet: 11 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Mon, 11 May 2020 05:43:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Comment-In-Reply-To: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/jasperlake: Add SATA related UPDs configuration
by Ronak Kanabar (Code Review) 11 May '20

11 May '20

Hello build bot (Jenkins), Patrick Georgi, Maulik V Vaghela, Subrata Banik, Aamir Bohra, Patrick Rudolph, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41029 to look at the new patch set (#11). Change subject: soc/intel/jasperlake: Add SATA related UPDs configuration ...................................................................... soc/intel/jasperlake: Add SATA related UPDs configuration This patch control SATA related UPDs based on the devicetree configuration as per each board's requirement. BUG=b:155595624 BRANCH=None TEST=Build, boot JSLRVP, Verified UPD values from FSP log Change-Id: I4f7e7508b8cd483508293ee3e7b760574d8f025f Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/soc/intel/jasperlake/chip.h M src/soc/intel/jasperlake/fsp_params.c 2 files changed, 14 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/41029/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/41029 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f7e7508b8cd483508293ee3e7b760574d8f025f Gerrit-Change-Number: 41029 Gerrit-PatchSet: 11 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/jasperlake: Add SATA related UPDs configuration
by Ronak Kanabar (Code Review) 11 May '20

11 May '20

Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41029 ) Change subject: soc/intel/jasperlake: Add SATA related UPDs configuration ...................................................................... Patch Set 10: (3 comments) > Patch Set 8: > > (2 comments) https://review.coreboot.org/c/coreboot/+/41029/8//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/41029/8//COMMIT_MSG@7 PS8, Line 7: Sata > nit: SATA? Done https://review.coreboot.org/c/coreboot/+/41029/8//COMMIT_MSG@9 PS8, Line 9: This patch will allow to control Sata related UPDs from devicetree so : that UPD values can be configure as per each board's requirement. > nit: This patch control SATA related UPDs based on the device tree cofiguration. Done https://review.coreboot.org/c/coreboot/+/41029/6/src/soc/intel/jasperlake/f… File src/soc/intel/jasperlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/41029/6/src/soc/intel/jasperlake/f… PS6, Line 139: dev->enabled > Now that SataEnable is dropped here, it should also be dropped from chip.h? https://review.coreboot. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/41029 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f7e7508b8cd483508293ee3e7b760574d8f025f Gerrit-Change-Number: 41029 Gerrit-PatchSet: 10 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Mon, 11 May 2020 05:24:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Comment-In-Reply-To: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/jasperlake: Add SATA related UPDs configuration
by Ronak Kanabar (Code Review) 11 May '20

11 May '20

Hello build bot (Jenkins), Patrick Georgi, Maulik V Vaghela, Subrata Banik, Aamir Bohra, Patrick Rudolph, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41029 to look at the new patch set (#10). Change subject: soc/intel/jasperlake: Add SATA related UPDs configuration ...................................................................... soc/intel/jasperlake: Add SATA related UPDs configuration This patch control SATA related UPDs based on the devicetree cofiguration as per each board's requirement. BUG=b:155595624 BRANCH=None TEST=Build, boot JSLRVP, Verified UPD values from FSP log Change-Id: I4f7e7508b8cd483508293ee3e7b760574d8f025f Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/soc/intel/jasperlake/chip.h M src/soc/intel/jasperlake/fsp_params.c 2 files changed, 14 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/41029/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/41029 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f7e7508b8cd483508293ee3e7b760574d8f025f Gerrit-Change-Number: 41029 Gerrit-PatchSet: 10 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/jasperlake: Add Sata related UPDs configuration
by Ronak Kanabar (Code Review) 11 May '20

11 May '20

Hello build bot (Jenkins), Patrick Georgi, Maulik V Vaghela, Subrata Banik, Aamir Bohra, Patrick Rudolph, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41029 to look at the new patch set (#9). Change subject: soc/intel/jasperlake: Add Sata related UPDs configuration ...................................................................... soc/intel/jasperlake: Add Sata related UPDs configuration This patch will allow to control Sata related UPDs from devicetree so that UPD values can be configure as per each board's requirement. BUG=b:155595624 BRANCH=None TEST=Build, boot JSLRVP, Verified UPD values from FSP log Change-Id: I4f7e7508b8cd483508293ee3e7b760574d8f025f Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/soc/intel/jasperlake/chip.h M src/soc/intel/jasperlake/fsp_params.c 2 files changed, 14 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/41029/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/41029 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f7e7508b8cd483508293ee3e7b760574d8f025f Gerrit-Change-Number: 41029 Gerrit-PatchSet: 9 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/jasperlake: Add function to display ME firmware status info...
by Aamir Bohra (Code Review) 11 May '20

11 May '20

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40570 ) Change subject: soc/intel/jasperlake: Add function to display ME firmware status information ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/40570 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6b1c9410db8f06ac24fd997772b2ede04264bee Gerrit-Change-Number: 40570 Gerrit-PatchSet: 2 Gerrit-Owner: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Comment-Date: Mon, 11 May 2020 02:50:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard/google/kahlee: support Realtek RTL8822CE WLAN
by Kevin Chiu (Code Review) 10 May '20

10 May '20

Kevin Chiu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40805 ) Change subject: mainboard/google/kahlee: support Realtek RTL8822CE WLAN ...................................................................... mainboard/google/kahlee: support Realtek RTL8822CE WLAN gpio70 is assigned to use as WLAN rst in new schematic to fullful RTK RTL8822CE power sequence: WLAN rst will need to be active at least 50ms after WLAN power on. Also in order to keep the rst low in consistency, change default gpio70 to low. BUG=b:154357210 BRANCH=master TEST=emerge-grunt coreboot Change-Id: I98c8afe42b7f92016f83483acbb3b9ae64b159f7 Signed-off-by: Kevin Chiu <Kevin.Chiu(a)quantatw.com> --- M src/mainboard/google/kahlee/variants/baseboard/gpio.c M src/mainboard/google/kahlee/variants/careena/variant.c 2 files changed, 8 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/40805/1 diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c index 4fb60b1..e5c02d5 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c +++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c @@ -43,7 +43,7 @@ PAD_GPO(GPIO_40, LOW), /* GPIO_70 - WLAN_PE_RST_L */ - PAD_GPO(GPIO_70, HIGH), + PAD_GPO(GPIO_70, LOW), /* GPIO_74 - LPC_CLK0_EC_R */ PAD_NF(GPIO_74, LPCCLK0, PULL_DOWN), diff --git a/src/mainboard/google/kahlee/variants/careena/variant.c b/src/mainboard/google/kahlee/variants/careena/variant.c index d35ec48..fb71b9f 100644 --- a/src/mainboard/google/kahlee/variants/careena/variant.c +++ b/src/mainboard/google/kahlee/variants/careena/variant.c @@ -16,6 +16,8 @@ #include <ec/google/chromeec/ec.h> #include <baseboard/variants.h> #include <variant/sku.h> +#include <gpio.h> +#include <variant/gpio.h> void variant_romstage_entry(int s3_resume) { @@ -35,4 +37,9 @@ break; } } + + /* Config WLAN RST - GPIO70 PU: release RST */ + /* From RTK RTL8822CE spec, WLAN RST needs to be active */ + /* at least 50 ms since WLAN power on */ + gpio_set(GPIO_70, 1); } -- To view, visit https://review.coreboot.org/c/coreboot/+/40805 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I98c8afe42b7f92016f83483acbb3b9ae64b159f7 Gerrit-Change-Number: 40805 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/kahlee: Don't reset the touchpad/screen on boot
by Martin Roth (Code Review) 10 May '20

10 May '20

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41063 ) Change subject: mb/google/kahlee: Don't reset the touchpad/screen on boot ...................................................................... mb/google/kahlee: Don't reset the touchpad/screen on boot touchpad & touchscreen power enable gets reset during resume causing unintended wake interrupts, causing dark resume failures. This prevents the board from being shut down after it's been suspended for a long period of time and can end up draining the battery. BUG=b:153173717 TEST=Build only - Needs to be tested by ODMs. Signed-off-by: Martin Roth <martin(a)coreboot.org> Change-Id: If403da8853e59eaaf589062c9bd6f10deb626998 --- M src/mainboard/google/kahlee/variants/baseboard/gpio.c 1 file changed, 0 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/41063/1 diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c index fe0744a..72db0a2 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c +++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c @@ -26,10 +26,6 @@ /* GPIO_15 - EC_IN_RW_OD */ PAD_GPI(GPIO_15, PULL_UP), - /* GPIO_12 - EN_PP3300_TRACKPAD */ - /* Init low to reset the chip */ - PAD_GPO(GPIO_12, LOW), - /* GPIO_22 - EC_SCI_ODL, SCI */ PAD_SCI(GPIO_22, PULL_UP, EDGE_LOW), @@ -45,10 +41,6 @@ /* GPIO_74 - LPC_CLK0_EC_R */ PAD_NF(GPIO_74, LPCCLK0, PULL_DOWN), - /* GPIO_76 - EN_PP3300_TOUCHSCREEN */ - /* Init low to reset the chip */ - PAD_GPO(GPIO_76, LOW), - /* GPIO_92 - WLAN_PCIE_CLKREQ_3V3_ODL */ PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP), -- To view, visit https://review.coreboot.org/c/coreboot/+/41063 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If403da8853e59eaaf589062c9bd6f10deb626998 Gerrit-Change-Number: 41063 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: src/payloads: Replace remaining GPLv2 long form headers with SPDX header
by HAOUAS Elyes (Code Review) 10 May '20

10 May '20

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41196 ) Change subject: src/payloads: Replace remaining GPLv2 long form headers with SPDX header ...................................................................... src/payloads: Replace remaining GPLv2 long form headers with SPDX header Change-Id: Ibc5394ef5e4bb2171711b7b8e75a68555ab70b6e Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M payloads/coreinfo/cbfs_module.c M payloads/coreinfo/coreboot_module.c M payloads/coreinfo/coreinfo.c M payloads/coreinfo/coreinfo.h M payloads/coreinfo/cpuid.S M payloads/coreinfo/cpuinfo_module.c M payloads/coreinfo/multiboot_module.c M payloads/coreinfo/nvram_module.c M payloads/coreinfo/pci_module.c M payloads/coreinfo/ramdump_module.c M payloads/coreinfo/timestamps_module.c M payloads/libpayload/arch/x86/string.c M payloads/libpayload/curses/PDCurses/doc/manext.c M payloads/libpayload/drivers/udc/dwc2.c M payloads/libpayload/drivers/udc/dwc2_priv.h M payloads/libpayload/drivers/usb/dwc2.c M payloads/libpayload/drivers/usb/dwc2.h M payloads/libpayload/drivers/usb/dwc2_private.h M payloads/libpayload/drivers/usb/dwc2_rh.c M payloads/libpayload/include/arm/arch/asm.h M payloads/libpayload/include/compiler.h M payloads/libpayload/include/udc/dwc2_udc.h M payloads/libpayload/include/usb/dwc2_registers.h M payloads/linuxcheck/i386.c M payloads/linuxcheck/linuxcheck.c M payloads/linuxcheck/linuxcheck.h M payloads/nvramcui/nvramcui.c 27 files changed, 59 insertions(+), 391 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/41196/1 diff --git a/payloads/coreinfo/cbfs_module.c b/payloads/coreinfo/cbfs_module.c index e7cfc8c..f634084 100644 --- a/payloads/coreinfo/cbfs_module.c +++ b/payloads/coreinfo/cbfs_module.c @@ -1,17 +1,5 @@ -/* - * This file is part of the coreinfo project. - * - * Copyright (C) 2009 Uwe Hermann <uwe(a)hermann-uwe.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreinfo project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #include "coreinfo.h" #include "endian.h" diff --git a/payloads/coreinfo/coreboot_module.c b/payloads/coreinfo/coreboot_module.c index e56ce68..c21babb 100644 --- a/payloads/coreinfo/coreboot_module.c +++ b/payloads/coreinfo/coreboot_module.c @@ -1,17 +1,5 @@ -/* - * This file is part of the coreinfo project. - * - * Copyright (C) 2008 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreinfo project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #include "coreinfo.h" #include <coreboot_tables.h> diff --git a/payloads/coreinfo/coreinfo.c b/payloads/coreinfo/coreinfo.c index b1017f0..5f646c5 100644 --- a/payloads/coreinfo/coreinfo.c +++ b/payloads/coreinfo/coreinfo.c @@ -1,17 +1,5 @@ -/* - * This file is part of the coreinfo project. - * - * Copyright (C) 2008 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreinfo project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #include "coreinfo.h" diff --git a/payloads/coreinfo/coreinfo.h b/payloads/coreinfo/coreinfo.h index 03e59c9..a1d43cd 100644 --- a/payloads/coreinfo/coreinfo.h +++ b/payloads/coreinfo/coreinfo.h @@ -1,17 +1,5 @@ -/* - * This file is part of the coreinfo project. - * - * Copyright (C) 2008 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreinfo project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #ifndef COREINFO_H_ #define COREINFO_H_ diff --git a/payloads/coreinfo/cpuid.S b/payloads/coreinfo/cpuid.S index d98bd2c..0f06bc4 100644 --- a/payloads/coreinfo/cpuid.S +++ b/payloads/coreinfo/cpuid.S @@ -1,19 +1,7 @@ -/* - * This file is part of the coreinfo project. - * - * It is derived from the x86info project, which is GPLv2-licensed. - * - * Copyright (C) 2001-2007 Dave Jones <davej(a)codemonkey.org.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreinfo project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* It is derived from the x86info project, which is GPLv2-licensed.*/ /* calling syntax: docpuid(idx,eax,ebx,ecx,edx) */ diff --git a/payloads/coreinfo/cpuinfo_module.c b/payloads/coreinfo/cpuinfo_module.c index 2b833a9..0604403 100644 --- a/payloads/coreinfo/cpuinfo_module.c +++ b/payloads/coreinfo/cpuinfo_module.c @@ -1,20 +1,7 @@ -/* - * This file is part of the coreinfo project. - * - * It is derived from the x86info project, which is GPLv2-licensed. - * - * Copyright (C) 2001-2007 Dave Jones <davej(a)codemonkey.org.uk> - * Copyright (C) 2008 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreinfo project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* It is derived from the x86info project, which is GPLv2-licensed. */ #include "coreinfo.h" diff --git a/payloads/coreinfo/multiboot_module.c b/payloads/coreinfo/multiboot_module.c index 865561d..6df0ffe 100644 --- a/payloads/coreinfo/multiboot_module.c +++ b/payloads/coreinfo/multiboot_module.c @@ -1,17 +1,5 @@ -/* - * This file is part of the coreinfo project. - * - * Copyright (C) 2008 Jordan Crouse <jordan(a)cosmicpenguin.net> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreinfo project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #include <multiboot_tables.h> #include "coreinfo.h" diff --git a/payloads/coreinfo/nvram_module.c b/payloads/coreinfo/nvram_module.c index 45edfb3..23d1638 100644 --- a/payloads/coreinfo/nvram_module.c +++ b/payloads/coreinfo/nvram_module.c @@ -1,17 +1,5 @@ -/* - * This file is part of the coreinfo project. - * - * Copyright (C) 2008 Uwe Hermann <uwe(a)hermann-uwe.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreinfo project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #include "coreinfo.h" diff --git a/payloads/coreinfo/pci_module.c b/payloads/coreinfo/pci_module.c index cb53ed6..0b3a373 100644 --- a/payloads/coreinfo/pci_module.c +++ b/payloads/coreinfo/pci_module.c @@ -1,17 +1,5 @@ -/* - * This file is part of the coreinfo project. - * - * Copyright (C) 2008 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreinfo project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #include <arch/io.h> #include <pci.h> diff --git a/payloads/coreinfo/ramdump_module.c b/payloads/coreinfo/ramdump_module.c index 28d7a03..128ef26 100644 --- a/payloads/coreinfo/ramdump_module.c +++ b/payloads/coreinfo/ramdump_module.c @@ -1,17 +1,5 @@ -/* - * This file is part of the coreinfo project. - * - * Copyright (C) 2008 Uwe Hermann <uwe(a)hermann-uwe.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreinfo project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #include "coreinfo.h" diff --git a/payloads/coreinfo/timestamps_module.c b/payloads/coreinfo/timestamps_module.c index 5468844..082d837 100644 --- a/payloads/coreinfo/timestamps_module.c +++ b/payloads/coreinfo/timestamps_module.c @@ -1,15 +1,5 @@ -/* - * This file is part of the coreinfo project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreinfo project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #include "coreinfo.h" #include <commonlib/timestamp_serialized.h> diff --git a/payloads/libpayload/arch/x86/string.c b/payloads/libpayload/arch/x86/string.c index 2e38f94..17b32ab 100644 --- a/payloads/libpayload/arch/x86/string.c +++ b/payloads/libpayload/arch/x86/string.c @@ -1,18 +1,5 @@ -/* - * Copyright (C) 1991,1992,1993,1997,1998,2003, 2005 Free Software Foundation, Inc. - * This file is part of the GNU C Library. - * Copyright (c) 2011 The Chromium OS Authors. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* From glibc-2.14, sysdeps/i386/memset.c */ diff --git a/payloads/libpayload/curses/PDCurses/doc/manext.c b/payloads/libpayload/curses/PDCurses/doc/manext.c index 4ce7cbf..2a55f95 100644 --- a/payloads/libpayload/curses/PDCurses/doc/manext.c +++ b/payloads/libpayload/curses/PDCurses/doc/manext.c @@ -1,28 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + /***********************************************************************/ /* MANEXT - Extract manual pages from C source code. */ /***********************************************************************/ -/* - * MANEXT - A program to extract manual pages from C source code. - * Copyright (C) 1991-1996 Mark Hessling - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * If you make modifications to this software that you feel increases - * it usefulness for the rest of the community, please email the - * changes, enhancements, bug fixes as well as any and all ideas to me. - * This software is going to be maintained and enhanced as deemed - * necessary by the community. - * - * Mark Hessling <mark(a)rexx.org> - */ #include <stdio.h> #include <stdlib.h> diff --git a/payloads/libpayload/drivers/udc/dwc2.c b/payloads/libpayload/drivers/udc/dwc2.c index 025c071..546c68c 100644 --- a/payloads/libpayload/drivers/udc/dwc2.c +++ b/payloads/libpayload/drivers/udc/dwc2.c @@ -1,17 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Rockchip Electronics - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #include <libpayload.h> #include <assert.h> diff --git a/payloads/libpayload/drivers/udc/dwc2_priv.h b/payloads/libpayload/drivers/udc/dwc2_priv.h index ec9f092..80fe1be 100644 --- a/payloads/libpayload/drivers/udc/dwc2_priv.h +++ b/payloads/libpayload/drivers/udc/dwc2_priv.h @@ -1,17 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Rockchip Electronics - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #ifndef __DWC2_PRIV_H__ #define __DWC2_PRIV_H__ diff --git a/payloads/libpayload/drivers/usb/dwc2.c b/payloads/libpayload/drivers/usb/dwc2.c index eef486b..c533918 100644 --- a/payloads/libpayload/drivers/usb/dwc2.c +++ b/payloads/libpayload/drivers/usb/dwc2.c @@ -1,17 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Rockchip Electronics - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #include <libpayload.h> #include <arch/cache.h> diff --git a/payloads/libpayload/drivers/usb/dwc2.h b/payloads/libpayload/drivers/usb/dwc2.h index 868c1a8..c2757ca 100644 --- a/payloads/libpayload/drivers/usb/dwc2.h +++ b/payloads/libpayload/drivers/usb/dwc2.h @@ -1,17 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Rockchip Electronics - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #ifndef __DWC2_HCD_H__ #define __DWC2_HCD_H__ diff --git a/payloads/libpayload/drivers/usb/dwc2_private.h b/payloads/libpayload/drivers/usb/dwc2_private.h index e907ab4..df0f969 100644 --- a/payloads/libpayload/drivers/usb/dwc2_private.h +++ b/payloads/libpayload/drivers/usb/dwc2_private.h @@ -1,17 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Rockchip Electronics - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #ifndef __DWC2_REGS_H__ #define __DWC2_REGS_H__ diff --git a/payloads/libpayload/drivers/usb/dwc2_rh.c b/payloads/libpayload/drivers/usb/dwc2_rh.c index 304927f..7df4627 100644 --- a/payloads/libpayload/drivers/usb/dwc2_rh.c +++ b/payloads/libpayload/drivers/usb/dwc2_rh.c @@ -1,18 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Rockchip Electronics - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - +/* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #include <usb/usb.h> #include "generic_hub.h" diff --git a/payloads/libpayload/include/arm/arch/asm.h b/payloads/libpayload/include/arm/arch/asm.h index faab501..83a1785 100644 --- a/payloads/libpayload/include/arm/arch/asm.h +++ b/payloads/libpayload/include/arm/arch/asm.h @@ -1,17 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #ifndef __ARM_ASM_H #define __ARM_ASM_H diff --git a/payloads/libpayload/include/compiler.h b/payloads/libpayload/include/compiler.h index fa9c78b..19e6ee6 100644 --- a/payloads/libpayload/include/compiler.h +++ b/payloads/libpayload/include/compiler.h @@ -1,17 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2017 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #ifndef __COMPILER_H__ #define __COMPILER_H__ diff --git a/payloads/libpayload/include/udc/dwc2_udc.h b/payloads/libpayload/include/udc/dwc2_udc.h index e3881f4..9a99d6b 100644 --- a/payloads/libpayload/include/udc/dwc2_udc.h +++ b/payloads/libpayload/include/udc/dwc2_udc.h @@ -1,17 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Rockchip Electronics - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #ifndef __DESIGNWARE_H__ #define __DESIGNWARE_H__ diff --git a/payloads/libpayload/include/usb/dwc2_registers.h b/payloads/libpayload/include/usb/dwc2_registers.h index a4f274c..e844fd6 100644 --- a/payloads/libpayload/include/usb/dwc2_registers.h +++ b/payloads/libpayload/include/usb/dwc2_registers.h @@ -1,17 +1,6 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Rockchip Electronics - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ + #ifndef __DWC2_REGISTERS__ #define __DWC2_REGISTERS__ diff --git a/payloads/linuxcheck/i386.c b/payloads/linuxcheck/i386.c index 2b4b541..53f2b4b 100644 --- a/payloads/linuxcheck/i386.c +++ b/payloads/linuxcheck/i386.c @@ -1,17 +1,5 @@ -/* - * This file is part of the coreinfo project. - * - * Copyright (C) 2018 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreinfo project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #include <libpayload-config.h> #include <libpayload.h> diff --git a/payloads/linuxcheck/linuxcheck.c b/payloads/linuxcheck/linuxcheck.c index 5e0fdba..0f53398 100644 --- a/payloads/linuxcheck/linuxcheck.c +++ b/payloads/linuxcheck/linuxcheck.c @@ -1,17 +1,5 @@ -/* - * This file is part of the coreinfo project. - * - * Copyright (C) 2018 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreinfo project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #include <libpayload-config.h> #include <libpayload.h> diff --git a/payloads/linuxcheck/linuxcheck.h b/payloads/linuxcheck/linuxcheck.h index b707876..e7f0439 100644 --- a/payloads/linuxcheck/linuxcheck.h +++ b/payloads/linuxcheck/linuxcheck.h @@ -1,17 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2018 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ /* buts is a programmed IO byte puts, which you need to write for all platforms. */ void buts(char *s); diff --git a/payloads/nvramcui/nvramcui.c b/payloads/nvramcui/nvramcui.c index 453b9aa..fa5eafa 100644 --- a/payloads/nvramcui/nvramcui.c +++ b/payloads/nvramcui/nvramcui.c @@ -1,17 +1,5 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 secunet Security Networks AG - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +/* This file is part of the coreboot project. */ +/* SPDX-License-Identifier: GPL-2.0-only */ #include <coreboot_tables.h> #include <libpayload.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/41196 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc5394ef5e4bb2171711b7b8e75a68555ab70b6e Gerrit-Change-Number: 41196 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: arch/x86: Support x86_64 exceptions
by Raul Rangel (Code Review) 10 May '20

10 May '20

Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30117 ) Change subject: arch/x86: Support x86_64 exceptions ...................................................................... Patch Set 30: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30117 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idd12c90a95cc2989eb9b2a718740a84222193f48 Gerrit-Change-Number: 30117 Gerrit-PatchSet: 30 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sun, 10 May 2020 13:35:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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