coreboot-gerrit May 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: lib/spd_bin: add get_spd_sn function
by Tim Wawrzynczak (Code Review) 07 May '20

07 May '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40414 ) Change subject: lib/spd_bin: add get_spd_sn function ...................................................................... Patch Set 6: (2 comments) https://review.coreboot.org/c/coreboot/+/40414/6/src/soc/intel/common/block… File src/soc/intel/common/block/smbus/smbuslib.c: https://review.coreboot.org/c/coreboot/+/40414/6/src/soc/intel/common/block… PS6, Line 119: } else if (dram_type == SPD_DRAM_DDR3) If any branch of an if/else if/else has more than one statement and uses braces {}, then all branches need to use them as well. https://review.coreboot.org/c/coreboot/+/40414/6/src/soc/intel/common/block… PS6, Line 126: } nit: blank line after } -- To view, visit https://review.coreboot.org/c/coreboot/+/40414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I406bba7cc56debbd9851d430f069e4fb96ec937c Gerrit-Change-Number: 40414 Gerrit-PatchSet: 6 Gerrit-Owner: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 07 May 2020 20:55:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/sconfig: Add LPC and ESPI buses
by Felix Held (Code Review) 07 May '20

07 May '20

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41099 ) Change subject: util/sconfig: Add LPC and ESPI buses ...................................................................... Patch Set 3: haven't looked at the details, but i like where this is going -- To view, visit https://review.coreboot.org/c/coreboot/+/41099 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c2f40813c05680f72e5f30cbb13617e8f994841 Gerrit-Change-Number: 41099 Gerrit-PatchSet: 3 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 07 May 2020 20:07:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/clevo/n141cu: Add new Comet Lake mainboard
by Felix Singer (Code Review) 07 May '20

07 May '20

Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40581 ) Change subject: mb/clevo/n141cu: Add new Comet Lake mainboard ...................................................................... Patch Set 36: (4 comments) https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… File src/mainboard/clevo/cml-u/Kconfig: https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… PS34, Line 14: # select MAINBOARD_HAS_LIBGFXINIT > if libgfxinit doesn't support CML, then this should be dropped Done https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… PS34, Line 18: ONBOARD_VGA_IS_PRIMARY > is this needed? Done https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… File src/mainboard/clevo/cml-u/Makefile.inc: https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… PS34, Line 8: ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads > if libgfxinit doesn't support CML, then this should be dropped Done https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… File src/mainboard/clevo/cml-u/variants/n141cu/gma-mainboard.ads: https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… PS34, Line 1: -- SPDX-License-Identifier: GPL-2.0-or-later > if libgfxinit doesn't support CML, then this should be dropped. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/40581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f83fab64e4cc9036698ca0fdd5edbb677d77eb9 Gerrit-Change-Number: 40581 Gerrit-PatchSet: 36 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Michael Niewöhner Gerrit-Comment-Date: Thu, 07 May 2020 19:44:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/clevo/n141cu: Add new Comet Lake mainboard
by Felix Singer (Code Review) 07 May '20

07 May '20

Hello build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, Paul Menzel, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/40581 to look at the new patch set (#36). Change subject: mb/clevo/n141cu: Add new Comet Lake mainboard ...................................................................... mb/clevo/n141cu: Add new Comet Lake mainboard Add a new mainboard with the following specs: - Intel i5-10210U (Comet Lake) - Intel UHD graphics - Intel HD audio - 1x Ethernet 1Gbit/s - 1x SATA3 - 1x M.2 slot x4 (PCIe/SATA) - 1x M.2 slot x1 (WLAN/BT) - 1x 3G/LTE - USB2/3 - Thunderbolt - HDMI, mDP - CCD camera + mic - SD card reader - TPM2 SLB9670 The ACPI code has been taken from System76 CML-U mainboard series. Tested: - Clevo N141CU / TUXEDO InfinityBook Pro 14 v5 - SeaBIOS and TianoCore - vboot with RO, RO+A, RO+A+B - Booted Arch Linux - Linux 5.6.10 - Linux LTS 5.4.38 What works / What works not: - Everything works as expected. Todos: - Missing libgfxinit support, since it does not support the Comet Lake platform yet. - Different configuration switches mentioned in ramstage.c. Signed-off-by: Felix Singer <felixsinger(a)posteo.net> Change-Id: I9f83fab64e4cc9036698ca0fdd5edbb677d77eb9 --- M MAINTAINERS A src/mainboard/clevo/Kconfig A src/mainboard/clevo/Kconfig.name A src/mainboard/clevo/cml-u/Kconfig A src/mainboard/clevo/cml-u/Kconfig.name A src/mainboard/clevo/cml-u/Makefile.inc A src/mainboard/clevo/cml-u/acpi/ac.asl A src/mainboard/clevo/cml-u/acpi/battery.asl A src/mainboard/clevo/cml-u/acpi/buttons.asl A src/mainboard/clevo/cml-u/acpi/ec.asl A src/mainboard/clevo/cml-u/acpi/ec_ram.asl A src/mainboard/clevo/cml-u/acpi/gpe.asl A src/mainboard/clevo/cml-u/acpi/hid.asl A src/mainboard/clevo/cml-u/acpi/keyboard.asl A src/mainboard/clevo/cml-u/acpi/lid.asl A src/mainboard/clevo/cml-u/acpi/mainboard.asl A src/mainboard/clevo/cml-u/acpi/sleep.asl A src/mainboard/clevo/cml-u/acpi/tbt.asl A src/mainboard/clevo/cml-u/board_info.txt A src/mainboard/clevo/cml-u/dsdt.asl A src/mainboard/clevo/cml-u/fmds/vboot-ro.fmd A src/mainboard/clevo/cml-u/fmds/vboot-roa.fmd A src/mainboard/clevo/cml-u/fmds/vboot-roab.fmd A src/mainboard/clevo/cml-u/ramstage.c A src/mainboard/clevo/cml-u/romstage.c A src/mainboard/clevo/cml-u/variants/n141cu/board_info.txt A src/mainboard/clevo/cml-u/variants/n141cu/data.vbt A src/mainboard/clevo/cml-u/variants/n141cu/devicetree.cb A src/mainboard/clevo/cml-u/variants/n141cu/hda_verb.c A src/mainboard/clevo/cml-u/variants/n141cu/include/gpio_table.h 30 files changed, 1,659 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/40581/36 -- To view, visit https://review.coreboot.org/c/coreboot/+/40581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f83fab64e4cc9036698ca0fdd5edbb677d77eb9 Gerrit-Change-Number: 40581 Gerrit-PatchSet: 36 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Michael Niewöhner Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/clevo/n141cu: Add new Comet Lake mainboard
by Matt DeVillier (Code Review) 07 May '20

07 May '20

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40581 ) Change subject: mb/clevo/n141cu: Add new Comet Lake mainboard ...................................................................... Patch Set 35: (6 comments) https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… File src/mainboard/clevo/cml-u/Kconfig: https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… PS34, Line 14: # select MAINBOARD_HAS_LIBGFXINIT if libgfxinit doesn't support CML, then this should be dropped https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… PS34, Line 18: ONBOARD_VGA_IS_PRIMARY is this needed? https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… File src/mainboard/clevo/cml-u/Makefile.inc: https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… PS34, Line 8: ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads if libgfxinit doesn't support CML, then this should be dropped https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… File src/mainboard/clevo/cml-u/ramstage.c: https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… PS34, Line 7: /* : * TODO: : * - Add kill switches for WLAN, BT, LTE, CCD : * - Add support for WoL (LAN, WLAN) : * - Make M.2 port configurable (SATA <> PCIe) : * - Make SATA DevSlp configurable : * - Make TBT port configurable (TBT <> DisplayPort) : */ generally this is less than ideal unless there's a specific reason these haven't been implemented https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… File src/mainboard/clevo/cml-u/variants/n141cu/gma-mainboard.ads: https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… PS34, Line 1: -- SPDX-License-Identifier: GPL-2.0-or-later if libgfxinit doesn't support CML, then this should be dropped. also, doubtful the board actually has all these ports present https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… File src/mainboard/clevo/cml-u/variants/n141cu/include/gpio_table.h: https://review.coreboot.org/c/coreboot/+/40581/34/src/mainboard/clevo/cml-u… PS34, Line 1: /* SPDX-License-Identifier: GPL-2.0-only */ assume this is just taken from an inteltool dump? the 2nd data word should be & 0xff00 and can be truncated to 4 bytes for readability. And the RSVD GPIOs don't need to be programmed AIUI. -- To view, visit https://review.coreboot.org/c/coreboot/+/40581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f83fab64e4cc9036698ca0fdd5edbb677d77eb9 Gerrit-Change-Number: 40581 Gerrit-PatchSet: 35 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Michael Niewöhner Gerrit-Comment-Date: Thu, 07 May 2020 19:23:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: lib/spd_bin: add get_spd_sn function
by Tim Wawrzynczak (Code Review) 07 May '20

07 May '20

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40414 ) Change subject: lib/spd_bin: add get_spd_sn function ...................................................................... Patch Set 6: (3 comments) https://review.coreboot.org/c/coreboot/+/40414/4/src/soc/intel/common/block… File src/soc/intel/common/block/smbus/smbuslib.c: https://review.coreboot.org/c/coreboot/+/40414/4/src/soc/intel/common/block… PS4, Line 85: return sn == 0x00000000, if addr is 0x0. : return sn == 0xffffffff, if dimm is not present. */ > In new patchset, it will return a CB_ERR and sn will become u32 pointer. […] Sounds good! https://review.coreboot.org/c/coreboot/+/40414/4/src/soc/intel/common/block… PS4, Line 87: u8 *sn > In new patchset, it will return a CB_ERR and sn will become u32 pointer. […] Ack https://review.coreboot.org/c/coreboot/+/40414/4/src/soc/intel/common/block… PS4, Line 92: /* smbus will return 0xff if addr is zero */ : if (addr == 0x00) { : memset(sn, 0, SPD_SN_LEN); : return; : } > As Eric mentioned, I saw return value -1(0xffffffff) when I removed the DIMM. […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/40414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I406bba7cc56debbd9851d430f069e4fb96ec937c Gerrit-Change-Number: 40414 Gerrit-PatchSet: 6 Gerrit-Owner: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 07 May 2020 19:19:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jamie Chen <jamie.chen(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/clevo/n141cu: Add new Comet Lake mainboard
by Felix Singer (Code Review) 07 May '20

07 May '20

Hello build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, Paul Menzel, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/40581 to look at the new patch set (#35). Change subject: mb/clevo/n141cu: Add new Comet Lake mainboard ...................................................................... mb/clevo/n141cu: Add new Comet Lake mainboard Add a new mainboard with the following specs: - Intel i5-10210U (Comet Lake) - Intel UHD graphics - Intel HD audio - 1x Ethernet 1Gbit/s - 1x SATA3 - 1x M.2 slot x4 (PCIe/SATA) - 1x M.2 slot x1 (WLAN/BT) - 1x 3G/LTE - USB2/3 - Thunderbolt - HDMI, mDP - CCD camera + mic - SD card reader - TPM2 SLB9670 The ACPI code has been taken from System76 CML-U mainboard series. Tested: - Clevo N141CU / TUXEDO InfinityBook Pro 14 v5 - SeaBIOS and TianoCore - vboot with RO, RO+A, RO+A+B - Booted Arch Linux - Linux 5.6.10 - Linux LTS 5.4.38 What works / What works not: - Everything works as expected. Todos: - Missing libgfxinit support, since it does not support the Comet Lake platform yet. - Different configuration switches mentioned in ramstage.c. Signed-off-by: Felix Singer <felixsinger(a)posteo.net> Change-Id: I9f83fab64e4cc9036698ca0fdd5edbb677d77eb9 --- M MAINTAINERS A src/mainboard/clevo/Kconfig A src/mainboard/clevo/Kconfig.name A src/mainboard/clevo/cml-u/Kconfig A src/mainboard/clevo/cml-u/Kconfig.name A src/mainboard/clevo/cml-u/Makefile.inc A src/mainboard/clevo/cml-u/acpi/ac.asl A src/mainboard/clevo/cml-u/acpi/battery.asl A src/mainboard/clevo/cml-u/acpi/buttons.asl A src/mainboard/clevo/cml-u/acpi/ec.asl A src/mainboard/clevo/cml-u/acpi/ec_ram.asl A src/mainboard/clevo/cml-u/acpi/gpe.asl A src/mainboard/clevo/cml-u/acpi/hid.asl A src/mainboard/clevo/cml-u/acpi/keyboard.asl A src/mainboard/clevo/cml-u/acpi/lid.asl A src/mainboard/clevo/cml-u/acpi/mainboard.asl A src/mainboard/clevo/cml-u/acpi/sleep.asl A src/mainboard/clevo/cml-u/acpi/tbt.asl A src/mainboard/clevo/cml-u/board_info.txt A src/mainboard/clevo/cml-u/dsdt.asl A src/mainboard/clevo/cml-u/fmds/vboot-ro.fmd A src/mainboard/clevo/cml-u/fmds/vboot-roa.fmd A src/mainboard/clevo/cml-u/fmds/vboot-roab.fmd A src/mainboard/clevo/cml-u/ramstage.c A src/mainboard/clevo/cml-u/romstage.c A src/mainboard/clevo/cml-u/variants/n141cu/board_info.txt A src/mainboard/clevo/cml-u/variants/n141cu/data.vbt A src/mainboard/clevo/cml-u/variants/n141cu/devicetree.cb A src/mainboard/clevo/cml-u/variants/n141cu/gma-mainboard.ads A src/mainboard/clevo/cml-u/variants/n141cu/hda_verb.c A src/mainboard/clevo/cml-u/variants/n141cu/include/gpio_table.h 31 files changed, 1,681 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/40581/35 -- To view, visit https://review.coreboot.org/c/coreboot/+/40581 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f83fab64e4cc9036698ca0fdd5edbb677d77eb9 Gerrit-Change-Number: 40581 Gerrit-PatchSet: 35 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michael Niewöhner Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/sconfig: Add LPC and ESPI buses
by Raul Rangel (Code Review) 07 May '20

07 May '20

Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41099 ) Change subject: util/sconfig: Add LPC and ESPI buses ...................................................................... Patch Set 2: > Patch Set 2: > > You need to update device_util.c (dev_path) and device_const.c (path_eq) as well. Thanks. Wonder how hard it would be to enable -Wswitch. -- To view, visit https://review.coreboot.org/c/coreboot/+/41099 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c2f40813c05680f72e5f30cbb13617e8f994841 Gerrit-Change-Number: 41099 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 May 2020 18:57:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/sconfig: Add LPC and ESPI buses
by build bot (Jenkins) (Code Review) 07 May '20

07 May '20

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41099 ) Change subject: util/sconfig: Add LPC and ESPI buses ...................................................................... Patch Set 3: (2 comments) https://review.coreboot.org/c/coreboot/+/41099/3/util/sconfig/lex.yy.c_ship… File util/sconfig/lex.yy.c_shipped: https://review.coreboot.org/c/coreboot/+/41099/3/util/sconfig/lex.yy.c_ship… PS3, Line 162: trailing whitespace https://review.coreboot.org/c/coreboot/+/41099/3/util/sconfig/lex.yy.c_ship… PS3, Line 165: trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/41099 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c2f40813c05680f72e5f30cbb13617e8f994841 Gerrit-Change-Number: 41099 Gerrit-PatchSet: 3 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 May 2020 18:56:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/sconfig: Add LPC and ESPI buses
by Raul Rangel (Code Review) 07 May '20

07 May '20

Hello build bot (Jenkins), Furquan Shaikh, Martin Roth, Patrick Georgi, Aaron Durbin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/41099 to look at the new patch set (#3). Change subject: util/sconfig: Add LPC and ESPI buses ...................................................................... util/sconfig: Add LPC and ESPI buses Picasso has an LPC and eSPI bridge on the same PCI DEVFN. They can both be active at the same time. This adds a way to specify which devices belong on which bus. i.e., device pci 14.3 on # - D14F3 bridge device espi 0 on chip ec/google/chromeec device pnp 0c09.0 on end end end device lpc 0 on end end BUG=b:154445472 TEST=Built trembyle and saw static.c contained the espi bus. Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: I0c2f40813c05680f72e5f30cbb13617e8f994841 --- M src/device/device_const.c M src/device/device_util.c M src/include/device/path.h M util/sconfig/lex.yy.c_shipped M util/sconfig/main.c M util/sconfig/sconfig.l M util/sconfig/sconfig.tab.c_shipped M util/sconfig/sconfig.tab.h_shipped M util/sconfig/sconfig.y 9 files changed, 200 insertions(+), 147 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/41099/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/41099 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c2f40813c05680f72e5f30cbb13617e8f994841 Gerrit-Change-Number: 41099 Gerrit-PatchSet: 3 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit May 2020