the following patch was just integrated into master:
commit aee444f453f38e53f3e2ac54b560707616767869
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Mon Apr 22 16:03:11 2013 -0700
exynos5250: ungate the product ID register
This makes sure that the product ID (PRO_ID) register can be read
when the OS kernel is figuring out what kind of CPU it's running on.
For historical reference, the original U-Boot code seems to have
worked basically by accident here. The hardware has a quirk where by
reading the value before gating the IP block keeps the value
persistent. U-Boot reads the chip ID early on to distinguish between
chip family, but we do not mix code the same way so we do not read
the chip ID. Since the value has been read before the clock gating
happens, the value remains available for the kernel to use during the
decompression stage. We don't want to rely on that behavior when using
coreboot. Instead the kernel should gate unused IPs.
(credit to Gabe for finding symptom in the kernel)
Change-Id: Iaa21e6e718b9000b5558f568020f393779fd208e
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
Reviewed-on: http://review.coreboot.org/3121
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Tested-by: build bot (Jenkins)
Build-Tested: build bot (Jenkins) at Tue Apr 23 03:06:56 2013, giving +1
Reviewed-By: Stefan Reinauer <stefan.reinauer(a)coreboot.org> at Tue Apr 23 02:05:50 2013, giving +2
See http://review.coreboot.org/3121 for details.
-gerrit
David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3121
-gerrit
commit 9cd5ebe34dae69febebce240ca0123d4f4f9d2ec
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Mon Apr 22 16:03:11 2013 -0700
exynos5250: ungate the product ID register
This makes sure that the product ID (PRO_ID) register can be read
when the OS kernel is figuring out what kind of CPU it's running on.
For historical reference, the original U-Boot code seems to have
worked basically by accident here. The hardware has a quirk where by
reading the value before gating the IP block keeps the value
persistent. U-Boot reads the chip ID early on to distinguish between
chip family, but we do not mix code the same way so we do not read
the chip ID. Since the value has been read before the clock gating
happens, the value remains available for the kernel to use during the
decompression stage. We don't want to rely on that behavior when using
coreboot. Instead the kernel should gate unused IPs.
(credit to Gabe for finding symptom in the kernel)
Change-Id: Iaa21e6e718b9000b5558f568020f393779fd208e
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
---
src/cpu/samsung/exynos5250/clock_init.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/src/cpu/samsung/exynos5250/clock_init.c b/src/cpu/samsung/exynos5250/clock_init.c
index c94cadf..0989b88 100644
--- a/src/cpu/samsung/exynos5250/clock_init.c
+++ b/src/cpu/samsung/exynos5250/clock_init.c
@@ -416,7 +416,12 @@ void clock_gate(void)
CLK_SPI2_MASK |
CLK_SPI0_MASK);
- /* CLK_GATE_IP_PERIS */
+ /*
+ * CLK_GATE_IP_PERIS
+ * Note: Keep CHIPID_APBIF ungated to ensure reading the product ID
+ * register (PRO_ID) works correctly when the OS kernel determines
+ * which chip it is running on.
+ */
clrbits_le32(&clk->gate_ip_peris, CLK_RTC_MASK |
CLK_TZPC9_MASK |
CLK_TZPC8_MASK |
@@ -427,8 +432,7 @@ void clock_gate(void)
CLK_TZPC3_MASK |
CLK_TZPC2_MASK |
CLK_TZPC1_MASK |
- CLK_TZPC0_MASK |
- CLK_CHIPID_MASK);
+ CLK_TZPC0_MASK);
/* CLK_GATE_BLOCK */
clrbits_le32(&clk->gate_block, CLK_ACP_MASK);
David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3121
-gerrit
commit bca95c71bfa5c3fa606f199b4ae69bb42a492873
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Mon Apr 22 16:03:11 2013 -0700
exynos5250: ungate the product ID register
This makes sure that the product ID (PRO_ID) register can be read
when the OS kernel is figuring out what kind of CPU it's running on.
For historical reference, the original u-boot code seems to have
worked basically by accident here. The hardware has a quirk where by
reading the value before gating the IP block keeps the value
persistent. That is why the kernel is able to read the product ID
during the decompression stage. We don't want to rely on that behavior
when using coreboot, instead the kernel should gate unused IPs.
(credit to Gabe for finding symptom in the kernel)
Change-Id: Iaa21e6e718b9000b5558f568020f393779fd208e
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
---
src/cpu/samsung/exynos5250/clock_init.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/src/cpu/samsung/exynos5250/clock_init.c b/src/cpu/samsung/exynos5250/clock_init.c
index c94cadf..0989b88 100644
--- a/src/cpu/samsung/exynos5250/clock_init.c
+++ b/src/cpu/samsung/exynos5250/clock_init.c
@@ -416,7 +416,12 @@ void clock_gate(void)
CLK_SPI2_MASK |
CLK_SPI0_MASK);
- /* CLK_GATE_IP_PERIS */
+ /*
+ * CLK_GATE_IP_PERIS
+ * Note: Keep CHIPID_APBIF ungated to ensure reading the product ID
+ * register (PRO_ID) works correctly when the OS kernel determines
+ * which chip it is running on.
+ */
clrbits_le32(&clk->gate_ip_peris, CLK_RTC_MASK |
CLK_TZPC9_MASK |
CLK_TZPC8_MASK |
@@ -427,8 +432,7 @@ void clock_gate(void)
CLK_TZPC3_MASK |
CLK_TZPC2_MASK |
CLK_TZPC1_MASK |
- CLK_TZPC0_MASK |
- CLK_CHIPID_MASK);
+ CLK_TZPC0_MASK);
/* CLK_GATE_BLOCK */
clrbits_le32(&clk->gate_block, CLK_ACP_MASK);
David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3121
-gerrit
commit 55c70fcfccdf8591af4afc05f8b65b7a955b4ef0
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Mon Apr 22 16:03:11 2013 -0700
exynos5250: read product ID register before gating its clock
The product ID comes from a special-function register (SFR) which has
interesting behavior whereby reading its value causes it to persist
in memory even after the clock is gated.
The chip ID may be read by the OS kernel; for Linux, it is used while
decompressing the kernel. So to make this information available after
coreboot finishes and save a little bit of power we can force a read
to occur before gating its IP block.
(credit to Gabe for finding symptom in the kernel)
Change-Id: Iaa21e6e718b9000b5558f568020f393779fd208e
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
---
src/cpu/samsung/exynos5250/clock_init.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/src/cpu/samsung/exynos5250/clock_init.c b/src/cpu/samsung/exynos5250/clock_init.c
index c94cadf..2fd9947 100644
--- a/src/cpu/samsung/exynos5250/clock_init.c
+++ b/src/cpu/samsung/exynos5250/clock_init.c
@@ -295,6 +295,7 @@ void system_clock_init(struct mem_timings *mem,
void clock_gate(void)
{
struct exynos5_clock *clk = (struct exynos5_clock *)EXYNOS5_CLOCK_BASE;
+ uint32_t chip_id;
/* CLK_GATE_IP_SYSRGT */
clrbits_le32(&clk->gate_ip_sysrgt, CLK_C2C_MASK);
@@ -427,8 +428,16 @@ void clock_gate(void)
CLK_TZPC3_MASK |
CLK_TZPC2_MASK |
CLK_TZPC1_MASK |
- CLK_TZPC0_MASK |
- CLK_CHIPID_MASK);
+ CLK_TZPC0_MASK);
+
+ /*
+ * Ensure the chip ID is read before gating its IP block. This causes
+ * the value to remain persistent in memory so when other code
+ * references the PRO_ID SFR it will identify the chip correctly.
+ */
+ chip_id = (readl((void *)EXYNOS_PRO_ID) >> 20) & 0xf;
+ if (chip_id == 5)
+ clrbits_le32(&clk->gate_ip_peris, CLK_CHIPID_MASK);
/* CLK_GATE_BLOCK */
clrbits_le32(&clk->gate_block, CLK_ACP_MASK);
the following patch was just integrated into master:
commit e8a91347b182281f18c969229f02e07102e21898
Author: Ronald G. Minnich <rminnich(a)gmail.com>
Date: Mon Apr 22 10:46:53 2013 -0700
GOOGLE/SNOW: fix stupid paren error
This simple error led to corrupted graphics.
How annoying.
Change-Id: I2295c0df0f1d16014a603dc5d66bd4d72f3fb7c9
Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com>
Reviewed-on: http://review.coreboot.org/3120
Reviewed-by: David Hendricks <dhendrix(a)chromium.org>
Tested-by: build bot (Jenkins)
Build-Tested: build bot (Jenkins) at Mon Apr 22 20:29:29 2013, giving +1
Reviewed-By: David Hendricks <dhendrix(a)chromium.org> at Mon Apr 22 20:16:02 2013, giving +2
See http://review.coreboot.org/3120 for details.
-gerrit
Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3119
-gerrit
commit e3999d58a62006f4b2b884d68544351b6023c4ec
Author: Paul Menzel <paulepanter(a)users.sourceforge.net>
Date: Fri Apr 19 10:23:03 2013 +0200
AMD CIMx SB800: Remove declaration of unused `get_sbdn()`
No SB800 based board implements the function `get_sbdn()`, which
was probably copied from SB700 code. So remove the declaration.
Change-Id: I85fe3db0abf2648b6eb7a659f2112d130f856afa
Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
---
src/southbridge/amd/cimx/sb800/sb_cimx.h | 8 --------
1 file changed, 8 deletions(-)
diff --git a/src/southbridge/amd/cimx/sb800/sb_cimx.h b/src/southbridge/amd/cimx/sb800/sb_cimx.h
index 3bec5d8..f07b0e0 100644
--- a/src/southbridge/amd/cimx/sb800/sb_cimx.h
+++ b/src/southbridge/amd/cimx/sb800/sb_cimx.h
@@ -40,12 +40,4 @@ int acpi_is_wakeup_early(void);
*/
void sb800_clk_output_48Mhz(void);
-#if CONFIG_RAMINIT_SYSINFO
-/**
- * @brief Get SouthBridge device number, called by finalize_node_setup()
- * @param[in] bus target bus number
- * @return southbridge device number
- */
-u32 get_sbdn(u32 bus);
-#endif
#endif