coreboot-gerrit February 2025

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[XS] Change in coreboot[main]: device/pci_rom: Support non VGA iGPUs
by Maximilian Brune (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Felix Held, Patrick Rudolph. Maximilian Brune has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/86386?usp=email ) Change subject: device/pci_rom: Support non VGA iGPUs ...................................................................... Patch Set 4: (1 comment) File src/device/pci_rom.c: https://review.coreboot.org/c/coreboot/+/86386/comment/00a5d7a0_334808a8?us… : PS4, Line 231: PCI_BASE_CLASS_DISPLAY > Ok it also causes issues on another board. For some reason I get these messages in ubuntu: […] never mind. I just didn't apply the 2 not merged patches to the mainboard yet. -- To view, visit https://review.coreboot.org/c/coreboot/+/86386?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I623cd80b45b148b91f2796b22a589bbede0feeeb Gerrit-Change-Number: 86386 Gerrit-PatchSet: 4 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 28 Feb 2025 01:13:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com>

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[S] Change in blobs[main]: soc/mediatek/mt8196: update mtk_fsp_ramstage to 16174.45.0
by Yu-Ping Wu (Code Review) 27 Feb '25

27 Feb '25

Yu-Ping Wu has submitted this change. ( https://review.coreboot.org/c/blobs/+/86614?usp=email ) Change subject: soc/mediatek/mt8196: update mtk_fsp_ramstage to 16174.45.0 ...................................................................... soc/mediatek/mt8196: update mtk_fsp_ramstage to 16174.45.0 Update mtk_fsp_ramstage.elf includes: - Add read and write permission of USB register for SSPM. - Add read and write permission of VLP register for SSPM. TEST=Build pass BUG=b:361690180,b:394704589 Change-Id: I0df03cdded80449a6e64ea88e3d1f93deb84eec7 Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> --- M soc/mediatek/mt8196/mtk_fsp_ramstage.elf M soc/mediatek/mt8196/mtk_fsp_ramstage.elf.md5 M soc/mediatek/mt8196/mtk_fsp_ramstage_release_notes.txt 3 files changed, 10 insertions(+), 1 deletion(-) Approvals: Yu-Ping Wu: Verified; Looks good to me, approved Yidi Lin: Looks good to me, approved diff --git a/soc/mediatek/mt8196/mtk_fsp_ramstage.elf b/soc/mediatek/mt8196/mtk_fsp_ramstage.elf index e363b3b..e28a3a3 100644 --- a/soc/mediatek/mt8196/mtk_fsp_ramstage.elf +++ b/soc/mediatek/mt8196/mtk_fsp_ramstage.elf Binary files differ diff --git a/soc/mediatek/mt8196/mtk_fsp_ramstage.elf.md5 b/soc/mediatek/mt8196/mtk_fsp_ramstage.elf.md5 index 2fac575..b338649 100644 --- a/soc/mediatek/mt8196/mtk_fsp_ramstage.elf.md5 +++ b/soc/mediatek/mt8196/mtk_fsp_ramstage.elf.md5 @@ -1 +1 @@ -d003c56a9cb53d8d3e09bf6cc6881520 *mtk_fsp_ramstage.elf +496b72aa197b3e68242220c1adf776a0 *mtk_fsp_ramstage.elf diff --git a/soc/mediatek/mt8196/mtk_fsp_ramstage_release_notes.txt b/soc/mediatek/mt8196/mtk_fsp_ramstage_release_notes.txt index 579d8cb..021f024 100644 --- a/soc/mediatek/mt8196/mtk_fsp_ramstage_release_notes.txt +++ b/soc/mediatek/mt8196/mtk_fsp_ramstage_release_notes.txt @@ -1,3 +1,12 @@ +# 16174.45.0 + +1. An official build from ChromeOS version 16174.45.0. + +2. Included changes: + +- CL:*8059008 mt8196: Add read and write permission of VLP register for SSPM +- CL:*8058690 mt8196: Add read and write permission of USB register for SSPM + # 16174.22.0 1. An official build from ChromeOS version 16174.22.0. -- To view, visit https://review.coreboot.org/c/blobs/+/86614?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I0df03cdded80449a6e64ea88e3d1f93deb84eec7 Gerrit-Change-Number: 86614 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in blobs[main]: soc/mediatek/mt8196: update mtk_fsp_ramstage to 16174.45.0
by Yu-Ping Wu (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Jarried Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/blobs/+/86614?usp=email ) Change subject: soc/mediatek/mt8196: update mtk_fsp_ramstage to 16174.45.0 ...................................................................... Patch Set 3: Code-Review+2 Verified+1 -- To view, visit https://review.coreboot.org/c/blobs/+/86614?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I0df03cdded80449a6e64ea88e3d1f93deb84eec7 Gerrit-Change-Number: 86614 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Fri, 28 Feb 2025 00:22:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: sb/intel/common: Add GPIO serial blink console support
by Keith Hui (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Intel coreboot Reviewers, Jérémy Compostella, Nicholas Chin, Paul Menzel. Hello Intel coreboot Reviewers, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86390?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: sb/intel/common: Add GPIO serial blink console support ...................................................................... sb/intel/common: Add GPIO serial blink console support Intel ICH/PCHs from ICH8 onwards have the ability to blink arbitrary messages (in this case, our console) onto a GPIO line. Idea is to place an optical sensor over an LED controlled by the GPIO line with serial blink enabled to "watch" the blinking and extract the messages. Add support for serializing coreboot console over this channel. Documentation to follow pending decision on reorganization. This scheme is supported by up to the 9-series PCHs. Change-Id: I0741142fe21eba4989d28b96e795d3bfa3085466 Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/console/Kconfig M src/console/console.c M src/include/console/console.h A src/include/console/gpsb.h M src/southbridge/intel/common/Makefile.mk M src/southbridge/intel/common/gpio.c M src/southbridge/intel/common/gpio.h A src/southbridge/intel/common/gpsb.c 8 files changed, 193 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/86390/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/86390?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0741142fe21eba4989d28b96e795d3bfa3085466 Gerrit-Change-Number: 86390 Gerrit-PatchSet: 4 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com>

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[XS] Change in coreboot[main]: device/pci_rom: Support non VGA iGPUs
by Maximilian Brune (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Felix Held, Patrick Rudolph. Maximilian Brune has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/86386?usp=email ) Change subject: device/pci_rom: Support non VGA iGPUs ...................................................................... Patch Set 4: (1 comment) File src/device/pci_rom.c: https://review.coreboot.org/c/coreboot/+/86386/comment/fb20b766_4501cd53?us… : PS4, Line 231: PCI_BASE_CLASS_DISPLAY > I tested the image and I noticed that I get a bunch of error messages from coreboot for dGPUs. […] Ok it also causes issues on another board. For some reason I get these messages in ubuntu: [ 28.625878] watchdog: BUG: soft lockup - CPU#0 stuck for 26s! [systemd-udevd:476] [ 56.625877] watchdog: BUG: soft lockup - CPU#0 stuck for 52s! [systemd-udevd:476] [ 84.625887] watchdog: BUG: soft lockup - CPU#0 stuck for 78s! [systemd-udevd:476] [ 112.625876] watchdog: BUG: soft lockup - CPU#0 stuck for 104s! [systemd-udevd:476] [ 140.625876] watchdog: BUG: soft lockup - CPU#0 stuck for 130s! [systemd-udevd:476] -- To view, visit https://review.coreboot.org/c/coreboot/+/86386?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I623cd80b45b148b91f2796b22a589bbede0feeeb Gerrit-Change-Number: 86386 Gerrit-PatchSet: 4 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 27 Feb 2025 23:31:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com>

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[S] Change in coreboot[main]: soc/amd/block/acp: add SSDT generation callback into SoC code
by Matt DeVillier (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier. Matt DeVillier has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/86465?usp=email ) Change subject: soc/amd/block/acp: add SSDT generation callback into SoC code ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86465?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0ca5272d28938c8b90b645884a0d8b306a77d473 Gerrit-Change-Number: 86465 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 27 Feb 2025 23:23:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: src/acpigen: support 0-initialized buffer in acpigen_write_byte_buffer
by Matt DeVillier (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Cliff Huang, Felix Held, Lance Zhao, Tim Wawrzynczak. Matt DeVillier has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/86631?usp=email ) Change subject: src/acpigen: support 0-initialized buffer in acpigen_write_byte_buffer ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/86631?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie756489e02f994c38d38907a97fb215d30f4a636 Gerrit-Change-Number: 86631 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 27 Feb 2025 23:22:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: src/acpigen: implement acpigen_write_create[_buffer]_bit_field
by Matt DeVillier (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Cliff Huang, Felix Held, Lance Zhao, Tim Wawrzynczak. Matt DeVillier has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/86630?usp=email ) Change subject: src/acpigen: implement acpigen_write_create[_buffer]_bit_field ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86630/comment/c991c4ee_4767a1dc?us… : PS1, Line 9: extra space -- To view, visit https://review.coreboot.org/c/coreboot/+/86630?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia5c06c2e8564b64de386871b2faf79c433e5a1da Gerrit-Change-Number: 86630 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 27 Feb 2025 23:22:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[XL] Change in coreboot[main]: mb/intel/ptlrvp: Add Intel Panther Lake RVP as copy of google/fatcat
by Cliff Huang (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Bora Guvendik, Jamie Ryu, Jérémy Compostella, Paul Menzel, Zhixing Ma. Cliff Huang has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/84564?usp=email ) Change subject: mb/intel/ptlrvp: Add Intel Panther Lake RVP as copy of google/fatcat ...................................................................... Patch Set 7: (5 comments) File src/mainboard/intel/ptlrvp/Kconfig: https://review.coreboot.org/c/coreboot/+/84564/comment/cc7d7c61_10c3a34d?us… : PS6, Line 2: > This Change List (CL) provides the foundational support for our PTLRVP […] Acknowledged https://review.coreboot.org/c/coreboot/+/84564/comment/939d2258_796a91e4?us… : PS6, Line 3: config BOARD_INTEL_PTLRVP_COMMON > Could you clarify? I do not comprehend your comment. Currently, we are using fsp_param.c. We used to select PLATFORM_USES_FSP_CONFIGURATION_BLOCKS to use fill_policy.c. Can we add an comment for using this flag so that we will revisit it? This will our original approach for PTL platform. https://review.coreboot.org/c/coreboot/+/84564/comment/c3110f52_e37c62ec?us… : PS6, Line 5: select BOARD_ROMSIZE_KB_32768 > This was added after e2ea7f22c6355d15515c049ca0dc4352173a0c01. This […] Acknowledged File src/mainboard/intel/ptlrvp/variants/baseboard/ptlrvp/include/baseboard/ec.h: https://review.coreboot.org/c/coreboot/+/84564/comment/9277bd15_1f82ffa7?us… : PS6, Line 78: #define EC_ENABLE_SYNC_IRQ /* Enable tight timestamp / wake support */ > You are correct, we probably do not. I removed them. Acknowledged File src/mainboard/intel/ptlrvp/variants/ptlrvp/gpio.c: https://review.coreboot.org/c/coreboot/+/84564/comment/4961c8ab_a2525196?us… : PS6, Line 199: /* GPP_E07: Not used */ > I assumed that on ptlrvp we are in the CONFIG_BOARD_GOOGLE_FATCAT and I therefore set it as NC. […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/84564?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I914f73ff06bfb801fc319b45b23d7ce4cb7a6d60 Gerrit-Change-Number: 84564 Gerrit-PatchSet: 7 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 27 Feb 2025 23:17:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com>

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[XL] Change in coreboot[main]: mb/asus/p8x7x-series: Add P8Z77-V LE PLUS variant
by Keith Hui (Code Review) 27 Feb '25

27 Feb '25

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86172?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/asus/p8x7x-series: Add P8Z77-V LE PLUS variant ...................................................................... mb/asus/p8x7x-series: Add P8Z77-V LE PLUS variant Based on a mix of existing P8x7x series boards, boardview, vendor firmware dumps, and hardware testing. Working: - SeaBIOS 1.16.3 and edk2/mrchromebox/uefipayload_2501 - Serial port - All USB2 & USB3 ports - Z77 SATA ports - Integrated graphics thru all ports with libgfxinit - RTL8111F LAN - Analog 7.1 audio out the back panel jacks - Digital audio - Front HDA audio panel - PCIe x16 with nVidia 8800GT GPU - PCIe x1 slots - PCIe x4 slot with Intel Octane H10 1TB NVMe - PCI slots - Hardware monitoring and fan control - S3 suspend Untested: - PS/2 mouse - EHCI debug Not working: - Wake on LAN - Programming LAN MAC address (yet) - Marvell SATA ports Change-Id: Id9eef8b3426daecce0c95f56bfcd4caae2d52e50 Signed-off-by: Keith Hui <buurin(a)gmail.com> --- A Documentation/mainboard/asus/p8z77-v_le_plus.md M Documentation/mainboard/index.md M src/mainboard/asus/p8x7x-series/Kconfig M src/mainboard/asus/p8x7x-series/Kconfig.name A src/mainboard/asus/p8x7x-series/variants/p8z77-v_le_plus/board_info.txt A src/mainboard/asus/p8x7x-series/variants/p8z77-v_le_plus/cmos.default A src/mainboard/asus/p8x7x-series/variants/p8z77-v_le_plus/cmos.layout A src/mainboard/asus/p8x7x-series/variants/p8z77-v_le_plus/data.vbt A src/mainboard/asus/p8x7x-series/variants/p8z77-v_le_plus/early_init.c A src/mainboard/asus/p8x7x-series/variants/p8z77-v_le_plus/gma-mainboard.ads A src/mainboard/asus/p8x7x-series/variants/p8z77-v_le_plus/gpio.c A src/mainboard/asus/p8x7x-series/variants/p8z77-v_le_plus/hda_verb.c A src/mainboard/asus/p8x7x-series/variants/p8z77-v_le_plus/overridetree.cb 13 files changed, 1,004 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/86172/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/86172?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id9eef8b3426daecce0c95f56bfcd4caae2d52e50 Gerrit-Change-Number: 86172 Gerrit-PatchSet: 3 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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coreboot-gerrit February 2025