coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

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2886 discussions

[S] Change in coreboot[main]: mainboard/intel/avenuecity_crb: Support 48MB BIOS region
by Shuo Liu (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Angel Pons, Chen, Gang C, Christian Walter, Intel coreboot Reviewers, Jincheng Li, Patrick Rudolph. Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/86575?usp=email ) Change subject: mainboard/intel/avenuecity_crb: Support 48MB BIOS region ...................................................................... Patch Set 6: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/86575?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie1289ec2e9d676584b8aeb7e0af27ce810a471eb Gerrit-Change-Number: 86575 Gerrit-PatchSet: 6 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Comment-Date: Fri, 28 Feb 2025 06:54:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: Kconfig: Place XIP components and FIT at high flash addresses
by Shuo Liu (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Andrey Petrov, Angel Pons, Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, Intel coreboot Reviewers, Johnny Lin, Jonathan Zhang, Julius Werner, Patrick Rudolph, Ronak Kanabar, Tim Chu, Yu-Ping Wu. Hello Andrey Petrov, Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, Intel coreboot Reviewers, Johnny Lin, Jonathan Zhang, Julius Werner, Patrick Rudolph, Ronak Kanabar, Tim Chu, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86570?usp=email to look at the new patch set (#10). Change subject: Kconfig: Place XIP components and FIT at high flash addresses ...................................................................... Kconfig: Place XIP components and FIT at high flash addresses By default, CACHE_ROM_SIZE is limited to 16MB, but still covers the whole CBFS. When CBFS spans larger than 16MB, XIP components and FIT might be laid outside the cached region. Add XIP_AT_HIGH_ADDR to place XIP components and FIT as high as possible so that always to maximize the opportunity for them to being cached. Select XIP_AT_HIGH_ADDR for intel Granite Rapids SoC. Change-Id: I8eb469fdcd18d01652979f28049fe1ea3b59311c Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> Signed-off-by: Gang Chen <gang.c.chen(a)intel.com> --- M Makefile.mk M src/Kconfig M src/cpu/intel/fit/Makefile.mk M src/drivers/intel/fsp2_0/Makefile.mk M src/security/vboot/Makefile.mk M src/soc/intel/xeon_sp/gnr/Kconfig 6 files changed, 23 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/86570/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/86570?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8eb469fdcd18d01652979f28049fe1ea3b59311c Gerrit-Change-Number: 86570 Gerrit-PatchSet: 10 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com>

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[S] Change in coreboot[main]: util/cbfstool: Place XIP components and FIT at high flash addresses
by Shuo Liu (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Andrey Petrov, Angel Pons, Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, Intel coreboot Reviewers, Johnny Lin, Jonathan Zhang, Julius Werner, Patrick Rudolph, Ronak Kanabar, Tim Chu, Yu-Ping Wu. Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/86570?usp=email ) Change subject: util/cbfstool: Place XIP components and FIT at high flash addresses ...................................................................... Patch Set 9: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86570/comment/b88cd1d3_7309c6f4?us… : PS8, Line 9: CACHE_ROM_SIZE > Does GNR not support caching more than 16 MiB of flash? Cache as ram working on non-evict mode, or in-another word, if contents are evicted, due to backend memory is not ready, the content will be lost, thus cause program break if referenced later. GNR is not allowed to use more than 16MiB (UEFI actually only use 5MiB). https://review.coreboot.org/c/coreboot/+/86570/comment/fef7d6b6_9c351126?us… : PS8, Line 17: Select XIP_AT_HIGH_ADDR for intel Granite Rapids SoC. > What is the impact of this change? Faster boot times? Right. Otherwise the boot time will be unaccepted slow. -- To view, visit https://review.coreboot.org/c/coreboot/+/86570?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8eb469fdcd18d01652979f28049fe1ea3b59311c Gerrit-Change-Number: 86570 Gerrit-PatchSet: 9 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 28 Feb 2025 06:47:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com>

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[S] Change in coreboot[main]: mb/google/geralt: Tuning CSOT_PNA957QT1_1 panel VSP/VSN voltage for Ciri
by cong yang (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Hung-Te Lin, Xinxiong Xu, Yang Wu, Yidi Lin, Yu-Ping Wu. cong yang has posted comments on this change by Yang Wu. ( https://review.coreboot.org/c/coreboot/+/86640?usp=email ) Change subject: mb/google/geralt: Tuning CSOT_PNA957QT1_1 panel VSP/VSN voltage for Ciri ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/86640?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1b69303317f5ef47818f4a6a0c851bf650285e51 Gerrit-Change-Number: 86640 Gerrit-PatchSet: 2 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xinxiong Xu <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Xinxiong Xu <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 28 Feb 2025 06:44:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: Kconfig: Update prompt and help text for CBFS_SIZE
by Shuo Liu (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Alexander Couzens, Alicja Michalska, Angel Pons, Christian Walter, Dinesh Gehlot, Eran Mitrani, Erik van den Bogaert, Felix Held, Felix Singer, Frans Hendriks, Fred Reitberger, Intel coreboot Reviewers, Jakub "Kuba" Czapiga, Jason Glenesk, Jason Nien, Jayvik Desai, Jeremy Soller, Jonathon Hall, Jérémy Compostella, Kapil Porwal, Martin L Roth, Martin Roth, Matt DeVillier, Maxim Polyakov, Michael Niewöhner, Michał Kopeć, Michał Żygowski, Nicholas Chin, Nick Vaccaro, Patrick Rudolph, Piotr Król, Pranava Y N, Stefan Ott, Subrata Banik, Tarun, Tim Crawford, Werner Zeh, yuchi.chen(a)intel.com. Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/86571?usp=email ) Change subject: Kconfig: Update prompt and help text for CBFS_SIZE ...................................................................... Patch Set 10: (1 comment) File src/Kconfig: https://review.coreboot.org/c/coreboot/+/86571/comment/86f5b552_576a2ea0?us… : PS8, Line 642: located at the end of the ROM on x86 systems and at the start of the ROM : everywhere else. > This implies that x86 is top down and others are bottom up, is that what you're trying to say? For this sentence I just keep the original text without fundamental changes (except removing the text on legacy CBFS usage, e.g. passed through cbfstool -o/s), while from the original wording, I suppose so. P.S. original text - located at the end of the ROM (passed through cbfstool -o) on x86 and at the start of the ROM (passed through cbfstool -s) everywhere else. -- To view, visit https://review.coreboot.org/c/coreboot/+/86571?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I762042fae6357ee368b22a47b8e1168902041675 Gerrit-Change-Number: 86571 Gerrit-PatchSet: 10 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jakub "Kuba" Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> 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Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Fri, 28 Feb 2025 06:40:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com>

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[S] Change in coreboot[main]: mb/google/geralt: Tuning CSOT_PNA957QT1_1 panel VSP/VSN voltage for Ciri
by Yang Wu (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86640?usp=email to look at the new patch set (#2). Change subject: mb/google/geralt: Tuning CSOT_PNA957QT1_1 panel VSP/VSN voltage for Ciri ...................................................................... mb/google/geralt: Tuning CSOT_PNA957QT1_1 panel VSP/VSN voltage for Ciri The system default VSP/VSN voltage for Ciri is +-5.7V. According to the CSOT panel vendor's requirement, VSP/VSN for the CSOT_PNA957QT1_1 panel needs to be adjusted to +-6V. So modify the relevant register values accordingly. BUG=b:399728328 TEST=Boot to firmware screen BRANCH=Geralt Change-Id: I1b69303317f5ef47818f4a6a0c851bf650285e51 Signed-off-by: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/geralt/panel_ciri.c 1 file changed, 16 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/86640/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86640?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1b69303317f5ef47818f4a6a0c851bf650285e51 Gerrit-Change-Number: 86640 Gerrit-PatchSet: 2 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: Kconfig: Update prompt and help text for CBFS_SIZE
by Shuo Liu (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Alexander Couzens, Alicja Michalska, Angel Pons, Christian Walter, Dinesh Gehlot, Eran Mitrani, Erik van den Bogaert, Felix Held, Felix Singer, Frans Hendriks, Fred Reitberger, Intel coreboot Reviewers, Jakub "Kuba" Czapiga, Jason Glenesk, Jason Nien, Jayvik Desai, Jeremy Soller, Jonathon Hall, Jérémy Compostella, Kapil Porwal, Martin L Roth, Martin Roth, Matt DeVillier, Maxim Polyakov, Michael Niewöhner, Michał Kopeć, Michał Żygowski, Nicholas Chin, Nick Vaccaro, Patrick Rudolph, Piotr Król, Pranava Y N, Stefan Ott, Subrata Banik, Tarun, Tim Crawford, Werner Zeh, yuchi.chen(a)intel.com. Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/86571?usp=email ) Change subject: Kconfig: Update prompt and help text for CBFS_SIZE ...................................................................... Patch Set 9: (1 comment) File src/Kconfig: https://review.coreboot.org/c/coreboot/+/86571/comment/c727c14b_fb9a2748?us… : PS8, Line 647: should only be used > ```suggestion […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86571?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I762042fae6357ee368b22a47b8e1168902041675 Gerrit-Change-Number: 86571 Gerrit-PatchSet: 9 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jakub "Kuba" Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> 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[S] Change in coreboot[main]: Kconfig: Update prompt and help text for CBFS_SIZE
by Shuo Liu (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Alexander Couzens, Alicja Michalska, Angel Pons, Christian Walter, Dinesh Gehlot, Eran Mitrani, Erik van den Bogaert, Felix Held, Felix Singer, Frans Hendriks, Fred Reitberger, Intel coreboot Reviewers, Jakub "Kuba" Czapiga, Jason Glenesk, Jason Nien, Jayvik Desai, Jeremy Soller, Jonathon Hall, Jérémy Compostella, Kapil Porwal, Martin L Roth, Martin Roth, Matt DeVillier, Maxim Polyakov, Michael Niewöhner, Michał Kopeć, Michał Żygowski, Nicholas Chin, Nick Vaccaro, Patrick Rudolph, Piotr Król, Pranava Y N, Stefan Ott, Subrata Banik, Tarun, Tim Crawford, Werner Zeh, yuchi.chen(a)intel.com. Hello Alexander Couzens, Alicja Michalska, Angel Pons, Christian Walter, Dinesh Gehlot, Eran Mitrani, Erik van den Bogaert, Felix Held, Felix Singer, Frans Hendriks, Fred Reitberger, Intel coreboot Reviewers, Jakub "Kuba" Czapiga, Jason Glenesk, Jason Nien, Jayvik Desai, Jeremy Soller, Jonathon Hall, Kapil Porwal, Martin L Roth, Martin Roth, Matt DeVillier, Maxim Polyakov, Michael Niewöhner, Michał Kopeć, Michał Żygowski, Nicholas Chin, Nick Vaccaro, Patrick Rudolph, Piotr Król, Pranava Y N, Stefan Ott, Subrata Banik, Tarun, Tim Crawford, Werner Zeh, build bot (Jenkins), yuchi.chen(a)intel.com, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86571?usp=email to look at the new patch set (#10). Change subject: Kconfig: Update prompt and help text for CBFS_SIZE ...................................................................... Kconfig: Update prompt and help text for CBFS_SIZE Kconfig item CBFS_SIZE is actually indicating the host firmware size, a.k.a. coreboot owned flash region size, covering CBFS, FMAP, console, MRC cache, VPD, etc. Revise the prompt and help documentation to reflect recent usage updates. Change-Id: I762042fae6357ee368b22a47b8e1168902041675 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> --- M src/Kconfig 1 file changed, 10 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/86571/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/86571?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I762042fae6357ee368b22a47b8e1168902041675 Gerrit-Change-Number: 86571 Gerrit-PatchSet: 10 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> 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1 0

[S] Change in coreboot[main]: mb/google/geralt: Tuning CSOT_PNA957QT1_1 panel VSP/VSN voltage for Ciri
by Yang Wu (Code Review) 27 Feb '25

27 Feb '25

Yang Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86640?usp=email ) Change subject: mb/google/geralt: Tuning CSOT_PNA957QT1_1 panel VSP/VSN voltage for Ciri ...................................................................... mb/google/geralt: Tuning CSOT_PNA957QT1_1 panel VSP/VSN voltage for Ciri The system default VSP/VSN voltage for Ciri is +-5.7V. According to the CSOT panel vendor's requirement, VSP/VSN for the CSOT_PNA957QT1_1 panel needs to be adjusted to +-6V. So modify the relevant register values accordingly. BUG=b:399728328 TEST=Boot to firmware screen BRANCH=Geralt Change-Id: I1b69303317f5ef47818f4a6a0c851bf650285e51 Signed-off-by: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/geralt/panel_ciri.c 1 file changed, 16 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/86640/1 diff --git a/src/mainboard/google/geralt/panel_ciri.c b/src/mainboard/google/geralt/panel_ciri.c index 4c21e90..e746e9c 100644 --- a/src/mainboard/google/geralt/panel_ciri.c +++ b/src/mainboard/google/geralt/panel_ciri.c @@ -8,11 +8,11 @@ #define PMIC_TPS65132_I2C I2C3 -static void power_on_mipi_himax_83102j(void) +static void power_on_mipi_himax_83102j(uint8_t val) { const struct tps65132s_reg_setting reg_settings[] = { - { PMIC_TPS65132_VPOS, 0x11, 0x1f }, - { PMIC_TPS65132_VNEG, 0x11, 0x1f }, + { PMIC_TPS65132_VPOS, val, 0x1f }, + { PMIC_TPS65132_VNEG, val, 0x1f }, { PMIC_TPS65132_DLYX, 0x55, 0xff }, { PMIC_TPS65132_ASSDD, 0x5b, 0xff }, }; @@ -27,10 +27,20 @@ power_on_mipi_panel(&cfg); } +static void power_on_mipi_himax_83102j_default(void) +{ + power_on_mipi_himax_83102j(0x11); +} + +static void power_on_mipi_himax_83102j_csot(void) +{ + power_on_mipi_himax_83102j(0x14); +} + static struct panel_description ciri_panels[] = { [17] = { .name = "BOE_NV110WUM_L60", - .power_on = power_on_mipi_himax_83102j, + .power_on = power_on_mipi_himax_83102j_default, .configure_backlight = configure_mipi_pwm_backlight, .orientation = LB_FB_ORIENTATION_LEFT_UP, .disp_path = DISP_PATH_MIPI, @@ -39,7 +49,7 @@ [34] = { .name = "IVO_T109NW41", - .power_on = power_on_mipi_himax_83102j, + .power_on = power_on_mipi_himax_83102j_default, .configure_backlight = configure_mipi_pwm_backlight, .orientation = LB_FB_ORIENTATION_LEFT_UP, .disp_path = DISP_PATH_MIPI, @@ -48,7 +58,7 @@ [51] = { .name = "CSOT_PNA957QT1_1", - .power_on = power_on_mipi_himax_83102j, + .power_on = power_on_mipi_himax_83102j_csot, .configure_backlight = configure_mipi_pwm_backlight, .orientation = LB_FB_ORIENTATION_LEFT_UP, .disp_path = DISP_PATH_MIPI, -- To view, visit https://review.coreboot.org/c/coreboot/+/86640?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1b69303317f5ef47818f4a6a0c851bf650285e51 Gerrit-Change-Number: 86640 Gerrit-PatchSet: 1 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com>

1 0

[S] Change in coreboot[main]: Kconfig: Update prompt and help text for CBFS_SIZE
by Shuo Liu (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Alexander Couzens, Alicja Michalska, Angel Pons, Christian Walter, Dinesh Gehlot, Eran Mitrani, Erik van den Bogaert, Felix Held, Felix Singer, Frans Hendriks, Fred Reitberger, Intel coreboot Reviewers, Jakub "Kuba" Czapiga, Jason Glenesk, Jason Nien, Jayvik Desai, Jeremy Soller, Jonathon Hall, Jérémy Compostella, Kapil Porwal, Martin L Roth, Martin Roth, Matt DeVillier, Maxim Polyakov, Michael Niewöhner, Michał Kopeć, Michał Żygowski, Nicholas Chin, Nick Vaccaro, Patrick Rudolph, Piotr Król, Pranava Y N, Stefan Ott, Subrata Banik, Tarun, Tim Crawford, Werner Zeh, yuchi.chen(a)intel.com. Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/86571?usp=email ) Change subject: Kconfig: Update prompt and help text for CBFS_SIZE ...................................................................... Patch Set 9: (3 comments) File src/Kconfig: https://review.coreboot.org/c/coreboot/+/86571/comment/ebaa6943_c567dc27?us… : PS8, Line 644: Firmware > N.B. […] Fix applied. https://review.coreboot.org/c/coreboot/+/86571/comment/cad82fbf_f16667ce?us… : PS8, Line 646: Firmware Descriptor > ```suggestion […] Fix applied. https://review.coreboot.org/c/coreboot/+/86571/comment/ad293abe_6c771c0f?us… : PS8, Line 648: non-default > ```suggestion […] Fix applied. -- To view, visit https://review.coreboot.org/c/coreboot/+/86571?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I762042fae6357ee368b22a47b8e1168902041675 Gerrit-Change-Number: 86571 Gerrit-PatchSet: 9 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> 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Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-CC: Jérémy Compostella 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<christian.walter(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Fri, 28 Feb 2025 06:32:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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coreboot-gerrit February 2025