coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: soc/intel/meteorlake: Add support for USB wake up
by Sean Rhodes (Code Review) 28 Feb '25

28 Feb '25

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Intel coreboot Reviewers, Jakub "Kuba" Czapiga, Kapil Porwal, Matt DeVillier, Subrata Banik, Tarun. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86628?usp=email ) Change subject: soc/intel/meteorlake: Add support for USB wake up ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86628/comment/a1400886_197d2652?us… : PS1, Line 1: Parent: 58fdcfa8 (soc/intel/meteorlake: Set the default to Software Connection Manager) > maybe add that this was carried forward from ADL Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86628?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I67da6af619db947ab4830fa2d9904f3e70fbfd21 Gerrit-Change-Number: 86628 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jakub "Kuba" Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub "Kuba" Czapiga <czapiga(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Fri, 28 Feb 2025 08:51:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com>

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[S] Change in coreboot[main]: soc/intel/meteorlake: Add support for USB wake up
by Sean Rhodes (Code Review) 28 Feb '25

28 Feb '25

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Intel coreboot Reviewers, Jakub "Kuba" Czapiga, Kapil Porwal, Sean Rhodes, Subrata Banik, Tarun. Hello Dinesh Gehlot, Eran Mitrani, Intel coreboot Reviewers, Jakub "Kuba" Czapiga, Kapil Porwal, Matt DeVillier, Subrata Banik, Tarun, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86628?usp=email to look at the new patch set (#2). Change subject: soc/intel/meteorlake: Add support for USB wake up ...................................................................... soc/intel/meteorlake: Add support for USB wake up Add the same wakeup method that Alder Lake uses to Meteor Lake. Test=boot `starlabs/starbook/mtl` and check USB devices can wake. Change-Id: I67da6af619db947ab4830fa2d9904f3e70fbfd21 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/soc/intel/meteorlake/acpi/xhci.asl 1 file changed, 17 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/86628/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86628?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I67da6af619db947ab4830fa2d9904f3e70fbfd21 Gerrit-Change-Number: 86628 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jakub "Kuba" Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub "Kuba" Czapiga <czapiga(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com>

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[S] Change in coreboot[main]: driver/usb/intel_bluetooth: Add PS0 and PS3 methods
by Sean Rhodes (Code Review) 28 Feb '25

28 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86507?usp=email ) ( 4 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: driver/usb/intel_bluetooth: Add PS0 and PS3 methods ...................................................................... driver/usb/intel_bluetooth: Add PS0 and PS3 methods Add PS0 and PS3 methods that return the Bluetooth power resource. This allows the OS to turn on or off the device. This fixes and issue where the Bluetooth reported a power failure in device manager. Change-Id: I0e37fc0369b1dc2b166f851daa183b145a09eb32 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86507 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/usb/acpi/intel_bluetooth.c 1 file changed, 26 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/drivers/usb/acpi/intel_bluetooth.c b/src/drivers/usb/acpi/intel_bluetooth.c index 5ed42c8..97fb481 100644 --- a/src/drivers/usb/acpi/intel_bluetooth.c +++ b/src/drivers/usb/acpi/intel_bluetooth.c @@ -221,6 +221,32 @@ acpigen_pop_len(); /* + * Method (_PS0, 0, NotSerialized) + * { + * \_SB.PCI0.SBTE(1) + * } + */ + acpigen_write_method("_PS0", 0); + { + acpigen_emit_namestring("\\_SB.PCI0.SBTE"); + acpigen_emit_byte(1); + } + acpigen_pop_len(); + +/* + * Name (_PS3, Package (0x01) + * { + * \_SB.PCI0.SBTE(0) + * } + */ + acpigen_write_method("_PS3", 0); + { + acpigen_emit_namestring("\\_SB.PCI0.SBTE"); + acpigen_emit_byte(0); + } + acpigen_pop_len(); + +/* * Method (AOLD, 0, NotSerialized) * { * Name (AODS, Package (0x03) -- To view, visit https://review.coreboot.org/c/coreboot/+/86507?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0e37fc0369b1dc2b166f851daa183b145a09eb32 Gerrit-Change-Number: 86507 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: drivers/usb/intel-bluetooth: Remove the _PR3 Object
by Sean Rhodes (Code Review) 28 Feb '25

28 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86595?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: drivers/usb/intel-bluetooth: Remove the _PR3 Object ...................................................................... drivers/usb/intel-bluetooth: Remove the _PR3 Object _PR3 should return resources required for the device to be in D3Hot for which the Intel Bluetooth needs none, so remove it. Change-Id: I65f206899affd46d791c2ba39235a1af320395d2 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86595 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/usb/acpi/intel_bluetooth.c 1 file changed, 0 insertions(+), 13 deletions(-) Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/drivers/usb/acpi/intel_bluetooth.c b/src/drivers/usb/acpi/intel_bluetooth.c index 6307dcb..5ed42c8 100644 --- a/src/drivers/usb/acpi/intel_bluetooth.c +++ b/src/drivers/usb/acpi/intel_bluetooth.c @@ -221,19 +221,6 @@ acpigen_pop_len(); /* - * Name (_PR3, Package (0x01) - * { - * BTRT - * }) - */ - acpigen_write_name("_PR3"); - { - acpigen_write_package(1); - acpigen_emit_namestring("BTRT"); - } - acpigen_pop_len(); - -/* * Method (AOLD, 0, NotSerialized) * { * Name (AODS, Package (0x03) -- To view, visit https://review.coreboot.org/c/coreboot/+/86595?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I65f206899affd46d791c2ba39235a1af320395d2 Gerrit-Change-Number: 86595 Gerrit-PatchSet: 4 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: drivers/usb/intel_bluetooth: Guard BTRK if no GPIO passed
by Sean Rhodes (Code Review) 28 Feb '25

28 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86401?usp=email ) ( 13 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: drivers/usb/intel_bluetooth: Guard BTRK if no GPIO passed ...................................................................... drivers/usb/intel_bluetooth: Guard BTRK if no GPIO passed Don't attempt any GPIO operations of there isn't a reset GPIO specified. Change-Id: I9c97963e61f790f2d9c55d8ec1a384a5779782b4 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86401 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/usb/acpi/intel_bluetooth.c 1 file changed, 12 insertions(+), 10 deletions(-) Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/drivers/usb/acpi/intel_bluetooth.c b/src/drivers/usb/acpi/intel_bluetooth.c index 151930f..6307dcb 100644 --- a/src/drivers/usb/acpi/intel_bluetooth.c +++ b/src/drivers/usb/acpi/intel_bluetooth.c @@ -328,17 +328,19 @@ */ acpigen_write_method("BTRK", 1); { - acpigen_write_if_lequal_op_int(ARG0_OP, 1); - { - /* De-assert reset */ - acpigen_disable_tx_gpio(reset_gpio); + if (reset_gpio->pin_count) { + acpigen_write_if_lequal_op_int(ARG0_OP, 1); + { + /* De-assert reset */ + acpigen_disable_tx_gpio(reset_gpio); + } + acpigen_write_else(); + { + /* Assert Reset */ + acpigen_enable_tx_gpio(reset_gpio); + } + acpigen_pop_len(); } - acpigen_write_else(); - { - /* Assert Reset */ - acpigen_enable_tx_gpio(reset_gpio); - } - acpigen_pop_len(); } acpigen_pop_len(); -- To view, visit https://review.coreboot.org/c/coreboot/+/86401?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9c97963e61f790f2d9c55d8ec1a384a5779782b4 Gerrit-Change-Number: 86401 Gerrit-PatchSet: 16 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[M] Change in coreboot[main]: drivers/usb/acpi: Account for GPIO polarity
by Sean Rhodes (Code Review) 28 Feb '25

28 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86400?usp=email ) ( 15 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: drivers/usb/acpi: Account for GPIO polarity ...................................................................... drivers/usb/acpi: Account for GPIO polarity Whilst the GPIO's used for Intel Bluetooth should always be consistent as to whether they're active high or active low, adjust the driver to pass the GPIO as a pointer, so that it can correctly account for polarity. Change-Id: Ib481d49d536b702fef149af882209501c61de6da Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86400 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/drivers/usb/acpi/chip.h M src/drivers/usb/acpi/intel_bluetooth.c M src/drivers/usb/acpi/usb_acpi.c 3 files changed, 38 insertions(+), 26 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/drivers/usb/acpi/chip.h b/src/drivers/usb/acpi/chip.h index f5edba4..434d856 100644 --- a/src/drivers/usb/acpi/chip.h +++ b/src/drivers/usb/acpi/chip.h @@ -88,10 +88,11 @@ bool usb_acpi_get_pld(const struct device *usb_device, struct acpi_pld *pld); /* Intel Bluetooth */ -void acpi_device_intel_bt(unsigned int reset_gpio, - unsigned int enable_gpio, +void acpi_device_intel_bt(const struct acpi_gpio *enable_gpio, + const struct acpi_gpio *reset_gpio, bool audio_offload); -void acpi_device_intel_bt_common(unsigned int enable_gpio, - unsigned int reset_gpio); + +void acpi_device_intel_bt_common(const struct acpi_gpio *enable_gpio, + const struct acpi_gpio *reset_gpio); #endif /* __USB_ACPI_CHIP_H__ */ diff --git a/src/drivers/usb/acpi/intel_bluetooth.c b/src/drivers/usb/acpi/intel_bluetooth.c index a979b42..151930f 100644 --- a/src/drivers/usb/acpi/intel_bluetooth.c +++ b/src/drivers/usb/acpi/intel_bluetooth.c @@ -44,7 +44,9 @@ void (*reset_supported[])(void *) = { check_reset_delay, set_reset_delay }; void (*reset_unsupported[])(void *) = { not_supported }; -void acpi_device_intel_bt(unsigned int reset_gpio, unsigned int enable_gpio, bool audio_offload) +void acpi_device_intel_bt(const struct acpi_gpio *enable_gpio, + const struct acpi_gpio *reset_gpio, + bool audio_offload) { /* * Name (RDLY, 0x69) @@ -91,8 +93,10 @@ struct dsm_uuid uuid_callbacks[] = { DSM_UUID("aa10f4e0-81ac-4233-abf6-3b2ac50e28d9", - reset_gpio ? reset_supported : reset_unsupported, - reset_gpio ? ARRAY_SIZE(reset_supported) : ARRAY_SIZE(reset_unsupported), + reset_gpio->pin_count ? + reset_supported : reset_unsupported, + reset_gpio->pin_count ? + ARRAY_SIZE(reset_supported) : ARRAY_SIZE(reset_unsupported), NULL), }; @@ -130,7 +134,7 @@ { acpigen_write_method("_STA", 0); { - if (enable_gpio) { + if (enable_gpio->pin_count) { acpigen_write_store(); acpigen_emit_namestring("\\_SB.PCI0.GBTE"); acpigen_emit_byte(LOCAL0_OP); @@ -144,7 +148,7 @@ acpigen_write_method("_ON", 0); { - if (enable_gpio) { + if (enable_gpio->pin_count) { acpigen_emit_namestring("\\_SB.PCI0.SBTE"); acpigen_emit_byte(1); } @@ -153,7 +157,7 @@ acpigen_write_method("_OFF", 0); { - if (enable_gpio) { + if (enable_gpio->pin_count) { acpigen_emit_namestring("\\_SB.PCI0.SBTE"); acpigen_emit_byte(0); } @@ -162,7 +166,7 @@ acpigen_write_method("_RST", 0); { - if (reset_gpio) { + if (reset_gpio->pin_count) { acpigen_write_store(); acpigen_write_acquire("\\_SB.PCI0.CNMT", 1000); acpigen_emit_byte(LOCAL0_OP); @@ -258,7 +262,8 @@ acpigen_pop_len(); } -void acpi_device_intel_bt_common(unsigned int enable_gpio, unsigned int reset_gpio) +void acpi_device_intel_bt_common(const struct acpi_gpio *enable_gpio, + const struct acpi_gpio *reset_gpio) { acpigen_write_scope("\\_SB.PCI0"); /* @@ -279,14 +284,14 @@ */ acpigen_write_method("SBTE", 1); { - if (enable_gpio) { + if (enable_gpio->pin_count) { acpigen_write_if_lequal_op_int(ARG0_OP, 1); { - acpigen_soc_set_tx_gpio(enable_gpio); + acpigen_enable_tx_gpio(enable_gpio); } acpigen_write_else(); { - acpigen_soc_clear_tx_gpio(enable_gpio); + acpigen_disable_tx_gpio(enable_gpio); } acpigen_pop_len(); } @@ -301,8 +306,8 @@ */ acpigen_write_method("GBTE", 0); { - if (enable_gpio) { - acpigen_soc_get_tx_gpio(enable_gpio); + if (enable_gpio->pin_count) { + acpigen_get_tx_gpio(enable_gpio); acpigen_write_return_op(LOCAL0_OP); } else { acpigen_write_return_integer(0); @@ -325,11 +330,13 @@ { acpigen_write_if_lequal_op_int(ARG0_OP, 1); { - acpigen_soc_set_tx_gpio(reset_gpio); + /* De-assert reset */ + acpigen_disable_tx_gpio(reset_gpio); } acpigen_write_else(); { - acpigen_soc_clear_tx_gpio(reset_gpio); + /* Assert Reset */ + acpigen_enable_tx_gpio(reset_gpio); } acpigen_pop_len(); } @@ -338,13 +345,17 @@ /* * Method (GBTR, 0, NotSerialized) * { - * Return (GTXS (reset_gpio)) + * Local0 = GTXS (reset_gpio) + * Local0 ^= One + * Return (Local0) * } */ acpigen_write_method("GBTR", 0); { - if (reset_gpio) { - acpigen_soc_get_tx_gpio(reset_gpio); + if (reset_gpio->pin_count) { + /* Return 1 if not in reset */ + acpigen_get_tx_gpio(reset_gpio); + acpigen_write_xor(LOCAL0_OP, 1, LOCAL0_OP); acpigen_write_return_op(LOCAL0_OP); } else { acpigen_write_return_op(0); diff --git a/src/drivers/usb/acpi/usb_acpi.c b/src/drivers/usb/acpi/usb_acpi.c index a920fa1..8173c06 100644 --- a/src/drivers/usb/acpi/usb_acpi.c +++ b/src/drivers/usb/acpi/usb_acpi.c @@ -111,8 +111,8 @@ } if (config->is_intel_bluetooth) - acpi_device_intel_bt(config->reset_gpio.pins[0], - config->enable_gpio.pins[0], + acpi_device_intel_bt(&config->enable_gpio, + &config->reset_gpio, config->cnvi_bt_audio_offload); acpigen_pop_len(); @@ -122,8 +122,8 @@ * other code to access it i.e. CNVi driver. */ if (config->is_intel_bluetooth) - acpi_device_intel_bt_common(config->enable_gpio.pins[0], - config->reset_gpio.pins[0]); + acpi_device_intel_bt_common(&config->enable_gpio, + &config->reset_gpio); printk(BIOS_INFO, "%s: %s at %s\n", path, config->desc ? : dev->chip_ops->name, dev_path(dev)); -- To view, visit https://review.coreboot.org/c/coreboot/+/86400?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib481d49d536b702fef149af882209501c61de6da Gerrit-Change-Number: 86400 Gerrit-PatchSet: 18 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: soc/intel/cnvi: Increase the reset delay to 160ms from 105ms
by Sean Rhodes (Code Review) 28 Feb '25

28 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86489?usp=email ) ( 7 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/intel/cnvi: Increase the reset delay to 160ms from 105ms ...................................................................... soc/intel/cnvi: Increase the reset delay to 160ms from 105ms The Intel reference code for Thunder Peak increase the reset delay to 160ms from 105ms seen on Jefferson Peak, Cyclone Peak and others. For the sake of 110ms, use 160ms to cover all use cases. Change-Id: I19c1bf7eeffa340e2564381a184ebfaca89bf364 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86489 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/soc/intel/common/block/cnvi/cnvi.c 1 file changed, 4 insertions(+), 4 deletions(-) Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/soc/intel/common/block/cnvi/cnvi.c b/src/soc/intel/common/block/cnvi/cnvi.c index f082197..e23ada8 100644 --- a/src/soc/intel/common/block/cnvi/cnvi.c +++ b/src/soc/intel/common/block/cnvi/cnvi.c @@ -133,7 +133,7 @@ * If ((\_SB.PCI0.GBTR() == One)) * { * \_SB.PCI0.BTRK (Zero) - * Sleep (105) + * Sleep (160 * Local2 = One * } * } @@ -146,7 +146,7 @@ * If ((Local2 == One)) * { * \_SB.PCI0.BTRK (One) - * Sleep (105) + * Sleep (160) * } * } * Else @@ -242,7 +242,7 @@ acpigen_emit_namestring("\\_SB.PCI0.BTRK"); acpigen_emit_byte(0); - acpigen_write_sleep(105); + acpigen_write_sleep(160); acpigen_write_store_ops(1, LOCAL2_OP); } @@ -283,7 +283,7 @@ { acpigen_emit_namestring("\\_SB.PCI0.BTRK"); acpigen_emit_byte(1); - acpigen_write_sleep(105); + acpigen_write_sleep(160); } acpigen_pop_len(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/86489?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I19c1bf7eeffa340e2564381a184ebfaca89bf364 Gerrit-Change-Number: 86489 Gerrit-PatchSet: 11 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: mb/starlabs/{byte_adl,starlite_adl}: Enable SW RF Kill for CNVi
by Sean Rhodes (Code Review) 28 Feb '25

28 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86428?usp=email ) Change subject: mb/starlabs/{byte_adl,starlite_adl}: Enable SW RF Kill for CNVi ...................................................................... mb/starlabs/{byte_adl,starlite_adl}: Enable SW RF Kill for CNVi Specify an enable GPIO for CNVi wireless so that the driver will add support for WiFi SW RF Kill. Test=boot starlite_adl/byte_adl, and use acpi_call dkms to check that _OFF and _ON Methods in the power resource successfully disable the wireless. Change-Id: Ib172230f2c9e926870e35f040ce1b80628561863 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86428 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb M src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb 2 files changed, 2 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb b/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb index bbedc96..df79411fa 100644 --- a/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb +++ b/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb @@ -133,6 +133,7 @@ device ref cnvi_wifi on chip drivers/wifi/generic register "add_acpi_dma_property" = "true" + register "cnvi_enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)" register "enable_cnvi_ddr_rfim" = "true" device generic 0 on end end diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb index 5b8bd2c..247c5bc 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb @@ -119,6 +119,7 @@ device ref cnvi_wifi on chip drivers/wifi/generic register "add_acpi_dma_property" = "true" + register "cnvi_enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)" register "enable_cnvi_ddr_rfim" = "true" device generic 0 on end end -- To view, visit https://review.coreboot.org/c/coreboot/+/86428?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib172230f2c9e926870e35f040ce1b80628561863 Gerrit-Change-Number: 86428 Gerrit-PatchSet: 18 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[L] Change in coreboot[main]: mb/google/nissa/var/guren: Add initial override devicetree
by Kapil Porwal (Code Review) 28 Feb '25

28 Feb '25

Attention is currently required from: Brian Hsu. Kapil Porwal has posted comments on this change by Brian Hsu. ( https://review.coreboot.org/c/coreboot/+/86602?usp=email ) Change subject: mb/google/nissa/var/guren: Add initial override devicetree ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86602?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia43a78c340426069571172319be1675b3d94eba4 Gerrit-Change-Number: 86602 Gerrit-PatchSet: 1 Gerrit-Owner: Brian Hsu <brian_hsu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-CC: David Li <david_li(a)pegatron.corp-partner.google.com> Gerrit-CC: Samuel Chen <samuel_chen(a)pegatron.corp-partner.google.com> Gerrit-CC: Wayne3 Wang <wayne3_wang(a)pegatron.corp-partner.google.com> Gerrit-Attention: Brian Hsu <brian_hsu(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Fri, 28 Feb 2025 08:45:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/cnvi: Deref BTRK as it might not exist
by Sean Rhodes (Code Review) 28 Feb '25

28 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86450?usp=email ) Change subject: soc/intel/cnvi: Deref BTRK as it might not exist ...................................................................... soc/intel/cnvi: Deref BTRK as it might not exist Check for the existence of BTRK method before attempting to call it, as coreboot doesn't enforce its creation. Change-Id: Ibb0dace635c6a014ce65ae3d1c96a92ff991ce5b Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86450 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/soc/intel/common/block/cnvi/cnvi.c 1 file changed, 16 insertions(+), 10 deletions(-) Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/soc/intel/common/block/cnvi/cnvi.c b/src/soc/intel/common/block/cnvi/cnvi.c index e0a9566..f082197 100644 --- a/src/soc/intel/common/block/cnvi/cnvi.c +++ b/src/soc/intel/common/block/cnvi/cnvi.c @@ -129,11 +129,13 @@ * If (((PCRR (CNVI_SIDEBAND_ID, CNVI_ABORT_PLDR) & CNVI_ABORT_REQUEST) == Zero)) * { * Local2 = Zero - * If ((\_SB.PCI0.GBTR() == One)) - * { - * \_SB.PCI0.BTRK (Zero) - * Sleep (105) - * Local2 = One + * If (CondRefOf (\_SB.PCI0.GBTR)) { + * If ((\_SB.PCI0.GBTR() == One)) + * { + * \_SB.PCI0.BTRK (Zero) + * Sleep (105) + * Local2 = One + * } * } * PCRO (CNVI_SIDEBAND_ID, CNVI_ABORT_PLDR, CNVI_ABORT_REQUEST | CNVI_ABORT_ENABLE) * Sleep (10) @@ -233,14 +235,18 @@ acpigen_write_if_lequal_op_int(LOCAL0_OP, 0); { acpigen_write_store_int_to_op(0, LOCAL2_OP); - acpigen_write_if_lequal_namestr_int("\\_SB.PCI0.GBTR", 1); + acpigen_write_if_cond_ref_of("\\_SB.PCI0.GBTR"); { - acpigen_emit_namestring("\\_SB.PCI0.BTRK"); - acpigen_emit_byte(0); + acpigen_write_if_lequal_namestr_int("\\_SB.PCI0.GBTR", 1); + { + acpigen_emit_namestring("\\_SB.PCI0.BTRK"); + acpigen_emit_byte(0); - acpigen_write_sleep(105); + acpigen_write_sleep(105); - acpigen_write_store_ops(1, LOCAL2_OP); + acpigen_write_store_ops(1, LOCAL2_OP); + } + acpigen_pop_len(); } acpigen_pop_len(); -- To view, visit https://review.coreboot.org/c/coreboot/+/86450?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibb0dace635c6a014ce65ae3d1c96a92ff991ce5b Gerrit-Change-Number: 86450 Gerrit-PatchSet: 15 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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