coreboot-gerrit June 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: drivers/spi/acpi: Add generic property list
by Karthik Ramasubramanian (Code Review) 27 Jun '24

27 Jun '24

Attention is currently required from: Felix Held, Jian Tong, Kun Liu, Paul Menzel, Subrata Banik. Karthik Ramasubramanian has posted comments on this change by Kun Liu. ( https://review.coreboot.org/c/coreboot/+/83139?usp=email ) Change subject: drivers/spi/acpi: Add generic property list ...................................................................... Patch Set 8: (1 comment) File src/drivers/spi/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/83139/comment/774c8186_fd2b8ece?us… : PS8, Line 152: acpi_dp_add_property_list(dsd, config->property_list, > shouldn't this function only be called when config->property_count is 0 or is it intended that this […] That function handles property_count of 0 ``` for (i = 0; i < property_count; i++) { ... } ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/83139?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8b18e0a2925e6fd36e3a470bde9910661b7558b8 Gerrit-Change-Number: 83139 Gerrit-PatchSet: 8 Gerrit-Owner: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Attention: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 27 Jun 2024 15:49:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>

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[M] Change in coreboot[main]: acpi/acpi.c: fix XSDT handling on QEMU
by Krystian Hebel (Code Review) 27 Jun '24

27 Jun '24

Krystian Hebel has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/82698?usp=email ) Change subject: acpi/acpi.c: fix XSDT handling on QEMU ...................................................................... Abandoned Different fix for the same issue has been implemented in CB:83116 -- To view, visit https://review.coreboot.org/c/coreboot/+/82698?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7f38467b7de3f35fc3ec3854a840de8345cd0fe5 Gerrit-Change-Number: 82698 Gerrit-PatchSet: 4 Gerrit-Owner: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com>

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[M] Change in coreboot[main]: acpi/acpi.c: fix XSDT handling on QEMU
by Krystian Hebel (Code Review) 27 Jun '24

27 Jun '24

Krystian Hebel has posted comments on this change by Krystian Hebel. ( https://review.coreboot.org/c/coreboot/+/82698?usp=email ) Change subject: acpi/acpi.c: fix XSDT handling on QEMU ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > Same bug, different fix: CB:83116 I'm abandoning this because of that change. -- To view, visit https://review.coreboot.org/c/coreboot/+/82698?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7f38467b7de3f35fc3ec3854a840de8345cd0fe5 Gerrit-Change-Number: 82698 Gerrit-PatchSet: 4 Gerrit-Owner: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Thu, 27 Jun 2024 15:30:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com>

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[XS] Change in coreboot[main]: lib/string: change parameter types to match C standard
by Felix Held (Code Review) 27 Jun '24

27 Jun '24

Felix Held has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/83222?usp=email ) Change subject: lib/string: change parameter types to match C standard ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: hm, i wouldn't have fast-path merged this one; the usual 24h with submitting this one should have been fine here, since this wasn't some fix to unbreak the tree -- To view, visit https://review.coreboot.org/c/coreboot/+/83222?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I485e45e18232a0d1625d4d626f923ec66cfbe4a2 Gerrit-Change-Number: 83222 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 27 Jun 2024 15:22:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: drivers/spi/acpi: Add generic property list
by Felix Held (Code Review) 27 Jun '24

27 Jun '24

Attention is currently required from: Jian Tong, Kun Liu, Paul Menzel, Subrata Banik. Felix Held has posted comments on this change by Kun Liu. ( https://review.coreboot.org/c/coreboot/+/83139?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: drivers/spi/acpi: Add generic property list ...................................................................... Patch Set 8: (2 comments) File src/drivers/spi/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/83139/comment/5cca3143_82be888c?us… : PS8, Line 152: acpi_dp_add_property_list(dsd, config->property_list, shouldn't this function only be called when config->property_count is 0 or is it intended that this will also generated when config->property_count is 0? File src/drivers/spi/acpi/chip.h: https://review.coreboot.org/c/coreboot/+/83139/comment/b453df60_a039fecc?us… : PS8, Line 49: int unsigned int -- To view, visit https://review.coreboot.org/c/coreboot/+/83139?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8b18e0a2925e6fd36e3a470bde9910661b7558b8 Gerrit-Change-Number: 83139 Gerrit-PatchSet: 8 Gerrit-Owner: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Attention: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Thu, 27 Jun 2024 15:11:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: 3rdparty/arm-trusted-firmware: Update submodule to upstream master
by Felix Held (Code Review) 27 Jun '24

27 Jun '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83000?usp=email ) Change subject: 3rdparty/arm-trusted-firmware: Update submodule to upstream master ...................................................................... 3rdparty/arm-trusted-firmware: Update submodule to upstream master Updating from commit id 17bef2248: 2024-02-05 23:33:50 +0100 - (Merge "feat(fvp): delegate FFH RAS handling to SP" into integration) to commit id fe4df8bda: 2024-06-07 12:55:56 +0200 - (Merge "feat(rockchip): add RK3566/RK3568 Socs support" into integration) This brings in 713 new commits. Change-Id: Icce3595fef3a844034e7cc76fc8480ed5b21618c Signed-off-by: Felix Singer <felixsinger(a)posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83000 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- M 3rdparty/arm-trusted-firmware 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Julius Werner: Looks good to me, approved build bot (Jenkins): Verified diff --git a/3rdparty/arm-trusted-firmware b/3rdparty/arm-trusted-firmware index 48f1bc9..fe4df8b 160000 --- a/3rdparty/arm-trusted-firmware +++ b/3rdparty/arm-trusted-firmware @@ -1 +1 @@ -Subproject commit 48f1bc9f52491d51ca92a1d396ccbe6a9d09e780 +Subproject commit fe4df8bdae0a5d1d87c67c24fdd03595cd90dd08 -- To view, visit https://review.coreboot.org/c/coreboot/+/83000?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icce3595fef3a844034e7cc76fc8480ed5b21618c Gerrit-Change-Number: 83000 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/google/brask/var/bujia: Configure Serial IO UARTs Mode
by Felix Held (Code Review) 27 Jun '24

27 Jun '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83205?usp=email ) Change subject: mb/google/brask/var/bujia: Configure Serial IO UARTs Mode ...................................................................... mb/google/brask/var/bujia: Configure Serial IO UARTs Mode This patch configures Serial IO UARTs mode as below. UART0 and UART1 in PCI mode and keep UART2 disable as per hardware design. BUG=b:338917836 BRANCH=firmware-brya-14505.B TEST= USE="-project_all project_bujia" emerge-brask coreboot Change-Id: I5617331aaf505b97e25a717b145fb70dc53f5a38 Signed-off-by: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83205 Reviewed-by: Eric Lai <ericllai(a)google.com> Reviewed-by: Derek Huang <derekhuang(a)google.com> Reviewed-by: Varshit Pandya <pandyavarshit(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/brya/variants/bujia/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-) Approvals: Subrata Banik: Looks good to me, approved Derek Huang: Looks good to me, approved build bot (Jenkins): Verified Varshit Pandya: Looks good to me, but someone else must approve Eric Lai: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/brya/variants/bujia/overridetree.cb b/src/mainboard/google/brya/variants/bujia/overridetree.cb index 252d82f..4255296 100644 --- a/src/mainboard/google/brya/variants/bujia/overridetree.cb +++ b/src/mainboard/google/brya/variants/bujia/overridetree.cb @@ -46,6 +46,12 @@ [PchSerialIoIndexGSPI1] = PchSerialIoDisabled, }" + register "serial_io_uart_mode" = "{ + [PchSerialIoIndexUART0] = PchSerialIoPci, + [PchSerialIoIndexUART1] = PchSerialIoPci, + [PchSerialIoIndexUART2] = PchSerialIoDisabled, + }" + register "ddi_ports_config" = "{ [DDI_PORT_A] = DDI_ENABLE_HPD, [DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC, -- To view, visit https://review.coreboot.org/c/coreboot/+/83205?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5617331aaf505b97e25a717b145fb70dc53f5a38 Gerrit-Change-Number: 83205 Gerrit-PatchSet: 6 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: Makefile: Add cleanall-symlink target
by Felix Held (Code Review) 27 Jun '24

27 Jun '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83123?usp=email ) Change subject: Makefile: Add cleanall-symlink target ...................................................................... Makefile: Add cleanall-symlink target This target looks for symbolic links in the coreboot directory, excluding the 3rdparty and crossgcc directories, which both typically have numerous symbolic links, and deletes anything that is found. All possible links are verified as symbolic links before being removed. Any removed links show where they were linked from in case they need to be restored. Signed-off-by: Martin Roth <gaumless(a)gmail.com> Change-Id: I8a56e7c628701e4a0471833443b08ab2bcceb27e Reviewed-on: https://review.coreboot.org/c/coreboot/+/83123 Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-by: Eric Lai <ericllai(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M Makefile 1 file changed, 12 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Elyes Haouas: Looks good to me, approved Eric Lai: Looks good to me, but someone else must approve diff --git a/Makefile b/Makefile index f7be19c..60570a0 100644 --- a/Makefile +++ b/Makefile @@ -524,6 +524,16 @@ for link in $$EXISTING_SYMLINKS; do \ echo -e "\tUNLINK $$link"; \ rm "$$link"; \ + +cleanall-symlink: + echo "Deleting all symbolic links in the coreboot tree (excluding 3rdparty & crossgcc)"; \ + EXISTING_SYMLINKS="$$(find $(top) -type l | grep -v "3rdparty\|crossgcc" )"; \ + for link in $${EXISTING_SYMLINKS}; do \ + if [ -L "$${link}" ]; then \ + REALDIR="$$(realpath "$${link}")"; \ + echo " UNLINK $${link} (linked from $${REALDIR})"; \ + rm "$${link}"; \ + fi; \ done clean-for-update: @@ -553,4 +563,5 @@ rm -f abuild*.xml junit.xml* util/lint/junit.xml .PHONY: $(PHONY) clean clean-for-update clean-cscope cscope distclean sphinx sphinx-lint -.PHONY: ctags-project cscope-project clean-ctags symlink clean-symlink +.PHONY: ctags-project cscope-project clean-ctags +.PHONY: symlink clean-symlink cleanall-symlink -- To view, visit https://review.coreboot.org/c/coreboot/+/83123?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8a56e7c628701e4a0471833443b08ab2bcceb27e Gerrit-Change-Number: 83123 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: Makefile: Update symlink target
by Felix Held (Code Review) 27 Jun '24

27 Jun '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83122?usp=email ) Change subject: Makefile: Update symlink target ...................................................................... Makefile: Update symlink target This almost completely replaces the original symlink target for creating symbolic links from site-local into the coreboot tree. Changes include: - A comment about the format of the symlink.txt file - Verify that there are symlink.txt files before doing anything. - Note that symbolic links that already exist are being skipped. - Only use the first line of the symlink.txt file - Make sure the symbolic link to be created is inside the coreboot dir. - Output errors to STDERR - echo -e isn't supported by posix shells, so replace /t with two spaces Signed-off-by: Martin Roth <gaumless(a)gmail.com> Change-Id: I9b0d1b5bc19556bc41ca98519390e69ea104bd1b Reviewed-on: https://review.coreboot.org/c/coreboot/+/83122 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-by: Eric Lai <ericllai(a)google.com> --- M Makefile 1 file changed, 25 insertions(+), 9 deletions(-) Approvals: Elyes Haouas: Looks good to me, approved build bot (Jenkins): Verified Eric Lai: Looks good to me, but someone else must approve diff --git a/Makefile b/Makefile index fddcc5c..f7be19c 100644 --- a/Makefile +++ b/Makefile @@ -487,19 +487,35 @@ sphinx-lint: $(MAKE) SPHINXOPTS=-W -C Documentation sphinx +# Look at all of the files in the SYMLINK_LIST and create the symbolic links +# into the coreboot tree. Each symlink.txt file in site-local should be in the +# directory linked from and have a single line with the path to the location to +# link to. The path must be relative to the top of the coreboot directory. symlink: - @echo "Creating Symbolic Links.."; \ + if [ -z "$(SYMLINK_LIST)" ]; then \ + echo "No site-local symbolic links to create."; \ + exit 0; \ + fi; \ + echo "Creating symbolic links.."; \ for link in $(SYMLINK_LIST); do \ - SYMLINK=`cat $$link`; \ - REALPATH=`realpath $$link`; \ - if [ -L "$$SYMLINK" ]; then \ + LINKTO="$(top)/$$(head -n 1 "$${link}")"; \ + LINKFROM=$$(dirname "$$(realpath "$${link}")"); \ + if [ -L "$${LINKTO}" ]; then \ + echo " $${LINKTO} exists - skipping"; \ continue; \ - elif [ ! -e "$$SYMLINK" ]; then \ - echo -e "\tLINK $$SYMLINK -> $$(dirname $$REALPATH)"; \ - ln -s $$(dirname $$REALPATH) $$SYMLINK; \ + fi; \ + LINKTO="$$(realpath -m "$${LINKTO}")" 2>/dev/null; \ + if [ "$${LINKTO}" = "$$(echo "$${LINKTO}" | sed "s|^$(top)||" )" ]; then \ + echo " FAILED: $${LINKTO} is outside of current directory." >&2; \ + continue; \ + fi; \ + if [ ! -e "$${LINKTO}" ]; then \ + echo " LINK $${LINKTO} -> $${LINKFROM}"; \ + ln -s "$${LINKFROM}" "$${LINKTO}" || \ + echo "FAILED: Could not create link." >&2; \ else \ - echo -e "\tFAILED: $$SYMLINK exists"; \ - fi \ + echo " FAILED: $${LINKTO} exists as a file or directory." >&2; \ + fi; \ done clean-symlink: -- To view, visit https://review.coreboot.org/c/coreboot/+/83122?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9b0d1b5bc19556bc41ca98519390e69ea104bd1b Gerrit-Change-Number: 83122 Gerrit-PatchSet: 4 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com>

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[XS] Change in coreboot[main]: mb/google/brox/var/lotso: GPP_B14 used for buzzer
by Felix Held (Code Review) 27 Jun '24

27 Jun '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83147?usp=email ) Change subject: mb/google/brox/var/lotso: GPP_B14 used for buzzer ...................................................................... mb/google/brox/var/lotso: GPP_B14 used for buzzer ALC257 does not supoort built-in digtal buzzer, So use external pwm to PCBEEP for beep sound. BUG=b:346956771 BRANCH=None TEST=emerge-brox coreboot sys-boot/chromeos-bootimage firmware-shell: devbeep -> can output beep normally. Change-Id: If924f9f27f229420e78015f418a97b2d5daf62e5 Signed-off-by: Jing Tong <tongjian(a)huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83147 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Reviewed-by: Eric Lai <ericllai(a)google.com> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/brox/variants/lotso/gpio.c 1 file changed, 3 insertions(+), 0 deletions(-) Approvals: Karthik Ramasubramanian: Looks good to me, approved Eric Lai: Looks good to me, approved build bot (Jenkins): Verified Wentao Qin: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/brox/variants/lotso/gpio.c b/src/mainboard/google/brox/variants/lotso/gpio.c index 230ecaf..c85363d 100644 --- a/src/mainboard/google/brox/variants/lotso/gpio.c +++ b/src/mainboard/google/brox/variants/lotso/gpio.c @@ -7,6 +7,9 @@ /* Pad configuration in ramstage */ static const struct pad_config override_gpio_table[] = { + /* GPP_B14 : [NF1: SPKR NF2: TIME_SYNC1 NF4: SATA_LED# NF5: ISH_GP6 + * NF6: USB_C_GPP_B14] ==> ACZ_SPKR */ + PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1), /* GPP_D5 : SRCCLKREQ0_L ==> PCIE_REFCLK_SSD1_REQ_N */ PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), /* GPP_D6 : [NF1: SRCCLKREQ1# NF6: USB_C_GPP_D6] ==> SOC_GPP_E10 (NC) */ -- To view, visit https://review.coreboot.org/c/coreboot/+/83147?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If924f9f27f229420e78015f418a97b2d5daf62e5 Gerrit-Change-Number: 83147 Gerrit-PatchSet: 2 Gerrit-Owner: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com>

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