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Change subject: commonlib: Add ELOG_TYPE_FW_EARLY_SOL eventLog type
......................................................................
Patch Set 8:
(1 comment)
File src/commonlib/bsd/include/commonlib/bsd/elog.h:
https://review.coreboot.org/c/coreboot/+/72670/comment/d55bcc7f_edb9ec8f
PS8, Line 368: #define ELOG_TYPE_FW_EARL
But now 0xb8 is not space out properly :(
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Change subject: soc/amd/cezanne/reset: deduplicate code
......................................................................
Patch Set 1:
(1 comment)
File src/soc/amd/cezanne/reset.c:
https://review.coreboot.org/c/coreboot/+/72690/comment/9975be89_2814322d
PS1, Line 21: do_cold_reset();
is it worth adding a printk here to alert that a warm reset was requested but a cold reset will be performed?
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Change subject: soc/amd/mendocino: Force resets to be cold
......................................................................
Patch Set 4:
(1 comment)
File src/soc/amd/mendocino/fch.c:
https://review.coreboot.org/c/coreboot/+/72486/comment/b2217d80_015dfbf4
PS3, Line 131: pm_write16(PWR_RESET_CFG, pm_read16(PWR_RESET_CFG) | TOGGLE_ALL_PWR_GOOD);
> > fch_init_resets() is there so that when Linux does a reset, it's a cold reset. […]
Done
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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Matt DeVillier, Jon Murphy, Arthur Heymans, Tim Van Patten, Fred Reitberger, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/72486
to look at the new patch set (#4).
Change subject: soc/amd/mendocino: Force resets to be cold
......................................................................
soc/amd/mendocino: Force resets to be cold
Like Cezanne, Mendocino does not support warm resets. Change all resets
(including resets in the OS) to cold resets (like Cezanne).
BUG=b:248221908
TEST=Run suspend_stress_test, then reboot
Change-Id: I1fbb4cc6eb6e6de9616d00d0191ccf3c0ac55278
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
---
M src/soc/amd/mendocino/fch.c
M src/soc/amd/mendocino/reset.c
2 files changed, 24 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/72486/4
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Change subject: soc/intel/tgl: Move ME FSR structures to pertinent header
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/72416/comment/0f9f2e58_8ba21081
PS3, Line 7: soc/intel/tgl: Move ME FSR structures to pertinent header
> How much code size is expected by moving the only function (dump_me_status) to common code consideri […]
Yes, we may need to use SoC specfic Macro's to select the appropriate prints. These macros will be based on ME spec versions.
For ex.
```
if we are merging alderlake(ADL) and meteorlake(MTL) ME source. ADL uses ME spec version 16.x whereas MTL uses 18.x. HFSR fields 'cpu_debug_disable' and 'txt_support' are under HFSR5 in 16.x but same fields are under HFSR6 under spec 18.x
In this particular case, we only need to move appearance of fields 'cpu_debug_disable' and 'txt_support' under relevant macros. Both board specific ME source file can be merged into single file and moved to common, with single set of #if/#elifs.
```
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Change subject: commonlib: Add ELOG_TYPE_FW_EARLY_SOL eventLog type
......................................................................
Patch Set 8:
(1 comment)
File src/commonlib/bsd/include/commonlib/bsd/elog.h:
https://review.coreboot.org/c/coreboot/+/72670/comment/a10d2ea2_715bed55
PS7, Line 368:
> Why do you have two spaces here ? […]
Done
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Change subject: soc/intel/alderlake: Hook up DisableDynamicTccoldHandshake to dev tree
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68635/comment/b19087ef_1c65fe76
PS6, Line 15: Signed-off-by: Kane Chen <kane.chen(a)intel.corp-partner.google.com>
Sign-off is out of place. And usually @intel.com are preferable.
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Change subject: Makefile.inc: Use 'Wmissing-include-dirs' command option
......................................................................
Patch Set 32:
(1 comment)
Patchset:
PS32:
https://review.coreboot.org/c/coreboot/+/71855 is needed
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