coreboot-gerrit February 2023

coreboot-gerrit@coreboot.org

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[XL] Change in coreboot[master]: mb/*: Replace SNB PCI devices with references from chipset.cb
by Felix Held (Code Review) 01 Feb '23

01 Feb '23

Attention is currently required from: Angel Pons, Arthur Heymans, Alexander Couzens, Evgeny Zinoviev. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69502 ) Change subject: mb/*: Replace SNB PCI devices with references from chipset.cb ...................................................................... Patch Set 11: (1 comment) Patchset: PS11: > Maybe mention in commit message that current change is related to sandybridge mb's SNB is the abbreviation for sandybridge which probably just didn't fit into the patch title in long form. might be good to write that in its long form into the main part of the commit message though -- To view, visit https://review.coreboot.org/c/coreboot/+/69502 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I74c34a97ea4340fb11a0db422a48e1418221627e Gerrit-Change-Number: 69502 Gerrit-PatchSet: 11 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Comment-Date: Wed, 01 Feb 2023 20:41:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/xeon_sp: add Kconfig file for SPR-SP
by Lean Sheng Tan (Code Review) 01 Feb '23

01 Feb '23

Attention is currently required from: Arthur Heymans, Jonathan Zhang, Johnny Lin, Christian Walter, Angel Pons, Srinidhi N Kaushik, Tim Chu. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72439 ) Change subject: soc/intel/xeon_sp: add Kconfig file for SPR-SP ...................................................................... Patch Set 7: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/72439 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14cf115b02d8edff9b48e744b798a3b1ba18b8bf Gerrit-Change-Number: 72439 Gerrit-PatchSet: 7 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Wed, 01 Feb 2023 20:27:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/xeon_sp/chip_common.c: Update attach_iio_stacks()
by Paul Menzel (Code Review) 01 Feb '23

01 Feb '23

Attention is currently required from: Simon Chou, Johnny Lin, Christian Walter, Arthur Heymans. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71965 ) Change subject: soc/intel/xeon_sp/chip_common.c: Update attach_iio_stacks() ...................................................................... Patch Set 10: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/71965/comment/ddffc3fa_f9b6cc39 PS10, Line 7: Update attach_iio_stacks() This is too broad. Please be more specific. -- To view, visit https://review.coreboot.org/c/coreboot/+/71965 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica3c61493a0ff6c699b500f30788b2cf5a06c250 Gerrit-Change-Number: 71965 Gerrit-PatchSet: 10 Gerrit-Owner: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 01 Feb 2023 20:16:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: include/bootstate.h: Fail compilation on invalid bootstate hooks
by Paul Menzel (Code Review) 01 Feb '23

01 Feb '23

Attention is currently required from: Arthur Heymans. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72708 ) Change subject: include/bootstate.h: Fail compilation on invalid bootstate hooks ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/72708 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I318165f0bd510aed3138d3612dd3e264901aba96 Gerrit-Change-Number: 72708 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 01 Feb 2023 20:12:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/geralt: Add USB3 HUB reset funtion to bootblock
by Paul Menzel (Code Review) 01 Feb '23

01 Feb '23

Attention is currently required from: Liju-Clr Chen. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72594 ) Change subject: mb/google/geralt: Add USB3 HUB reset funtion to bootblock ...................................................................... Patch Set 8: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/72594/comment/ad12c448_abc35d6a PS8, Line 7: funtion function https://review.coreboot.org/c/coreboot/+/72594/comment/caa42d2e_8d8f82de PS8, Line 12: TEST=boot kernel from USB ok Please elaborate next time. -- To view, visit https://review.coreboot.org/c/coreboot/+/72594 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8df35efb78e90a5b3314840fe2eae81d6e501242 Gerrit-Change-Number: 72594 Gerrit-PatchSet: 8 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Wed, 01 Feb 2023 20:10:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: include/bootstate.h: Fail compilation on invalid bootstate hooks
by Benjamin Doron (Code Review) 01 Feb '23

01 Feb '23

Attention is currently required from: Arthur Heymans. Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72708 ) Change subject: include/bootstate.h: Fail compilation on invalid bootstate hooks ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/72708 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I318165f0bd510aed3138d3612dd3e264901aba96 Gerrit-Change-Number: 72708 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 01 Feb 2023 19:19:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/*: Fix dead bootstate code
by Benjamin Doron (Code Review) 01 Feb '23

01 Feb '23

Attention is currently required from: Arthur Heymans. Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72707 ) Change subject: soc/intel/*: Fix dead bootstate code ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/72707 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b5b834d0663616a9523fd119f007e3bac8e7bf2 Gerrit-Change-Number: 72707 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 01 Feb 2023 19:18:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: commonlib: Add ELOG_TYPE_FW_EARLY_SOL eventLog type
by Jérémy Compostella (Code Review) 01 Feb '23

01 Feb '23

Attention is currently required from: Tarun Tuli, Kapil Porwal, Paul Menzel, Julius Werner, Nick Vaccaro, Yu-Ping Wu. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72670 ) Change subject: commonlib: Add ELOG_TYPE_FW_EARLY_SOL eventLog type ...................................................................... Patch Set 9: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/72670 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3bd5a250c0be824dbbad0236cee7d61a1ffdbc6c Gerrit-Change-Number: 72670 Gerrit-PatchSet: 9 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 01 Feb 2023 19:15:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/qualcomm/sc7280: Memlayout change to support new Crypto sha update
by Shelley Chen (Code Review) 01 Feb '23

01 Feb '23

Shelley Chen has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72646 ) Change subject: soc/qualcomm/sc7280: Memlayout change to support new Crypto sha update ...................................................................... soc/qualcomm/sc7280: Memlayout change to support new Crypto sha update With New Crypto upgrade we need to have 1 block of 4Kb increase in romstage, by which we can see an improvement of Boot performance by 100 msec. BUG=b:218406702 TEST=Validated on qualcomm sc7280 development board Boot performance improved by 100 msec observed. Change-Id: I9f5c8a79993fc1c529fae5cea4c4182663643ddd Signed-off-by: Sudheer Kumar Amrabadi <quic_samrabad(a)quicinc.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72646 Reviewed-by: Shelley Chen <shchen(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yidi Lin <yidilin(a)google.com> --- M src/soc/qualcomm/sc7280/memlayout.ld 1 file changed, 24 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Shelley Chen: Looks good to me, approved Yidi Lin: Looks good to me, approved diff --git a/src/soc/qualcomm/sc7280/memlayout.ld b/src/soc/qualcomm/sc7280/memlayout.ld index bf5272e..95824c7 100644 --- a/src/soc/qualcomm/sc7280/memlayout.ld +++ b/src/soc/qualcomm/sc7280/memlayout.ld @@ -25,8 +25,8 @@ AOPSRAM_END(0x0B100000) SSRAM_START(0x14680000) - OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x14680000, 100K) - REGION(qcsdi, 0x14699000, 48K, 4K) + OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x14680000, 104K) + REGION(qcsdi, 0x1469A000, 44K, 4K) REGION(modem_id, 0x146A5D00, 4, 4) SSRAM_END(0x146AB000) -- To view, visit https://review.coreboot.org/c/coreboot/+/72646 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f5c8a79993fc1c529fae5cea4c4182663643ddd Gerrit-Change-Number: 72646 Gerrit-PatchSet: 3 Gerrit-Owner: Venkat Thogaru <thogaru(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/qualcomm/common/qup: Avoid double decompress of gsi_fw blob
by Shelley Chen (Code Review) 01 Feb '23

01 Feb '23

Shelley Chen has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71927 ) Change subject: soc/qualcomm/common/qup: Avoid double decompress of gsi_fw blob ...................................................................... soc/qualcomm/common/qup: Avoid double decompress of gsi_fw blob During boot, gpi_firmware_load gets called twice because there are 2 serial engines. Thus gsi_fw blob is also decompressed twice and is written to base addresses of SEs. This is redundant. Perform the decompression once on first call and save the header in static variable which can be reused in next call. BUG=b:262426214 TEST=Validated on qualcomm sc7280 development board Saving of 80ms observed while testing with 130 boot cycles. Change-Id: If98a3974f0791dffdf675c02cc28375d0485c485 Signed-off-by: Vijaya Nivarthi <vnivarth(a)codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71927 Reviewed-by: Shelley Chen <shchen(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/qualcomm/common/qupv3_config.c 1 file changed, 30 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Shelley Chen: Looks good to me, approved diff --git a/src/soc/qualcomm/common/qupv3_config.c b/src/soc/qualcomm/common/qupv3_config.c index 919c11b..636f9b2 100644 --- a/src/soc/qualcomm/common/qupv3_config.c +++ b/src/soc/qualcomm/common/qupv3_config.c @@ -9,6 +9,7 @@ #include <soc/addressmap.h> static struct elf_se_hdr *fw_list[SE_PROTOCOL_MAX]; +static struct gsi_fw_hdr *gsi_hdr; void qupv3_se_fw_load_and_init(unsigned int bus, unsigned int protocol, unsigned int mode) @@ -185,16 +186,17 @@ { uint32_t i; uint32_t regVal = 0; - struct gsi_fw_hdr *gsi_hdr; struct gsi_fw_iep *fwIep; struct gsi_fw_iram *fwIRam; struct gsi_regs *regs = (struct gsi_regs *)(uintptr_t)addr; static const char * const filename = "fallback/gsi_fw"; /* Assign firmware header base */ - gsi_hdr = cbfs_map(filename, NULL); - if (!gsi_hdr) - die("*ERROR* * cbfs_map() failed ***\n"); + if (!gsi_hdr) { + gsi_hdr = cbfs_map(filename, NULL); + if (!gsi_hdr) + die("*ERROR* * cbfs_map() failed ***\n"); + } assert(gsi_hdr->magic == GSI_FW_MAGIC_HEADER) -- To view, visit https://review.coreboot.org/c/coreboot/+/71927 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If98a3974f0791dffdf675c02cc28375d0485c485 Gerrit-Change-Number: 71927 Gerrit-PatchSet: 6 Gerrit-Owner: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Vijaya Nivarthi <vnivarth(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: merged

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coreboot-gerrit February 2023