coreboot-gerrit February 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: ec/google/wilco/acpi: Add DPTF RCDP() method
by Paul Fagerburg (Code Review) 01 Feb '23

01 Feb '23

Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72578 ) Change subject: ec/google/wilco/acpi: Add DPTF RCDP() method ...................................................................... ec/google/wilco/acpi: Add DPTF RCDP() method The Windows DPTF drivers expect this method, and if not present appear to hang. Adding this method fixes DPTF under Windows on drallion. Modeled after existing method used by chrome-ec. TEST=build/boot Win11 on google/drallion, verify DPTF functional. Change-Id: I6570345379da413273251ecf5209c4997aac9b11 Original-patch-by: Coolstar <coolstarorganization(a)gmail.com> Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72578 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Caveh Jalali <caveh(a)chromium.org> --- M src/ec/google/wilco/acpi/dptf.asl 1 file changed, 37 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Caveh Jalali: Looks good to me, but someone else must approve Eric Lai: Looks good to me, approved diff --git a/src/ec/google/wilco/acpi/dptf.asl b/src/ec/google/wilco/acpi/dptf.asl index 6de72e8..1b2bf80 100644 --- a/src/ec/google/wilco/acpi/dptf.asl +++ b/src/ec/google/wilco/acpi/dptf.asl @@ -116,3 +116,18 @@ /* Clear sensor events */ W (DWTQ, Local0) } + +#ifdef EC_ENABLE_MULTIPLE_DPTF_PROFILES +/* + * Read current Device DPTF Profile Number + */ +Method (RCDP, 0, NotSerialized) +{ + Local0 = R(DRTI) + If (Local0 == 0) { + Return (R(OTBL)) + } else { + Return (Local0 - 1) + } +} +#endif -- To view, visit https://review.coreboot.org/c/coreboot/+/72578 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6570345379da413273251ecf5209c4997aac9b11 Gerrit-Change-Number: 72578 Gerrit-PatchSet: 4 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: CoolStar <coolstarorganization(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/brya/var/omnigul: Select USE_UNIFIED_AP_FIRMWARE_FOR_UFS_AN...
by Paul Fagerburg (Code Review) 01 Feb '23

01 Feb '23

Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72509 ) Change subject: mb/google/brya/var/omnigul: Select USE_UNIFIED_AP_FIRMWARE_FOR_UFS_AND_NON_UFS ...................................................................... mb/google/brya/var/omnigul: Select USE_UNIFIED_AP_FIRMWARE_FOR_UFS_AND_NON_UFS This patch selects USE_UNIFIED_AP_FIRMWARE_FOR_UFS_AND_NON_UFS for Google/Omnigul variant which intends to achieve a unified AP firmware image across UFS and non-UFS skus. BUG=b:263846075 TEST=FW_NAME=omnigul emerge-brya coreboot Change-Id: I90ae116ccccde48792aeafaa683c7420a95c9886 Signed-off-by: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72509 Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brya/Kconfig.name 1 file changed, 22 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Dtrain Hsu: Looks good to me, approved Subrata Banik: Looks good to me, approved diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 05dc1e6..7b980e7 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -330,3 +330,4 @@ bool "-> Omnigul" select BOARD_GOOGLE_BASEBOARD_BRYA select SOC_INTEL_RAPTORLAKE + select USE_UNIFIED_AP_FIRMWARE_FOR_UFS_AND_NON_UFS -- To view, visit https://review.coreboot.org/c/coreboot/+/72509 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I90ae116ccccde48792aeafaa683c7420a95c9886 Gerrit-Change-Number: 72509 Gerrit-PatchSet: 5 Gerrit-Owner: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/mtl: remove DPTF from D-states list used to enter LPM
by Paul Fagerburg (Code Review) 01 Feb '23

01 Feb '23

Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72603 ) Change subject: soc/intel/mtl: remove DPTF from D-states list used to enter LPM ...................................................................... soc/intel/mtl: remove DPTF from D-states list used to enter LPM The D-state list lists the devices with the corresponding D-state that the devices should be in, in order to enter LPM. DPTF is not mentioned in Intel's document 595644 as one of the devices. This CL removes it to avoid a potential error seen in ADL devices as mentioned in commit 3fd5b0c4cdeb ("soc/intel/adl: remove DPTF from D-states list used to enter LPM") TEST=Built and tested on Rex, saw SSDT generated properly. BUG=b:231582182 Signed-off-by: Eran Mitrani <mitrani(a)google.com> Change-Id: I9192ed9a7fb59ebba14f6d5082b400534b16ca72 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72603 Reviewed-by: Subrata Banik <subratabanik(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/meteorlake/acpi.c 1 file changed, 24 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved diff --git a/src/soc/intel/meteorlake/acpi.c b/src/soc/intel/meteorlake/acpi.c index 14aece3..c679af3 100644 --- a/src/soc/intel/meteorlake/acpi.c +++ b/src/soc/intel/meteorlake/acpi.c @@ -170,7 +170,6 @@ static struct min_sleep_state min_pci_sleep_states[] = { { SA_DEVFN_ROOT, ACPI_DEVICE_SLEEP_D3 }, { SA_DEVFN_IGD, ACPI_DEVICE_SLEEP_D3 }, - { PCI_DEVFN_DPTF, ACPI_DEVICE_SLEEP_D3 }, { PCI_DEVFN_IPU, ACPI_DEVICE_SLEEP_D3 }, { PCI_DEVFN_TBT0, ACPI_DEVICE_SLEEP_D3 }, { PCI_DEVFN_TBT1, ACPI_DEVICE_SLEEP_D3 }, -- To view, visit https://review.coreboot.org/c/coreboot/+/72603 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9192ed9a7fb59ebba14f6d5082b400534b16ca72 Gerrit-Change-Number: 72603 Gerrit-PatchSet: 3 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/intel/mtlrvp: Override display configuration
by Harsha B R (Code Review) 01 Feb '23

01 Feb '23

Attention is currently required from: Jamie Ryu, Sridhar Siricilla, Usha P, Eric Lai. Hello build bot (Jenkins), Jamie Ryu, Sridhar Siricilla, Usha P, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72645 to look at the new patch set (#2). Change subject: mb/intel/mtlrvp: Override display configuration ...................................................................... mb/intel/mtlrvp: Override display configuration This patch enables display configuration for mtlrvp. The change follows mtlrvp schematics. BUG=b:224325352 BRANCH=None TEST=Able to observe corresponding UPD configuration with FSP dump. DdiPortAConfig : 0x1 DdiPortBConfig : 0x0 DdiPortAHpd : 0x0 DdiPortBHpd : 0x1 DdiPortCHpd : 0x0 DdiPort1Hpd : 0x0 DdiPort2Hpd : 0x0 DdiPort3Hpd : 0x0 DdiPort4Hpd : 0x0 DdiPortADdc : 0x0 DdiPortBDdc : 0x1 Signed-off-by: Harsha B R <harsha.b.r(a)intel.com> Change-Id: I05bd7427d6a339ee200731a8dd448e85efc694e0 Signed-off-by: Jamie Ryu <jamie.m.ryu(a)intel.com> --- M src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb 1 file changed, 36 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/72645/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/72645 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I05bd7427d6a339ee200731a8dd448e85efc694e0 Gerrit-Change-Number: 72645 Gerrit-PatchSet: 2 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/geralt: Add USB3 HUB reset funtion to bootblock
by Paul Fagerburg (Code Review) 01 Feb '23

01 Feb '23

Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72594 ) Change subject: mb/google/geralt: Add USB3 HUB reset funtion to bootblock ...................................................................... mb/google/geralt: Add USB3 HUB reset funtion to bootblock After powering on the device, we need to pull USB3_HUB_RST_L up to enable USB3 Hub. TEST=boot kernel from USB ok BUG=b:264841530 Signed-off-by: Bo-Chen Chen <rex-bc.chen(a)mediatek.com> Signed-off-by: Liju-Clr Chen <liju-clr.chen(a)mediatek.com> Change-Id: I8df35efb78e90a5b3314840fe2eae81d6e501242 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72594 Reviewed-by: Yidi Lin <yidilin(a)google.com> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/geralt/bootblock.c M src/mainboard/google/geralt/gpio.h 2 files changed, 30 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved Yidi Lin: Looks good to me, but someone else must approve Rex-BC Chen: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/geralt/bootblock.c b/src/mainboard/google/geralt/bootblock.c index 4476aab..2bd69ad 100644 --- a/src/mainboard/google/geralt/bootblock.c +++ b/src/mainboard/google/geralt/bootblock.c @@ -2,12 +2,18 @@ #include <bootblock_common.h> #include <device/mmio.h> +#include <gpio.h> #include <soc/gpio.h> #include <soc/i2c.h> #include <soc/spi.h> #include "gpio.h" +static void usb3_hub_reset(void) +{ + gpio_output(GPIO_USB3_HUB_RST_L, 1); +} + void bootblock_mainboard_init(void) { mtk_i2c_bus_init(CONFIG_DRIVER_TPM_I2C_BUS, I2C_SPEED_FAST); @@ -15,4 +21,5 @@ mtk_snfc_init(); setup_chromeos_gpios(); gpio_eint_configure(GPIO_GSC_AP_INT_ODL, IRQ_TYPE_EDGE_RISING); + usb3_hub_reset(); } diff --git a/src/mainboard/google/geralt/gpio.h b/src/mainboard/google/geralt/gpio.h index 3793779..7eec8f1 100644 --- a/src/mainboard/google/geralt/gpio.h +++ b/src/mainboard/google/geralt/gpio.h @@ -22,6 +22,8 @@ #define GPIO_SD_CD_ODL GPIO(I2SIN_MCK) +#define GPIO_USB3_HUB_RST_L GPIO(MSDC2_DAT0) + void setup_chromeos_gpios(void); #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/72594 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8df35efb78e90a5b3314840fe2eae81d6e501242 Gerrit-Change-Number: 72594 Gerrit-PatchSet: 8 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: Documentation: Fix broken tables
by Paul Fagerburg (Code Review) 01 Feb '23

01 Feb '23

Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72623 ) Change subject: Documentation: Fix broken tables ...................................................................... Documentation: Fix broken tables - The 4.19 release notes included a list of outstanding issues formatted as a markdown table, which is not supported by Recommonmark. Reformat as an embedded reStructuredText table. - The table of boards supported on the 4.18 branch did not include row separators causing all rows to be rendered in a single row of cells. - Technotes/console.md had a typo in the rST table formatting which generated warnings in the Sphinx build, causing the table to not be rendered in the resulting html. Change-Id: I86e2c5d6d20e6002b87efc4688fc11b24b341227 Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72623 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <felixsinger(a)posteo.net> --- M Documentation/releases/boards_supported_on_branches.md M Documentation/releases/coreboot-4.19-relnotes.md M Documentation/technotes/console.md 3 files changed, 64 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved diff --git a/Documentation/releases/boards_supported_on_branches.md b/Documentation/releases/boards_supported_on_branches.md index e9815f7..ad7f356 100644 --- a/Documentation/releases/boards_supported_on_branches.md +++ b/Documentation/releases/boards_supported_on_branches.md @@ -42,29 +42,53 @@ | Vendor/Board | Processor | Date added | Brd type | +===============================+========================+============+===========+ | amd/inagua | AMD_FAMILY14 | 2011-02-14 | eval | ++-------------------------------+------------------------+------------+-----------+ | amd/olivehill | AMD_FAMILY16_KB | 2013-08-05 | eval | ++-------------------------------+------------------------+------------+-----------+ | amd/parmer | AMD_FAMILY15_TN | 2012-07-22 | eval | ++-------------------------------+------------------------+------------+-----------+ | amd/persimmon | AMD_FAMILY14 | 2011-02-14 | eval | ++-------------------------------+------------------------+------------+-----------+ | amd/south_station | AMD_FAMILY14 | 2011-11-18 | eval | ++-------------------------------+------------------------+------------+-----------+ | amd/thatcher | AMD_FAMILY15_TN | 2012-08-02 | eval | ++-------------------------------+------------------------+------------+-----------+ | amd/union_station | AMD_FAMILY14 | 2011-11-18 | eval | ++-------------------------------+------------------------+------------+-----------+ | asrock/e350m1 | AMD_FAMILY14 | 2011-02-24 | mini | ++-------------------------------+------------------------+------------+-----------+ | asrock/imb-a180 | AMD_FAMILY16_KB | 2013-08-27 | mini | ++-------------------------------+------------------------+------------+-----------+ | asus/a88xm-e | AMD_FAMILY15_TN | 2020-08-13 | desktop | ++-------------------------------+------------------------+------------+-----------+ | asus/am1i-a | AMD_FAMILY16_KB | 2018-01-14 | mini | ++-------------------------------+------------------------+------------+-----------+ | asus/f2a85-m | AMD_FAMILY15_TN | 2013-03-22 | desktop | ++-------------------------------+------------------------+------------+-----------+ | bap/ode_e20XX | AMD_FAMILY16_KB | 2015-05-27 | eval | ++-------------------------------+------------------------+------------+-----------+ | biostar/a68n_5200 | AMD_FAMILY16_KB | 2017-10-14 | eval | ++-------------------------------+------------------------+------------+-----------+ | biostar/am1ml | AMD_FAMILY16_KB | 2015-04-10 | mini | ++-------------------------------+------------------------+------------+-----------+ | elmex/pcm205400 | AMD_FAMILY14 | 2016-09-29 | sbc | ++-------------------------------+------------------------+------------+-----------+ | gizmosphere/gizmo2 | AMD_FAMILY16_KB | 2014-12-09 | eval | ++-------------------------------+------------------------+------------+-----------+ | gizmosphere/gizmo | AMD_FAMILY14 | 2014-01-03 | half | ++-------------------------------+------------------------+------------+-----------+ | hp/abm | AMD_FAMILY16_KB | 2015-01-05 | mini | ++-------------------------------+------------------------+------------+-----------+ | hp/pavilion_m6_1035dx | AMD_FAMILY15_TN | 2014-03-28 | laptop | ++-------------------------------+------------------------+------------+-----------+ | jetway/nf81-t56n-lf | AMD_FAMILY14 | 2014-02-16 | mini | ++-------------------------------+------------------------+------------+-----------+ | lenovo/g505s | AMD_FAMILY15_TN | 2014-11-27 | laptop | ++-------------------------------+------------------------+------------+-----------+ | lippert/frontrunner-af | AMD_FAMILY14 | 2013-03-02 | half | ++-------------------------------+------------------------+------------+-----------+ | msi/ms7721 | AMD_FAMILY15_TN | 2016-11-22 | desktop | ++-------------------------------+------------------------+------------+-----------+ | pcengines/apu1 | AMD_FAMILY14 | 2015-02-23 | half | +-------------------------------+------------------------+------------+-----------+ ``` diff --git a/Documentation/releases/coreboot-4.19-relnotes.md b/Documentation/releases/coreboot-4.19-relnotes.md index 4b8b39f..0925464 100644 --- a/Documentation/releases/coreboot-4.19-relnotes.md +++ b/Documentation/releases/coreboot-4.19-relnotes.md @@ -217,17 +217,30 @@ --------------------------------- Issues from the coreboot bugtracker: https://ticket.coreboot.org/ - +```eval_rst ++-----+-----------------------------------------------------------------+ | # | Subject | -|-----|-----------------------------------------------------------------| ++=====+=================================================================+ | 449 | ThinkPad T440p fail to start, continuous beeping & LED blinking | ++-----+-----------------------------------------------------------------+ | 448 | Thinkpad T440P ACPI Battery Value Issues | ++-----+-----------------------------------------------------------------+ | 446 | Optiplex 9010 No Post | ++-----+-----------------------------------------------------------------+ | 445 | Thinkpad X200 wifi issue | ++-----+-----------------------------------------------------------------+ | 439 | Lenovo X201 Turbo Boost not working (stuck on 2,4GHz) | ++-----+-----------------------------------------------------------------+ | 427 | x200: Two battery charging issues | ++-----+-----------------------------------------------------------------+ | 414 | X9SAE-V: No USB keyboard init on SeaBIOS using Radeon RX 6800XT | ++-----+-----------------------------------------------------------------+ | 412 | x230 reboots on suspend | ++-----+-----------------------------------------------------------------+ | 393 | T500 restarts rather than waking up from suspend | ++-----+-----------------------------------------------------------------+ | 350 | I225 PCIe device not detected on Harcuvar | ++-----+-----------------------------------------------------------------+ | 327 | OperationRegion (OPRG, SystemMemory, ASLS, 0x2000) causes BSOD | ++-----+-----------------------------------------------------------------+ +``` diff --git a/Documentation/technotes/console.md b/Documentation/technotes/console.md index 8cc5b38..52de812 100644 --- a/Documentation/technotes/console.md +++ b/Documentation/technotes/console.md @@ -27,7 +27,7 @@ | Tested platforms | +====================================+ | GA-H61M-S2PV + Intel Ivy Bridge | -+---------------------+--------------- ++------------------------------------+ ``` A minimal DDR3 DIMM breakout board PCB design with only the -- To view, visit https://review.coreboot.org/c/coreboot/+/72623 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I86e2c5d6d20e6002b87efc4688fc11b24b341227 Gerrit-Change-Number: 72623 Gerrit-PatchSet: 2 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: mb/intel/mtlrvp: Add chip configuration for I2C devices
by Harsha B R (Code Review) 01 Feb '23

01 Feb '23

Attention is currently required from: Harsha B R, Usha P, Eric Lai. Hello build bot (Jenkins), Sridhar Siricilla, Usha P, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72647 to look at the new patch set (#3). Change subject: mb/intel/mtlrvp: Add chip configuration for I2C devices ...................................................................... mb/intel/mtlrvp: Add chip configuration for I2C devices This patch adds below chip configuration for I2C devices for mtlrvp. +-----------+--------------------+-------------+ | INTERFACE | PCI Number (B:D:F) | DEVICE | +-----------+--------------------+-------------+ | I2C0 | 0:0x15:0 | CAM1 | +-----------+--------------------+-------------+ | I2C1 | 0:0x15:1 | CAM0 | +-----------+--------------------+-------------+ | I2C2 | 0:0x15:2 | NC | +-----------+--------------------+-------------+ | I2C3 | 0:0x15:3 | HID | +-----------+--------------------+-------------+ | I2C4 | 0:0x15:4 | NC | +-----------+--------------------+-------------+ | I2C5 | 0:0x15:5 | NC | +-----------+--------------------+-------------+ BUG=b:224325352 BRANCH=None TEST=Able to boot mtlrvp (LP5/DDR5) to ChromeOS Signed-off-by: Harsha B R <harsha.b.r(a)intel.com> Change-Id: Ia5964472be902041f961187c0072a89055badd4f Signed-off-by: Jamie Ryu <jamie.m.ryu(a)intel.com> --- M src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb 1 file changed, 56 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/72647/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/72647 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia5964472be902041f961187c0072a89055badd4f Gerrit-Change-Number: 72647 Gerrit-PatchSet: 3 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/intel/mtlrvp: Enable CNVi BT Core and Wifi
by Harsha B R (Code Review) 01 Feb '23

01 Feb '23

Attention is currently required from: Jamie Ryu, Paul Menzel, Sridhar Siricilla, Usha P, Eric Lai. Harsha B R has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72695 ) Change subject: mb/intel/mtlrvp: Enable CNVi BT Core and Wifi ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/72695/comment/1580af4c_064d0931 PS1, Line 7: for mtlrvp > Redundant, as already in prefix. Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/72695 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22575bf31b540f9dc1149a2766268285001b72f4 Gerrit-Change-Number: 72695 Gerrit-PatchSet: 3 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 01 Feb 2023 14:52:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/intel/mtlrvp: Enable CNVi BT Core and Wifi
by Harsha B R (Code Review) 01 Feb '23

01 Feb '23

Attention is currently required from: Jamie Ryu, Harsha B R, Sridhar Siricilla, Usha P, Eric Lai. Hello Jamie Ryu, Sridhar Siricilla, Usha P, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72695 to look at the new patch set (#3). Change subject: mb/intel/mtlrvp: Enable CNVi BT Core and Wifi ...................................................................... mb/intel/mtlrvp: Enable CNVi BT Core and Wifi This patch enables CNVi_BT Core and Wifi for mtlrvp based on mtlrvp schematics. 1. Enable CNVi BT Core in device tree 2. Enable CNVi Wifi (pci 14.3) device in device tree BUG=b:224325352 BRANCH=None TEST=Able to observe corresponding UPD configuration with FSP dump and able to boot mtlrvp (LP5/DDR5) to ChromeOS. CNVi Mode = 1 Wi-Fi Core = 1 BT Core = 1 BT Audio Offload = 0 BT Interface = 1 Signed-off-by: Harsha B R <harsha.b.r(a)intel.com> Change-Id: I22575bf31b540f9dc1149a2766268285001b72f4 Signed-off-by: Jamie Ryu <jamie.m.ryu(a)intel.com> --- M src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb 1 file changed, 39 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/72695/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/72695 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22575bf31b540f9dc1149a2766268285001b72f4 Gerrit-Change-Number: 72695 Gerrit-PatchSet: 3 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/intel/mtlrvp: Enable CNVi BT Core and Wifi
by Harsha B R (Code Review) 01 Feb '23

01 Feb '23

Attention is currently required from: Jamie Ryu, Harsha B R, Sridhar Siricilla, Usha P, Eric Lai. Hello Jamie Ryu, Sridhar Siricilla, Usha P, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72695 to look at the new patch set (#2). Change subject: mb/intel/mtlrvp: Enable CNVi BT Core and Wifi ...................................................................... mb/intel/mtlrvp: Enable CNVi BT Core and Wifi This patch enables CNVi_BT Core and Wifi for mtlrvp based on mtlrvp schematics. 1. Enable CNVi BT Core in device tree 2. Enable CNVi Wifi (pci 14.3) device in device tree BUG=b:224325352 BRANCH=None TEST=Able to observe corresponding UPD configuration with FSP dump and able to boot mtlrvp (LP5/DDR5) to chromeOS. CNVi Mode = 1 Wi-Fi Core = 1 BT Core = 1 BT Audio Offload = 0 BT Interface = 1 Signed-off-by: Harsha B R <harsha.b.r(a)intel.com> Change-Id: I22575bf31b540f9dc1149a2766268285001b72f4 Signed-off-by: Jamie Ryu <jamie.m.ryu(a)intel.com> --- M src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb 1 file changed, 39 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/72695/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/72695 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22575bf31b540f9dc1149a2766268285001b72f4 Gerrit-Change-Number: 72695 Gerrit-PatchSet: 2 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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