coreboot-gerrit January 2023

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[S] Change in coreboot[master]: mb/googmb/google/skyrim/var/winterhold: enable dxio_tx_vboost_enable ...
by Chris Wang (Code Review) 04 Jan '23

04 Jan '23

Chris Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71647 ) Change subject: mb/googmb/google/skyrim/var/winterhold: enable dxio_tx_vboost_enable for PCIe optimization ...................................................................... mb/googmb/google/skyrim/var/winterhold: enable dxio_tx_vboost_enable for PCIe optimization Turn on the dxio_tx_vboost_enable for winterhold/whiterun in coreboot. It needs to confirm the PCIe Signal Integrity after enabled. BUG=b:259622787 BRANCH=none TEST=confirm the setting has been set correspondingly with checking the FSP log. Signed-off-by: Chris.Wang <chris.wang(a)amd.corp-partner.google.com> Change-Id: I6aad3d9118180d2ffdfba38abc80b175b6f103bd --- M src/mainboard/google/skyrim/variants/winterhold/overridetree.cb 1 file changed, 22 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/71647/1 diff --git a/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb index 9d226f1..c12a0f2 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb +++ b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb @@ -99,6 +99,9 @@ register "stt_skin_temp_apu_F" = "0x3200" device domain 0 on + + register "dxio_tx_vboost_enable" = "1" + device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A device ref xhci_1 on # XHCI1 controller chip drivers/usb/acpi -- To view, visit https://review.coreboot.org/c/coreboot/+/71647 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6aad3d9118180d2ffdfba38abc80b175b6f103bd Gerrit-Change-Number: 71647 Gerrit-PatchSet: 1 Gerrit-Owner: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/intel/common: Use CPUID_STRUCT_EXTENDED_FEATURE_FLAGS macro
by Pratikkumar V Prajapati (Code Review) 04 Jan '23

04 Jan '23

Pratikkumar V Prajapati has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71646 ) Change subject: soc/intel/common: Use CPUID_STRUCT_EXTENDED_FEATURE_FLAGS macro ...................................................................... soc/intel/common: Use CPUID_STRUCT_EXTENDED_FEATURE_FLAGS macro Use CPUID_STRUCT_EXTENDED_FEATURE_FLAGS macro to get extended CPU capabilities flags using cpuid_ext inline function. Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.com> Change-Id: If680ffff64e2e1dabded8c03c4042d349a11b635 --- M src/soc/intel/common/block/cpu/cpulib.c 1 file changed, 19 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/71646/1 diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index a62bc0f..7a8b80d 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -510,8 +510,8 @@ { struct cpuid_result cpuid_regs; - cpuid_regs = cpuid_ext(0x7, 0x0); /* ECX[13] is feature capability */ - + /* ECX[13] is feature capability */ + cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); return (cpuid_regs.ecx & TME_SUPPORTED); } @@ -533,7 +533,8 @@ struct cpuid_result cpuid_regs; msr_t msr; - cpuid_regs = cpuid_ext(0x7, 0x0); /* EBX[2] is feature capability */ + /* EBX[2] is feature capability */ + cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); } @@ -548,7 +549,8 @@ struct cpuid_result cpuid_regs; msr_t msr; - cpuid_regs = cpuid_ext(0x7, 0x0); /* ECX[23] is feature capability */ + /* ECX[23] is feature capability */ + cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ return ((cpuid_regs.ecx & KEYLOCKER_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); } -- To view, visit https://review.coreboot.org/c/coreboot/+/71646 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If680ffff64e2e1dabded8c03c4042d349a11b635 Gerrit-Change-Number: 71646 Gerrit-PatchSet: 1 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: soc/intel/common: Untie PRMRR from SGX
by Pratikkumar V Prajapati (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Sridhar Siricilla. Hello Will Kim, build bot (Jenkins), Tarun Tuli, Subrata Banik, Wonkyu Kim, Kapil Porwal, Sridhar Siricilla, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/70819 to look at the new patch set (#19). Change subject: soc/intel/common: Untie PRMRR from SGX ...................................................................... soc/intel/common: Untie PRMRR from SGX PRMRR is used by many Intel SOC features, not just Intel SGX. As of now SGX and Key Locker are the features that need PRMRR. Untie it from Intel SGX specific files and move to common cpulib. Also rename PRMRR size config option. Use the renamed PRMRR size config option to set the PRMRR size. Finally check if features that need PRMRR are configured and supproted before returning PRMRR size. TEST=Able to set PRMRR size using config. Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.com> Change-Id: I0cd49a87be0293530705802fd9b830201a5863c2 --- M src/soc/intel/common/block/cpu/Kconfig M src/soc/intel/common/block/cpu/cpulib.c M src/soc/intel/common/block/sgx/Kconfig 3 files changed, 90 insertions(+), 43 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/70819/19 -- To view, visit https://review.coreboot.org/c/coreboot/+/70819 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0cd49a87be0293530705802fd9b830201a5863c2 Gerrit-Change-Number: 70819 Gerrit-PatchSet: 19 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Will Kim <norwayforest92(a)gmail.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/common: Add helper functions for SGX, Key Locker, and PRM
by Pratikkumar V Prajapati (Code Review) 04 Jan '23

04 Jan '23

Hello Subrata Banik, Sridhar Siricilla, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71569 to look at the new patch set (#7). Change subject: soc/intel/common: Add helper functions for SGX, Key Locker, and PRM ...................................................................... soc/intel/common: Add helper functions for SGX, Key Locker, and PRM Add below mentioned functions: is_sgx_configured_and_supported(): Checks if SGX is configured and supported is_keylocker_configured_and_supported(): Checks if Key Locker is configured and supported check_prm_features_enabled(): Checks if any of the features that need PRM are configured and supported. As of now SGX and Key Locker are the only features that need PRM. Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.com> Change-Id: I51d3c144c410ce4c736f10e3759c7b7603ec3de9 --- M src/soc/intel/common/block/cpu/cpulib.c 1 file changed, 41 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/71569/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/71569 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51d3c144c410ce4c736f10e3759c7b7603ec3de9 Gerrit-Change-Number: 71569 Gerrit-PatchSet: 7 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/common: Add Kconfig option for Intel Key Locker
by Pratikkumar V Prajapati (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Felix Singer, Paul Menzel, Sridhar Siricilla. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71118 to look at the new patch set (#11). Change subject: soc/intel/common: Add Kconfig option for Intel Key Locker ...................................................................... soc/intel/common: Add Kconfig option for Intel Key Locker Add INTEL_KEYLOCKER Kconfig option. Disable it by default. The specification of Key Locker can be found at: https://www.intel.com/ content/www/us/en/develop/download/intel-key-locker-specification.html The spec can also be found via document #343965 on Intel's site. Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.com> Change-Id: Ia78e9bfe7ba2fd4e45b4821c95b19b8e580dccab --- M src/soc/intel/common/block/cpu/Kconfig 1 file changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/71118/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/71118 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia78e9bfe7ba2fd4e45b4821c95b19b8e580dccab Gerrit-Change-Number: 71118 Gerrit-PatchSet: 11 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/common: Add API to check Key Locker support
by Pratikkumar V Prajapati (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Martin L Roth, Subrata Banik, Paul Menzel. Hello build bot (Jenkins), Subrata Banik, Paul Menzel, Sridhar Siricilla, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71117 to look at the new patch set (#9). Change subject: soc/intel/common: Add API to check Key Locker support ...................................................................... soc/intel/common: Add API to check Key Locker support Add is_keylocker_supported() API in common cpulib. This function checks if the CPU supports Key Locker feature. Returns true if Key Locker feature is supported otherwise false. Change-Id: Ide9e59a4f11a63df48838eab02c2c584cced12e1 Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.com> --- M src/soc/intel/common/block/cpu/cpulib.c M src/soc/intel/common/block/include/intelblocks/cpulib.h M src/soc/intel/common/block/include/intelblocks/msr.h 3 files changed, 35 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/71117/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/71117 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ide9e59a4f11a63df48838eab02c2c584cced12e1 Gerrit-Change-Number: 71117 Gerrit-PatchSet: 9 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/nissa/var/craask: Use get_wifi_sar_fw_config_filename
by Reka Norman (Code Review) 04 Jan '23

04 Jan '23

Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71218 ) Change subject: mb/google/nissa/var/craask: Use get_wifi_sar_fw_config_filename ...................................................................... Patch Set 2: (1 comment) Patchset: PS1: > Will drop SAR_UNUSED 7 in factory. I'm not sure what you mean by drop it. Currently SAR_UNUSED is used for craaskvin, which uses Intel wifi but does not have a SAR table. If we drop it, what setting will be used on craaskvin? -- To view, visit https://review.coreboot.org/c/coreboot/+/71218 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I04176fee373e534d42c72506df73a092ad55e65b Gerrit-Change-Number: 71218 Gerrit-PatchSet: 2 Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Wed, 04 Jan 2023 01:54:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim: Create markarth variant
by Dtrain Hsu (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: John Su, Chao Gui, Jason Nien, Paul Menzel, Martin Roth, Tim Van Patten, Karthik Ramasubramanian. Dtrain Hsu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71610 ) Change subject: mb/google/skyrim: Create markarth variant ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71610 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifbace841ca56d8659aaffdc31fb2bc4367d96f82 Gerrit-Change-Number: 71610 Gerrit-PatchSet: 3 Gerrit-Owner: Chao Gui <chaogui(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: AlanKY Lee <alanky_lee(a)compal.corp-partner.google.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Isaac Lee <isaaclee(a)google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Chao Gui <chaogui(a)google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 04 Jan 2023 01:43:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/brya: Create omnigul variant
by Ian Feng (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Jamie Chen, Tarun Tuli. Ian Feng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71640 ) Change subject: mb/google/brya: Create omnigul variant ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b4123db9cb77dc050a81f1cb83ef10e2fbffe8d Gerrit-Change-Number: 71640 Gerrit-PatchSet: 1 Gerrit-Owner: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Comment-Date: Wed, 04 Jan 2023 01:41:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/brya: Create omnigul variant
by Dtrain Hsu (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Jamie Chen, Tarun Tuli. Dtrain Hsu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71640 ) Change subject: mb/google/brya: Create omnigul variant ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6b4123db9cb77dc050a81f1cb83ef10e2fbffe8d Gerrit-Change-Number: 71640 Gerrit-PatchSet: 1 Gerrit-Owner: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Comment-Date: Wed, 04 Jan 2023 01:37:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit January 2023