coreboot-gerrit January 2023

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[S] Change in coreboot[master]: WIP:amdfwtool: Allow the location to be a relative address
by build bot (Jenkins) (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Bao Zheng, Zheng Bao. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69856 ) Change subject: WIP:amdfwtool: Allow the location to be a relative address ...................................................................... Patch Set 4: (6 comments) File util/amdfwtool/amdfwtool.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167591): https://review.coreboot.org/c/coreboot/+/69856/comment/41cf9aba_bc5cfa6f PS4, Line 2475: case 0xFA0000: /* Fallthrough */ Prefer 'fallthrough;' over fallthrough comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167591): https://review.coreboot.org/c/coreboot/+/69856/comment/c2f200e3_dd81cafd PS4, Line 2476: case 0xF20000: /* Fallthrough */ Prefer 'fallthrough;' over fallthrough comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167591): https://review.coreboot.org/c/coreboot/+/69856/comment/d077c7c4_2de2e3f1 PS4, Line 2477: case 0xE20000: /* Fallthrough */ Prefer 'fallthrough;' over fallthrough comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167591): https://review.coreboot.org/c/coreboot/+/69856/comment/9c34faae_a1a9bc01 PS4, Line 2478: case 0xC20000: /* Fallthrough */ Prefer 'fallthrough;' over fallthrough comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167591): https://review.coreboot.org/c/coreboot/+/69856/comment/96196375_d63d1240 PS4, Line 2479: case 0x820000: /* Fallthrough */ Prefer 'fallthrough;' over fallthrough comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167591): https://review.coreboot.org/c/coreboot/+/69856/comment/aa81abf3_af78b78d PS4, Line 2480: case 0x020000: /* Fallthrough */ Prefer 'fallthrough;' over fallthrough comment -- To view, visit https://review.coreboot.org/c/coreboot/+/69856 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4308ec9ea05a87329aba0b409508c79ebf42325c Gerrit-Change-Number: 69856 Gerrit-PatchSet: 4 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Wed, 04 Jan 2023 05:27:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: amdfwtool: Change the variable name to body_location
by Bao Zheng (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/71649 to review the following change. Change subject: amdfwtool: Change the variable name to body_location ...................................................................... amdfwtool: Change the variable name to body_location The dir_location and efs_location have the same meaning. Now the dir means body. Change-Id: I02d4dc848f189449b6f0a1eea5cd6b8020a7d101 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 26 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/71649/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 301d69a..ec18d17 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -2113,7 +2113,7 @@ context ctx = { 0 }; /* Values cleared after each firmware or parameter, regardless if N/A */ uint8_t sub = 0, instance = 0; - uint32_t dir_location = 0; + uint32_t body_location = 0; uint32_t efs_location = 0; bool any_location = 0; uint32_t romsig_offset; @@ -2308,7 +2308,8 @@ " incorrectly (%s)\n\n", optarg); retval = 1; } - dir_location = efs_location; + if (body_location == 0) + body_location = efs_location; break; case AMDFW_OPT_ANYWHERE: any_location = 1; @@ -2346,7 +2347,7 @@ list_deps = 1; break; case AMDFW_OPT_BODY_LOCATION: - dir_location = (uint32_t)strtoul(optarg, &tmp, 16); + body_location = (uint32_t)strtoul(optarg, &tmp, 16); if (*tmp != '\0') { fprintf(stderr, "Error: Body Location specified" " incorrectly (%s)\n\n", optarg); @@ -2427,7 +2428,7 @@ return 1; } - if (!efs_location && dir_location) { + if (!efs_location && body_location) { fprintf(stderr, "Error AMDFW body location specified without EFS location.\n"); return 1; } @@ -2438,20 +2439,20 @@ * currently. This condition is to ensure that it is not accidentally split. Revisit * this condition if such a need arises in the future. */ - if (!any_location && dir_location != efs_location) { + if (!any_location && body_location != efs_location) { fprintf(stderr, "Error: EFS cannot be separate from AMDFW Body.\n"); return 1; } - if (dir_location != efs_location && - dir_location < ALIGN(efs_location + sizeof(embedded_firmware), BLOB_ALIGNMENT)) { + if (body_location != efs_location && + body_location < ALIGN(efs_location + sizeof(embedded_firmware), BLOB_ALIGNMENT)) { fprintf(stderr, "Error: Insufficient space between EFS and Blobs.\n"); fprintf(stderr, " Require safe spacing of 256 bytes\n"); return 1; } if (any_location) { - if ((dir_location & 0x3f) || (efs_location & 0x3f)) { + if ((body_location & 0x3f) || (efs_location & 0x3f)) { fprintf(stderr, "Error: Invalid Directory/EFS location.\n"); fprintf(stderr, " Valid locations are 64-byte aligned\n"); return 1; @@ -2481,9 +2482,9 @@ memset(ctx.rom, 0xFF, ctx.rom_size); if (efs_location) { - if (efs_location != dir_location) { + if (efs_location != body_location) { romsig_offset = efs_location - rom_base_address; - ctx.current = dir_location - rom_base_address; + ctx.current = body_location - rom_base_address; } else { romsig_offset = efs_location - rom_base_address; ctx.current = romsig_offset + sizeof(embedded_firmware); @@ -2639,7 +2640,7 @@ targetfd = open(output, O_RDWR | O_CREAT | O_TRUNC, 0666); if (targetfd >= 0) { ssize_t bytes; - uint32_t offset = dir_location ? dir_location - rom_base_address : AMD_ROMSIG_OFFSET; + uint32_t offset = body_location ? body_location - rom_base_address : AMD_ROMSIG_OFFSET; bytes = write(targetfd, BUFF_OFFSET(ctx, offset), ctx.current - offset); if (bytes != ctx.current - offset) { @@ -2652,7 +2653,7 @@ retval = 1; } - if (efs_location != dir_location) { + if (efs_location != body_location) { ssize_t bytes; bytes = write_efs(output, amd_romsig); -- To view, visit https://review.coreboot.org/c/coreboot/+/71649 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I02d4dc848f189449b6f0a1eea5cd6b8020a7d101 Gerrit-Change-Number: 71649 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: amdfwtool: Change "fall through" to "fallthrough"
by Bao Zheng (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/71648 to review the following change. Change subject: amdfwtool: Change "fall through" to "fallthrough" ...................................................................... amdfwtool: Change "fall through" to "fallthrough" Fix the comment as "checkpatch" says. Change-Id: Ifa5d7de037aa7024779f3aa4a5d2f5033eed264a Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 19 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/71648/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 4955f0b..301d69a 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -2458,13 +2458,13 @@ } } else { switch (efs_location) { - case 0: /* Fall through */ - case 0xFFFA0000: /* Fall through */ - case 0xFFF20000: /* Fall through */ - case 0xFFE20000: /* Fall through */ - case 0xFFC20000: /* Fall through */ - case 0xFF820000: /* Fall through */ - case 0xFF020000: /* Fall through */ + case 0: /* Fallthrough */ + case 0xFFFA0000: /* Fallthrough */ + case 0xFFF20000: /* Fallthrough */ + case 0xFFE20000: /* Fallthrough */ + case 0xFFC20000: /* Fallthrough */ + case 0xFF820000: /* Fallthrough */ + case 0xFF020000: /* Fallthrough */ break; default: fprintf(stderr, "Error: Invalid Directory location.\n"); -- To view, visit https://review.coreboot.org/c/coreboot/+/71648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifa5d7de037aa7024779f3aa4a5d2f5033eed264a Gerrit-Change-Number: 71648 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: WIP:amdfwtool: Allow the location to be a relative address
by Bao Zheng (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Bao Zheng, Zheng Bao. Hello build bot (Jenkins), Zheng Bao, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69856 to look at the new patch set (#4). Change subject: WIP:amdfwtool: Allow the location to be a relative address ...................................................................... WIP:amdfwtool: Allow the location to be a relative address When the BIOS size is more than 32M, the physical address of EFS header will be complicated, like 0xfe020000 or 0xfc020000. So we make it simpler to allow to use relative address. This CL equals to https://review.coreboot.org/c/coreboot/+/69852, just for other changes in the stack. Change-Id: I4308ec9ea05a87329aba0b409508c79ebf42325c Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 39 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/69856/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/69856 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4308ec9ea05a87329aba0b409508c79ebf42325c Gerrit-Change-Number: 69856 Gerrit-PatchSet: 4 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/common: Use CPUID_STRUCT_EXTENDED_FEATURE_FLAGS macro
by Subrata Banik (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Martin Roth, Martin L Roth, Pratikkumar V Prajapati. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71646 ) Change subject: soc/intel/common: Use CPUID_STRUCT_EXTENDED_FEATURE_FLAGS macro ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71646 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If680ffff64e2e1dabded8c03c4042d349a11b635 Gerrit-Change-Number: 71646 Gerrit-PatchSet: 1 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Wed, 04 Jan 2023 05:17:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/skolas: Set tcc_offset value to 3
by Sridhar Siricilla (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Tarun Tuli, Sumeet R Pawnikar. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71641 ) Change subject: mb/google/brya/var/skolas: Set tcc_offset value to 3 ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/71641 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic9b2b171390de16e4a8e73b4271e2531244ad169 Gerrit-Change-Number: 71641 Gerrit-PatchSet: 1 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Comment-Date: Wed, 04 Jan 2023 04:58:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/common/block/fast_spi: Hook up pci_dev_ops_pci to set SSID
by Subrata Banik (Code Review) 04 Jan '23

04 Jan '23

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71275 ) Change subject: soc/intel/common/block/fast_spi: Hook up pci_dev_ops_pci to set SSID ...................................................................... soc/intel/common/block/fast_spi: Hook up pci_dev_ops_pci to set SSID BUG=none TEST=Verify presence of subsystem ID for fast_spi device on google/rex. lspci output before this patch: 00:1f.5 Serial bus controller [0c80]: Intel Corporation Device [8086:7e23] lspci output after this patch: 00:1f.5 Serial bus controller [0c80]: Intel Corporation Device [8086:7e23] Subsystem: Intel Corporation Device [8086:7e23] Note: UPD SiSkipSsidProgramming was set to 1 for above test. Signed-off-by: Kapil Porwal <kapilporwal(a)google.com> Change-Id: I08c7a5a3fdc7389b315e85180c16d1ec335fbba2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71275 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/soc/intel/common/block/fast_spi/fast_spi.c 1 file changed, 27 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Subrata Banik: Looks good to me, approved diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index 471c85d..a2c4991 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -542,6 +542,7 @@ .enable_resources = pci_dev_enable_resources, .acpi_fill_ssdt = fast_spi_fill_ssdt, .acpi_name = fast_spi_acpi_name, + .ops_pci = &pci_dev_ops_pci, }; static const unsigned short pci_device_ids[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/71275 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I08c7a5a3fdc7389b315e85180c16d1ec335fbba2 Gerrit-Change-Number: 71275 Gerrit-PatchSet: 3 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/common/block/fast_spi: Hook up pci_dev_ops_pci to set SSID
by Subrata Banik (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Kapil Porwal, Lean Sheng Tan, Werner Zeh. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71275 ) Change subject: soc/intel/common/block/fast_spi: Hook up pci_dev_ops_pci to set SSID ...................................................................... Patch Set 2: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/71275/comment/11c3a514_a676a7b2 PS1, Line 19: SiSkipSsidProgramming > This patch is for common code. I will be preparing a CL for `SiSkipSsidProgramming` UPD on MTL. Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/71275 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I08c7a5a3fdc7389b315e85180c16d1ec335fbba2 Gerrit-Change-Number: 71275 Gerrit-PatchSet: 2 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Wed, 04 Jan 2023 04:50:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: ec/google: Add RBHF, VBNL and CMPP method
by Harsha B R (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Varshit Pandya, Subrata Banik, Paul Menzel, Rizwan Qureshi, Meera Ravindranath, Eric Lai. Harsha B R has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64641 ) Change subject: ec/google: Add RBHF, VBNL and CMPP method ...................................................................... Patch Set 13: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/64641/comment/8d3be1e3_5c16d948 PS13, Line 10: CTYP CMPP? -- To view, visit https://review.coreboot.org/c/coreboot/+/64641 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib85977889360dde2ccf00cd6895fffcc38ad4807 Gerrit-Change-Number: 64641 Gerrit-PatchSet: 13 Gerrit-Owner: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Poornima Tom <poornima.tom(a)intel.com> Gerrit-CC: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 04 Jan 2023 03:54:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: arch/x86/smbios: Replace SMBIOS type4 processor upgrade fields values...
by Shuo Liu (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Jonathan Zhang, Jincheng Li. Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71633 ) Change subject: arch/x86/smbios: Replace SMBIOS type4 processor upgrade fields values by macros ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/71633 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifed1d773b0b349f878648b8172fd770a397e9686 Gerrit-Change-Number: 71633 Gerrit-PatchSet: 1 Gerrit-Owner: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Comment-Date: Wed, 04 Jan 2023 03:50:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit January 2023