coreboot-gerrit January 2023

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[S] Change in coreboot[master]: soc/amd/mendocino: Hook up UPD dxio_tx_vboost_enable for PCIe optimiz...
by Martin L Roth (Code Review) 04 Jan '23

04 Jan '23

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71562 ) ( 3 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/amd/mendocino: Hook up UPD dxio_tx_vboost_enable for PCIe optimization ...................................................................... soc/amd/mendocino: Hook up UPD dxio_tx_vboost_enable for PCIe optimization Add the UPD dxio_tx_vboost_enable for PCIe optimization. It will impact the PCIe signal integrity, need to double-confirm the SI result after enabling this setting. BUG=b:259622787 BRANCH=none TEST=confirm the setting has been set correspondingly with checking the FSP log. Signed-off-by: Chris.Wang <chris.wang(a)amd.corp-partner.google.com> Change-Id: I05ae5b3091219e0cb1fe469c929fad6a725db678 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71562 Reviewed-by: Fred Reitberger <reitbergerfred(a)gmail.com> Reviewed-by: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/amd/mendocino/chip.h M src/soc/amd/mendocino/fsp_m_params.c M src/vendorcode/amd/fsp/mendocino/FspmUpd.h 3 files changed, 30 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Jason Glenesk: Looks good to me, approved Fred Reitberger: Looks good to me, but someone else must approve diff --git a/src/soc/amd/mendocino/chip.h b/src/soc/amd/mendocino/chip.h index c206445..cf31cd7 100644 --- a/src/soc/amd/mendocino/chip.h +++ b/src/soc/amd/mendocino/chip.h @@ -164,6 +164,9 @@ uint8_t usb_phy_custom; struct usb_phy_config usb_phy; + /* Set for PCIe optimization w/a and a double confirming on the result of PCIe Signal + Integrity is highly recommended. */ + uint8_t dxio_tx_vboost_enable; }; #endif /* MENDOCINO_CHIP_H */ diff --git a/src/soc/amd/mendocino/fsp_m_params.c b/src/soc/amd/mendocino/fsp_m_params.c index d6eae9a..8533743 100644 --- a/src/soc/amd/mendocino/fsp_m_params.c +++ b/src/soc/amd/mendocino/fsp_m_params.c @@ -169,6 +169,8 @@ mcfg->usb_phy_ptr = 0; } + mcfg->dxio_tx_vboost_enable = config->dxio_tx_vboost_enable; + fsp_fill_pcie_ddi_descriptors(mcfg); fsp_assign_ioapic_upds(mcfg); mb_pre_fspm(mcfg); diff --git a/src/vendorcode/amd/fsp/mendocino/FspmUpd.h b/src/vendorcode/amd/fsp/mendocino/FspmUpd.h index 7639ab1..9f68101 100644 --- a/src/vendorcode/amd/fsp/mendocino/FspmUpd.h +++ b/src/vendorcode/amd/fsp/mendocino/FspmUpd.h @@ -96,7 +96,8 @@ /** Offset 0x04D7**/ uint8_t UnusedUpdSpace1; /* usb_phy_ptr is actually struct usb_phy_config *, but that won't work for 64bit coreboot */ /** Offset 0x04D8**/ uint32_t usb_phy_ptr; - /** Offset 0x04DC**/ uint8_t UnusedUpdSpace2[292]; + /** Offset 0x04DC**/ uint8_t dxio_tx_vboost_enable; + /** Offset 0x04DD**/ uint8_t UnusedUpdSpace2[291]; /** Offset 0x0600**/ uint16_t UpdTerminator; } FSP_M_CONFIG; -- To view, visit https://review.coreboot.org/c/coreboot/+/71562 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I05ae5b3091219e0cb1fe469c929fad6a725db678 Gerrit-Change-Number: 71562 Gerrit-PatchSet: 5 Gerrit-Owner: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: mb/google/skyrim/var/markarth: Generate RAM IDs for new memory parts
by Martin L Roth (Code Review) 04 Jan '23

04 Jan '23

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71632 ) Change subject: mb/google/skyrim/var/markarth: Generate RAM IDs for new memory parts ...................................................................... mb/google/skyrim/var/markarth: Generate RAM IDs for new memory parts Add new memory parts in the mem_parts_used.txt and generate the SPD ID for the parts. The memory parts being added are: DRAM Part Name ID to assign K3KL8L80CM-MGCT 0 (0000) H58G56BK7BX068 0 (0000) K3KL9L90CM-MGCT 1 (0001) H58G66BK7BX067 1 (0001) MT62F2G32D4DS-026 WT:B 1 (0001) BUG=b:263296326, b:263216451 BRANCH=None TEST=FW_NAME=markarth emerge-skyrim coreboot Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> Change-Id: I4f00d444bd59443ecba29c6c155d676bab7a3d82 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71632 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Chao Gui <chaogui(a)google.com> Reviewed-by: Martin L Roth <gaumless(a)gmail.com> --- A src/mainboard/google/skyrim/variants/markarth/Makefile.inc A src/mainboard/google/skyrim/variants/markarth/memory/Makefile.inc A src/mainboard/google/skyrim/variants/markarth/memory/dram_id.generated.txt A src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt 4 files changed, 54 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved Chao Gui: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/skyrim/variants/markarth/Makefile.inc b/src/mainboard/google/skyrim/variants/markarth/Makefile.inc new file mode 100644 index 0000000..88e75bd --- /dev/null +++ b/src/mainboard/google/skyrim/variants/markarth/Makefile.inc @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +subdirs-y += ./memory diff --git a/src/mainboard/google/skyrim/variants/markarth/memory/Makefile.inc b/src/mainboard/google/skyrim/variants/markarth/memory/Makefile.inc new file mode 100644 index 0000000..258a35b --- /dev/null +++ b/src/mainboard/google/skyrim/variants/markarth/memory/Makefile.inc @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Generated by: +# ./util/spd_tools/bin/part_id_gen MDN lp5 src/mainboard/google/skyrim/variants/markarth/memory src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt + +SPD_SOURCES = +SPD_SOURCES += spd/lp5/set-1/spd-7.hex # ID = 0(0b0000) Parts = K3KL8L80CM-MGCT, H58G56BK7BX068 +SPD_SOURCES += spd/lp5/set-1/spd-8.hex # ID = 1(0b0001) Parts = K3KL9L90CM-MGCT, H58G66BK7BX067, MT62F2G32D4DS-026 WT:B diff --git a/src/mainboard/google/skyrim/variants/markarth/memory/dram_id.generated.txt b/src/mainboard/google/skyrim/variants/markarth/memory/dram_id.generated.txt new file mode 100644 index 0000000..c2ca506 --- /dev/null +++ b/src/mainboard/google/skyrim/variants/markarth/memory/dram_id.generated.txt @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Generated by: +# ./util/spd_tools/bin/part_id_gen MDN lp5 src/mainboard/google/skyrim/variants/markarth/memory src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt + +DRAM Part Name ID to assign +K3KL8L80CM-MGCT 0 (0000) +H58G56BK7BX068 0 (0000) +K3KL9L90CM-MGCT 1 (0001) +H58G66BK7BX067 1 (0001) +MT62F2G32D4DS-026 WT:B 1 (0001) diff --git a/src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt b/src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt new file mode 100644 index 0000000..cded20f --- /dev/null +++ b/src/mainboard/google/skyrim/variants/markarth/memory/mem_parts_used.txt @@ -0,0 +1,5 @@ +K3KL8L80CM-MGCT, +H58G56BK7BX068, +K3KL9L90CM-MGCT, +H58G66BK7BX067, +MT62F2G32D4DS-026 WT:B, -- To view, visit https://review.coreboot.org/c/coreboot/+/71632 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f00d444bd59443ecba29c6c155d676bab7a3d82 Gerrit-Change-Number: 71632 Gerrit-PatchSet: 2 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chao Gui <chaogui(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: chris wang <Chris.Wang(a)amd.com> Gerrit-CC: AlanKY Lee <alanky_lee(a)compal.corp-partner.google.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Patrick Huang <patrick.huang(a)amd.corp-partner.google.com> Gerrit-CC: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: mb/google/skyrim/var/markarth: Generate RAM IDs for new memory parts
by Martin L Roth (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: John Su, Jason Nien, Martin Roth, chris wang. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71632 ) Change subject: mb/google/skyrim/var/markarth: Generate RAM IDs for new memory parts ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/71632 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f00d444bd59443ecba29c6c155d676bab7a3d82 Gerrit-Change-Number: 71632 Gerrit-PatchSet: 1 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chao Gui <chaogui(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: chris wang <Chris.Wang(a)amd.com> Gerrit-CC: AlanKY Lee <alanky_lee(a)compal.corp-partner.google.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Patrick Huang <patrick.huang(a)amd.corp-partner.google.com> Gerrit-CC: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: chris wang <Chris.Wang(a)amd.com> Gerrit-Comment-Date: Wed, 04 Jan 2023 07:08:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim: Create markarth variant
by Martin L Roth (Code Review) 04 Jan '23

04 Jan '23

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71610 ) Change subject: mb/google/skyrim: Create markarth variant ...................................................................... mb/google/skyrim: Create markarth variant Create the markarth variant of the skyrim reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0.) BUG=b:262092858 BRANCH=None TEST=util/abuild/abuild -p none -t google/skyrim -x -a make sure the build includes GOOGLE_MARKARTH Change-Id: Ifbace841ca56d8659aaffdc31fb2bc4367d96f82 Signed-off-by: Chao Gui <chaogui(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71610 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> --- M src/mainboard/google/skyrim/Kconfig M src/mainboard/google/skyrim/Kconfig.name A src/mainboard/google/skyrim/variants/markarth/include/variant/ec.h A src/mainboard/google/skyrim/variants/markarth/overridetree.cb 4 files changed, 37 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Dtrain Hsu: Looks good to me, approved diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig index 5eee2d6..493ecb5 100644 --- a/src/mainboard/google/skyrim/Kconfig +++ b/src/mainboard/google/skyrim/Kconfig @@ -91,6 +91,7 @@ default "Morthal" if BOARD_GOOGLE_MORTHAL default "Frostflow" if BOARD_GOOGLE_FROSTFLOW default "Crystaldrift" if BOARD_GOOGLE_CRYSTALDRIFT + default "Markarth" if BOARD_GOOGLE_MARKARTH config OVERRIDE_DEVICETREE string @@ -103,6 +104,7 @@ default "morthal" if BOARD_GOOGLE_MORTHAL default "frostflow" if BOARD_GOOGLE_FROSTFLOW default "crystaldrift" if BOARD_GOOGLE_CRYSTALDRIFT + default "markarth" if BOARD_GOOGLE_MARKARTH config VBOOT select EC_GOOGLE_CHROMEEC_SWITCHES diff --git a/src/mainboard/google/skyrim/Kconfig.name b/src/mainboard/google/skyrim/Kconfig.name index 23aea48..e7c6505 100644 --- a/src/mainboard/google/skyrim/Kconfig.name +++ b/src/mainboard/google/skyrim/Kconfig.name @@ -26,3 +26,7 @@ config BOARD_GOOGLE_CRYSTALDRIFT bool "-> Crystaldrift" select BOARD_GOOGLE_BASEBOARD_SKYRIM + +config BOARD_GOOGLE_MARKARTH + bool "-> Markarth" + select BOARD_GOOGLE_BASEBOARD_SKYRIM diff --git a/src/mainboard/google/skyrim/variants/markarth/include/variant/ec.h b/src/mainboard/google/skyrim/variants/markarth/include/variant/ec.h new file mode 100644 index 0000000..9e61a44 --- /dev/null +++ b/src/mainboard/google/skyrim/variants/markarth/include/variant/ec.h @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/ec.h> diff --git a/src/mainboard/google/skyrim/variants/markarth/overridetree.cb b/src/mainboard/google/skyrim/variants/markarth/overridetree.cb new file mode 100644 index 0000000..7a56f93 --- /dev/null +++ b/src/mainboard/google/skyrim/variants/markarth/overridetree.cb @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +chip soc/amd/mendocino + device domain 0 on end +end # chip soc/amd/mendocino -- To view, visit https://review.coreboot.org/c/coreboot/+/71610 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifbace841ca56d8659aaffdc31fb2bc4367d96f82 Gerrit-Change-Number: 71610 Gerrit-PatchSet: 4 Gerrit-Owner: Chao Gui <chaogui(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: AlanKY Lee <alanky_lee(a)compal.corp-partner.google.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Isaac Lee <isaaclee(a)google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: payloads: Update GRUB2 stable version from 2.04 to 2.06
by Elyes Haouas (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Martin L Roth, Paul Menzel, Stefan Reinauer. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55343 ) Change subject: payloads: Update GRUB2 stable version from 2.04 to 2.06 ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55343 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I050a78c769c3cd4c9ae627c7e3124a4894a018d7 Gerrit-Change-Number: 55343 Gerrit-PatchSet: 2 Gerrit-Owner: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hackware <human(a)hackware.cl> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Wed, 04 Jan 2023 07:03:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/nissa/var/yaviks: Disable external fivr
by Martin L Roth (Code Review) 04 Jan '23

04 Jan '23

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71560 ) Change subject: mb/google/nissa/var/yaviks: Disable external fivr ...................................................................... mb/google/nissa/var/yaviks: Disable external fivr In next phase, yaviks will remove external fivr. Use the board version to config external fivr for backward compatibility and show message. BUG=b:263842258 TEST=build, boot to OS, suspend/resume work normally. Signed-off-by: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Change-Id: Id85570046c5b8e9d90a112793c1ec8604e6bf533 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71560 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Kangheui Won <khwon(a)chromium.org> --- M src/mainboard/google/brya/variants/yaviks/overridetree.cb M src/mainboard/google/brya/variants/yaviks/variant.c 2 files changed, 46 insertions(+), 10 deletions(-) Approvals: build bot (Jenkins): Verified Kangheui Won: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/yaviks/overridetree.cb b/src/mainboard/google/brya/variants/yaviks/overridetree.cb index d84fccd..7343aa7 100644 --- a/src/mainboard/google/brya/variants/yaviks/overridetree.cb +++ b/src/mainboard/google/brya/variants/yaviks/overridetree.cb @@ -24,16 +24,6 @@ # Configure external V1P05/Vnn/VnnSx Rails register "ext_fivr_settings" = "{ .configure_ext_fivr = 1, - .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0, - .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX, - .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX, - .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, - .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_MIN_ACTIVE, - .v1p05_voltage_mv = 1050, - .vnn_voltage_mv = 780, - .vnn_sx_voltage_mv = 1050, - .v1p05_icc_max_ma = 500, - .vnn_icc_max_ma = 500, }" # Intel Common SoC Config diff --git a/src/mainboard/google/brya/variants/yaviks/variant.c b/src/mainboard/google/brya/variants/yaviks/variant.c index 0db334d..f05f4f7 100644 --- a/src/mainboard/google/brya/variants/yaviks/variant.c +++ b/src/mainboard/google/brya/variants/yaviks/variant.c @@ -1,5 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <baseboard/variants.h> +#include <boardid.h> #include <fw_config.h> #include <sar.h> @@ -10,3 +12,28 @@ return NULL; } + +void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config) +{ + const uint32_t id = board_id(); + if (id == BOARD_ID_UNKNOWN || id < 4) { // proto, EVT + config->ext_fivr_settings.configure_ext_fivr = 1; + + config->ext_fivr_settings.v1p05_enable_bitmap = + FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0; + config->ext_fivr_settings.vnn_enable_bitmap = + FIVR_ENABLE_ALL_SX; + config->ext_fivr_settings.vnn_sx_enable_bitmap = + FIVR_ENABLE_ALL_SX; + config->ext_fivr_settings.v1p05_supported_voltage_bitmap = + FIVR_VOLTAGE_NORMAL; + config->ext_fivr_settings.vnn_supported_voltage_bitmap = + FIVR_VOLTAGE_MIN_ACTIVE; + config->ext_fivr_settings.v1p05_voltage_mv = 1050; + config->ext_fivr_settings.vnn_voltage_mv = 780; + config->ext_fivr_settings.vnn_sx_voltage_mv = 1050; + config->ext_fivr_settings.v1p05_icc_max_ma = 500; + config->ext_fivr_settings.vnn_icc_max_ma = 500; + printk(BIOS_INFO, "Configured External FIVR\n"); + } +} -- To view, visit https://review.coreboot.org/c/coreboot/+/71560 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id85570046c5b8e9d90a112793c1ec8604e6bf533 Gerrit-Change-Number: 71560 Gerrit-PatchSet: 9 Gerrit-Owner: Chen Wisley <wisley.chen%quantatw.com(a)gtempaccount.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/rex: Configure EN_DMIC_SOC_DATA to GPO and LOW
by Martin L Roth (Code Review) 04 Jan '23

04 Jan '23

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71631 ) Change subject: mb/google/rex: Configure EN_DMIC_SOC_DATA to GPO and LOW ...................................................................... mb/google/rex: Configure EN_DMIC_SOC_DATA to GPO and LOW This patch configures GPP_H15 (EN_DMIC_SOC_DATA) as GPO and put into safe state aka LOW/PD. BUG=b:263411621 TEST=Able to build and boot Google, Rex to ChromeOS. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I3d376f895b2f0882c9fa6fe7b98686907bde4321 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71631 Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/rex/variants/rex0/gpio.c 1 file changed, 22 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved Ivy Jian: Looks good to me, approved diff --git a/src/mainboard/google/rex/variants/rex0/gpio.c b/src/mainboard/google/rex/variants/rex0/gpio.c index 7e04869..01fa95d 100644 --- a/src/mainboard/google/rex/variants/rex0/gpio.c +++ b/src/mainboard/google/rex/variants/rex0/gpio.c @@ -317,8 +317,8 @@ PAD_CFG_NF(GPP_H13, NONE, DEEP, NF1), /* GPP_H14 : [] ==> SLP_S0_GATE_R */ PAD_CFG_GPO(GPP_H14, 1, PLTRST), - /* GPP_H15 : net NC is not present in the given design */ - PAD_NC(GPP_H15, NONE), + /* GPP_H15 : [] ==> EN_DMIC_SOC_DATA */ + PAD_CFG_GPO(GPP_H15, 0, PLTRST), /* GPP_H16 : [] ==> DDIB_HDMI_CTRLCLK*/ PAD_CFG_NF(GPP_H16, NONE, DEEP, NF1), /* GPP_H17 : [] ==> DDIB_HDMI_CTRLDATA */ -- To view, visit https://review.coreboot.org/c/coreboot/+/71631 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d376f895b2f0882c9fa6fe7b98686907bde4321 Gerrit-Change-Number: 71631 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: payloads: Update GRUB2 stable version from 2.04 to 2.06
by Martin L Roth (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Paul Menzel, Stefan Reinauer. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55343 ) Change subject: payloads: Update GRUB2 stable version from 2.04 to 2.06 ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: I can't merge this because I rebased it abd became the uploader. -- To view, visit https://review.coreboot.org/c/coreboot/+/55343 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I050a78c769c3cd4c9ae627c7e3124a4894a018d7 Gerrit-Change-Number: 55343 Gerrit-PatchSet: 2 Gerrit-Owner: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hackware <human(a)hackware.cl> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Wed, 04 Jan 2023 06:58:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: Update vboot submodule to upstream main
by build bot (Jenkins) (Code Review) 04 Jan '23

04 Jan '23

Attention is currently required from: Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71582 ) Change subject: Update vboot submodule to upstream main ...................................................................... Patch Set 4: Verified+1 (2 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167610): https://review.coreboot.org/c/coreboot/+/71582/comment/5a08c694_52f6fdf5 PS4, Line 13: Fix: Possible unwrapped commit description (prefer a maximum 72 chars per line) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167610): https://review.coreboot.org/c/coreboot/+/71582/comment/022701b0_8965f394 PS4, Line 14: cc1: error: firmware/lib/cryptolib/include: No such file or directory [-Werror=missing-include-dirs] Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/71582 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I292d3a4046c1a1890a640747cbbd00e79e5e56b4 Gerrit-Change-Number: 71582 Gerrit-PatchSet: 4 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Wed, 04 Jan 2023 06:29:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/skylake/Makefile.inc: Remove path to non-existent directories
by build bot (Jenkins) (Code Review) 04 Jan '23

04 Jan '23

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71585 ) Change subject: soc/intel/skylake/Makefile.inc: Remove path to non-existent directories ...................................................................... Patch Set 3: Verified+1 (2 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167609): https://review.coreboot.org/c/coreboot/+/71585/comment/e5f0dea4_65ec1499 PS3, Line 10: cc1: error: 3rdparty/blobs/mainboard/asrock/h110m: No such file or directory [-Werror=missing-include-dirs] Possible unwrapped commit description (prefer a maximum 72 chars per line) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-167609): https://review.coreboot.org/c/coreboot/+/71585/comment/3c72b0a0_f1415eda PS3, Line 11: cc1: error: 3rdparty/blobs/mainboard/acer/aspire_vn7_572g: No such file or directory [-Werror=missing-include-dirs] Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/71585 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc43e40514a12944fa180197ffe3230ff9800de9 Gerrit-Change-Number: 71585 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 04 Jan 2023 06:29:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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