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Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64833 )
Change subject: cpu/intel/microcode: Have provision to re-load microcode patch
......................................................................
Patch Set 2: Code-Review+1
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Hello Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/64848
to look at the new patch set (#3).
Change subject: mb/google/brask/variants/moli: remove mainboard_vbt_filename in ramstage
......................................................................
mb/google/brask/variants/moli: remove mainboard_vbt_filename in ramstage
Currently, moli only use one vbt, so it's not need use the
mainboard_vbt_filename function to decide which vbt will be returned.
BUG=b:234521809
TEST=emerge-brask coreboot.
Signed-off-by: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com>
Change-Id: Ia9c1495c8cb7bf7b47d9c616891a791a32b9d805
---
M src/mainboard/google/brya/variants/moli/ramstage.c
1 file changed, 0 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/64848/3
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Hello Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/64848
to look at the new patch set (#2).
Change subject: mb/google/brask/variants/moli: remove mainboard_vbt_filename in ramstage
......................................................................
mb/google/brask/variants/moli: remove mainboard_vbt_filename in ramstage
Currently, moli only use one vbt, so it's not need use the
mainboard_vbt_filename function to decide which vbt will be returned.
Signed-off-by: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com>
Change-Id: Ia9c1495c8cb7bf7b47d9c616891a791a32b9d805
---
M src/mainboard/google/brya/variants/moli/ramstage.c
1 file changed, 0 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/64848/2
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Hello build bot (Jenkins), Jack Rosenthal, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/64733
to look at the new patch set (#2).
Change subject: spd/lp5: Add SPD for Micron MT62F1G32D4DS
......................................................................
spd/lp5: Add SPD for Micron MT62F1G32D4DS
This adds support for Micron "MT62F1G32D4DS-031 WT:B" LP5 chips.
generatd SPD data with:
util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5
BRANCH=none
BUG=b:233822309
Change-Id: Idd7fb074c4747a705a1870cd3d4393867289923b
Signed-off-by: Caveh Jalali <caveh(a)chromium.org>
---
M spd/lp5/memory_parts.json
M spd/lp5/set-0/parts_spd_manifest.generated.txt
A spd/lp5/set-0/spd-6.hex
M spd/lp5/set-1/parts_spd_manifest.generated.txt
A spd/lp5/set-1/spd-6.hex
5 files changed, 76 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/64733/2
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Raihow Shi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/64848 )
Change subject: mb/google/brask/variants/moli: remove return vbt
......................................................................
mb/google/brask/variants/moli: remove return vbt
Currently, moli only use one vbt, so it's not need use the
mainboard_vbt_filename function to decide which vbt will be returned.
Signed-off-by: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com>
Change-Id: Ia9c1495c8cb7bf7b47d9c616891a791a32b9d805
---
M src/mainboard/google/brya/variants/moli/ramstage.c
1 file changed, 0 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/64848/1
diff --git a/src/mainboard/google/brya/variants/moli/ramstage.c b/src/mainboard/google/brya/variants/moli/ramstage.c
index 588c939..b9d6f8f 100644
--- a/src/mainboard/google/brya/variants/moli/ramstage.c
+++ b/src/mainboard/google/brya/variants/moli/ramstage.c
@@ -32,11 +32,6 @@
.bj_volts_mv = 19500
};
-const char *mainboard_vbt_filename(void)
-{
- return "vbt-moli.bin";
-}
-
void variant_devtree_update(void)
{
size_t total_entries = ARRAY_SIZE(limits);
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Terry Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64662 )
Change subject: spd/lp5: Add new LP5 part H58G56AK6BX069
......................................................................
Patch Set 8:
(1 comment)
Patchset:
PS2:
> The datasheet is attached to the bug.
Update the link: https://partnerissuetracker.corp.google.com/issues/233830713#comment1
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Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64735 )
Change subject: cbfs: Rename TYPE_FIT to TYPE_FIT_PAYLOAD
......................................................................
Patch Set 2: Code-Review+2
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Change subject: mb/google/brya/variants/osiris: Remove KB_MT from overridetree
......................................................................
Patch Set 2: Code-Review+2
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Change subject: spd/lp5: Add new LP5 part H58G56AK6BX069
......................................................................
Patch Set 8: Code-Review+1
(1 comment)
Patchset:
PS2:
> Hi Terry, Can you post a link to the datasheet for the memory part being added?
The datasheet is attached to the bug.
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