coreboot-gerrit June 2022

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Change in coreboot[master]: mb/google/dedede/beadrix: Add fw_config probe for ALC5682-VD & VS
by Martin L Roth (Code Review) 01 Jun '22

01 Jun '22

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/64025 ) Change subject: mb/google/dedede/beadrix: Add fw_config probe for ALC5682-VD & VS ...................................................................... mb/google/dedede/beadrix: Add fw_config probe for ALC5682-VD & VS ALC5682-VD/ALC5682I-VS load different kernel driver by different hid name. Update hid name depending on the AUDIO_CODEC_SOURCE field of fw_config. Define FW_CONFIG bits 41 - 43 (SSFC bits 9 - 11) for codec selection. ALC5682-VD: _HID = "10EC5682" ALC5682I-VS: _HID = "RTL5682" BRANCH=dedede BUG=b:226910787,b:232057623 TEST=on beadrix, verified by FW_NAME=beadrix emerge-dedede coreboot. Signed-off-by: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Change-Id: I059b750743ab3b29d17c50d0d4301fbae4873acc Reviewed-on: https://review.coreboot.org/c/coreboot/+/64025 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Super Ni <super.ni(a)intel.corp-partner.google.com> Reviewed-by: Ivan Chen <yulunchen(a)google.com> --- M src/mainboard/google/dedede/variants/beadrix/overridetree.cb 1 file changed, 25 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved Super Ni: Looks good to me, but someone else must approve Teddy Shih: Looks good to me, but someone else must approve Ivan Chen: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb index f811601..9095583 100644 --- a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb +++ b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb @@ -1,3 +1,11 @@ +fw_config + field AUDIO_CODEC_SOURCE 41 43 + option AUDIO_CODEC_UNPROVISIONED 0 + option AUDIO_CODEC_ALC5682 1 + option AUDIO_CODEC_ALC5682I_VS 2 + end +end + chip soc/intel/jasperlake # USB Port Configuration @@ -140,7 +148,23 @@ register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" register "property_list[0].name" = ""realtek,jd-src"" register "property_list[0].integer" = "1" - device i2c 1a on end + device i2c 1a on + probe AUDIO_CODEC_SOURCE AUDIO_CODEC_ALC5682 + probe AUDIO_CODEC_SOURCE AUDIO_CODEC_UNPROVISIONED + end + end + chip drivers/i2c/generic + register "hid" = ""RTL5682"" + register "name" = ""RT58"" + register "desc" = ""Realtek RT5682"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D16)" + register "property_count" = "1" + register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" + register "property_list[0].name" = ""realtek,jd-src"" + register "property_list[0].integer" = "1" + device i2c 1a on + probe AUDIO_CODEC_SOURCE AUDIO_CODEC_ALC5682I_VS + end end end # I2C 4 device pci 19.1 on 5 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/64025 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I059b750743ab3b29d17c50d0d4301fbae4873acc Gerrit-Change-Number: 64025 Gerrit-PatchSet: 9 Gerrit-Owner: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Diana Zigterman <dzigterman(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)tutanota.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Super Ni <super.ni(a)intel.corp-partner.google.com> Gerrit-Reviewer: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eddy Lu <eddylu(a)ami.corp-partner.google.com> Gerrit-CC: Jack Cheng <jack.cheng(a)ecs.corp-partner.google.com> Gerrit-CC: Raymond Chung <raymondchung(a)ami.corp-partner.google.com> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/brask/variants/moli: correct ddi_ports_config
by Raihow Shi (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: YH Lin, Tim Wawrzynczak, Zhuohao Lee, Felix Held. Raihow Shi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64819 ) Change subject: mb/google/brask/variants/moli: correct ddi_ports_config ...................................................................... Patch Set 4: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/64819 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1354b82d881ebd838c310b32ae28ac2628ab8c9e Gerrit-Change-Number: 64819 Gerrit-PatchSet: 4 Gerrit-Owner: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 01 Jun 2022 01:40:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation: Update coreboot 4.17 release notes
by Martin L Roth (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Felix Singer, Nicholas Chin. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/64846 to look at the new patch set (#3). Change subject: Documentation: Update coreboot 4.17 release notes ...................................................................... Documentation: Update coreboot 4.17 release notes These are the final release notes before the release. They will be updated immediately following the release with final numbers and the commit ids that the release spans. Signed-off-by: Martin Roth <gaumless(a)gmail.com> Change-Id: Id9491ad9aa6ab3eb5504bee85591f3b1d9bf6cc2 --- M Documentation/releases/coreboot-4.17-relnotes.md 1 file changed, 309 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/64846/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/64846 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id9491ad9aa6ab3eb5504bee85591f3b1d9bf6cc2 Gerrit-Change-Number: 64846 Gerrit-PatchSet: 3 Gerrit-Owner: Martin L Roth <gaumless(a)tutanota.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: spd/lp5: Add new LP5 part H58G56AK6BX069
by Terry Chen (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Reka Norman, Tim Wawrzynczak, Felix Held. Terry Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64662 ) Change subject: spd/lp5: Add new LP5 part H58G56AK6BX069 ...................................................................... Patch Set 8: (1 comment) Patchset: PS8: gen spd_gen again in patch8 -- To view, visit https://review.coreboot.org/c/coreboot/+/64662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6136e17706c6248598886f8f9bd8fdd7efff4dab Gerrit-Change-Number: 64662 Gerrit-PatchSet: 8 Gerrit-Owner: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jack Rosenthal <jrosenth(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 01 Jun 2022 01:38:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation: Update coreboot 4.17 release notes
by Martin L Roth (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Felix Singer, Nicholas Chin. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64846 ) Change subject: Documentation: Update coreboot 4.17 release notes ...................................................................... Patch Set 2: (6 comments) File Documentation/releases/coreboot-4.17-relnotes.md: https://review.coreboot.org/c/coreboot/+/64846/comment/e48e6a65_66f60261 PS2, Line 45: particularly : commits interesting > particularly interesting commits Done https://review.coreboot.org/c/coreboot/+/64846/comment/e8c29a1d_91ec2b9c PS2, Line 54: cbmeme > cbmem? Done https://review.coreboot.org/c/coreboot/+/64846/comment/4eebe17a_1152a03c PS2, Line 54: would : initializing > would be initializing Done https://review.coreboot.org/c/coreboot/+/64846/comment/d530b237_de512bc1 PS2, Line 57: This reason > The reason Done https://review.coreboot.org/c/coreboot/+/64846/comment/8adea724_e3b59084 PS2, Line 65: * Add new coreDOOM payload, a port of Doom to libpayload > This line seems a bit redundant now that the full commit message is included below. […] I moved this to the last line and changed it to say "* Add new coreDOOM payload. See commit message below." https://review.coreboot.org/c/coreboot/+/64846/comment/a7e5848c_6f39aa07 PS2, Line 67: the > Remove "the". I probably missed this when I originally wrote that line in a previous patch. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/64846 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id9491ad9aa6ab3eb5504bee85591f3b1d9bf6cc2 Gerrit-Change-Number: 64846 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)tutanota.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Wed, 01 Jun 2022 01:37:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: qclib common code clean up changes
by Shelley Chen (Code Review) 01 Jun '22

01 Jun '22

Shelley Chen has submitted this change. ( https://review.coreboot.org/c/coreboot/+/64245 ) Change subject: qclib common code clean up changes ...................................................................... qclib common code clean up changes BUG=b:227946776 TEST=Validated on sc7180 and sc7280 hardware Signed-off-by: Sudheer Kumar Amrabadi <quic_samrabad(a)quicinc.com> Change-Id: I211e132d1728cf14bdd201b71618af89b339cbc1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64245 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- M src/soc/qualcomm/common/include/soc/qclib_common.h M src/soc/qualcomm/common/qclib.c 2 files changed, 34 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved diff --git a/src/soc/qualcomm/common/include/soc/qclib_common.h b/src/soc/qualcomm/common/include/soc/qclib_common.h index 648b29d..f38ed77 100644 --- a/src/soc/qualcomm/common/include/soc/qclib_common.h +++ b/src/soc/qualcomm/common/include/soc/qclib_common.h @@ -27,6 +27,14 @@ /* BA_BMASK_VALUES (blob_attributes bit mask values) */ #define QCLIB_BA_SAVE_TO_STORAGE 0x00000001 +enum qclib_cbfs_file { + QCLIB_CBFS_PMICCFG, + QCLIB_CBFS_QCSDI, + QCLIB_CBFS_QCLIB, + QCLIB_CBFS_DCB, + QCLIB_CBFS_MAX +}; + struct qclib_cb_if_table_entry { char name[QCLIB_TE_NAME_LENGTH]; /* 0x00 TE_NAME */ uint64_t blob_address; /* 0x18 blob addr in SRAM */ @@ -60,4 +68,7 @@ void qclib_load_and_run(void); int qclib_soc_blob_load(void); +const char *qclib_file_default(enum qclib_cbfs_file file); +const char *qclib_file(enum qclib_cbfs_file file); + #endif // _SOC_QUALCOMM_QCLIB_COMMON_H_ diff --git a/src/soc/qualcomm/common/qclib.c b/src/soc/qualcomm/common/qclib.c index 2829cb4..90bcc20 100644 --- a/src/soc/qualcomm/common/qclib.c +++ b/src/soc/qualcomm/common/qclib.c @@ -62,6 +62,25 @@ .reserved = 0, }; +const char *qclib_file_default(enum qclib_cbfs_file file) +{ + switch (file) { + case QCLIB_CBFS_PMICCFG: + return CONFIG_CBFS_PREFIX "/pmiccfg"; + case QCLIB_CBFS_QCSDI: + return CONFIG_CBFS_PREFIX "/qcsdi"; + case QCLIB_CBFS_QCLIB: + return CONFIG_CBFS_PREFIX "/qclib"; + case QCLIB_CBFS_DCB: + return CONFIG_CBFS_PREFIX "/dcb"; + default: + die("unknown QcLib file %d", file); + } +} + +const char *qclib_file(enum qclib_cbfs_file file) + __attribute__((weak, alias("qclib_file_default"))); + void qclib_add_if_table_entry(const char *name, void *base, uint32_t size, uint32_t attrs) { @@ -181,7 +200,7 @@ qclib_add_if_table_entry(QCLIB_TE_MEM_CHIP_INFO, NULL, 0, 0); /* Attempt to load PMICCFG Blob */ - data_size = cbfs_load(CONFIG_CBFS_PREFIX "/pmiccfg", + data_size = cbfs_load(qclib_file(QCLIB_CBFS_PMICCFG), _pmic, REGION_SIZE(pmic)); if (!data_size) { printk(BIOS_ERR, "[%s] /pmiccfg failed\n", __func__); @@ -190,7 +209,7 @@ qclib_add_if_table_entry(QCLIB_TE_PMIC_SETTINGS, _pmic, data_size, 0); /* Attempt to load DCB Blob */ - data_size = cbfs_load(CONFIG_CBFS_PREFIX "/dcb", + data_size = cbfs_load(qclib_file(QCLIB_CBFS_DCB), _dcb, REGION_SIZE(dcb)); if (!data_size) { printk(BIOS_ERR, "[%s] /dcb failed\n", __func__); @@ -213,7 +232,7 @@ !vboot_is_gbb_flag_set(VB2_GBB_FLAG_RUNNING_FAFT))) { struct prog qcsdi = PROG_INIT(PROG_REFCODE, - CONFIG_CBFS_PREFIX "/qcsdi"); + qclib_file(QCLIB_CBFS_QCSDI)); /* Attempt to load QCSDI elf */ if (cbfs_prog_stage_load(&qcsdi)) @@ -228,7 +247,7 @@ /* Attempt to load QCLib elf */ struct prog qclib = - PROG_INIT(PROG_REFCODE, CONFIG_CBFS_PREFIX "/qclib"); + PROG_INIT(PROG_REFCODE, qclib_file(QCLIB_CBFS_QCLIB)); if (cbfs_prog_stage_load(&qclib)) goto fail; -- To view, visit https://review.coreboot.org/c/coreboot/+/64245 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I211e132d1728cf14bdd201b71618af89b339cbc1 Gerrit-Change-Number: 64245 Gerrit-PatchSet: 10 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-CC: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-MessageType: merged

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Change in coreboot[master]: Documentation: Update coreboot 4.17 release notes
by Nicholas Chin (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Felix Singer, Martin L Roth. Nicholas Chin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64846 ) Change subject: Documentation: Update coreboot 4.17 release notes ...................................................................... Patch Set 2: (6 comments) File Documentation/releases/coreboot-4.17-relnotes.md: https://review.coreboot.org/c/coreboot/+/64846/comment/e667731a_09739541 PS2, Line 45: particularly : commits interesting particularly interesting commits https://review.coreboot.org/c/coreboot/+/64846/comment/ea3f89c7_f3d8ce96 PS2, Line 54: cbmeme cbmem? https://review.coreboot.org/c/coreboot/+/64846/comment/c57ae18e_f42ea655 PS2, Line 54: would : initializing would be initializing https://review.coreboot.org/c/coreboot/+/64846/comment/094f1f31_b1bf942f PS2, Line 57: This reason The reason https://review.coreboot.org/c/coreboot/+/64846/comment/c61d04d0_bfd7f791 PS2, Line 65: * Add new coreDOOM payload, a port of Doom to libpayload This line seems a bit redundant now that the full commit message is included below. Maybe it could somehow be merged with the below section, point to it, or simply be removed? https://review.coreboot.org/c/coreboot/+/64846/comment/634d676e_4495696a PS2, Line 67: the Remove "the". I probably missed this when I originally wrote that line in a previous patch. -- To view, visit https://review.coreboot.org/c/coreboot/+/64846 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id9491ad9aa6ab3eb5504bee85591f3b1d9bf6cc2 Gerrit-Change-Number: 64846 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)tutanota.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Martin L Roth <gaumless(a)tutanota.com> Gerrit-Comment-Date: Wed, 01 Jun 2022 01:29:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: spd/lp5: Add new LP5 part H58G56AK6BX069
by Terry Chen (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Reka Norman, Tim Wawrzynczak, Felix Held. Terry Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64662 ) Change subject: spd/lp5: Add new LP5 part H58G56AK6BX069 ...................................................................... Patch Set 7: (1 comment) File spd/lp5/memory_parts.json: https://review.coreboot.org/c/coreboot/+/64662/comment/feaeed5c_c83e8ea2 PS6, Line 72: }, > Missing an opening brace on the next line. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/64662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6136e17706c6248598886f8f9bd8fdd7efff4dab Gerrit-Change-Number: 64662 Gerrit-PatchSet: 7 Gerrit-Owner: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jack Rosenthal <jrosenth(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 01 Jun 2022 01:26:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Reka Norman <rekanorman(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation: Update index.md and add 4.18 release notes
by Felix Singer (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Martin L Roth, Julius Werner. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64843 ) Change subject: Documentation: Update index.md and add 4.18 release notes ...................................................................... Patch Set 1: (1 comment) File Documentation/releases/coreboot-4.18-relnotes.md: https://review.coreboot.org/c/coreboot/+/64843/comment/2c6d0dd1_9c033aa9 PS1, Line 17: > When you want to deprecate something, this should be announced 6 months before. Sorry, I meant: If you want to remove something, then it should be announced 6 months before. The announcement itself makes that thing deprecated. -- To view, visit https://review.coreboot.org/c/coreboot/+/64843 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I52814ebbae804ea0ff24a7cec0618054029b8b47 Gerrit-Change-Number: 64843 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)tutanota.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)tutanota.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Wed, 01 Jun 2022 01:19:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: vendorcode/intel/fsp: Add Raptor Lake FSP headers for FSP v3127_05_8
by Bora Guvendik (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Eran Mitrani, Tim Wawrzynczak, Nick Vaccaro. Bora Guvendik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64529 ) Change subject: vendorcode/intel/fsp: Add Raptor Lake FSP headers for FSP v3127_05_8 ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: > Do you know where the code is that determines which headers to use? src/soc/intel/alderlake/Kconfig I wanted to avoid adding a SOC_RAPTORLAKE flag but I will need to add it. We can remove it later. config FSP_HEADER_PATH string "Location of FSP headers" default "src/vendorcode/intel/fsp/fsp2_0/alderlake_n/" if SOC_INTEL_ALDERLAKE_PCH_N default "src/vendorcode/intel/fsp/fsp2_0/alderlake/" -- To view, visit https://review.coreboot.org/c/coreboot/+/64529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9dd14468ec09bfe1a0904686e66d37a7389efdd4 Gerrit-Change-Number: 64529 Gerrit-PatchSet: 5 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.corp-partner.google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Wed, 01 Jun 2022 01:17:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: comment

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