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Change subject: mainboard/msi/ms7d25: Add default vboot configuration
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Patch Set 6: Verified-1
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Change subject: drivers/mrc_cache: Do not verify TPM MRC hash if secdata is mocked
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Patch Set 6: Verified-1
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Change subject: drivers/crb: Add SMBIOS hook to generate type 43 TPM Device
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Patch Set 5: Verified-1
(1 comment)
File src/drivers/crb/tis.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150221):
https://review.coreboot.org/c/coreboot/+/64049/comment/2c7c35bf_c835ed35
PS5, Line 211: #endif
trailing whitespace
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Change subject: smbios: Add API to generate SMBIOS type 43 TPM Device
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Patch Set 5: Verified-1
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Change subject: drivers/crb: Initialize Intel PTT control area
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Patch Set 6: Verified-1
(2 comments)
File src/drivers/crb/tpm.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150219):
https://review.coreboot.org/c/coreboot/+/63957/comment/567c452b_260d416a
PS6, Line 205: * some precious miliseconds which would be wasted in crb_activate_locality polling
'miliseconds' may be misspelled - perhaps 'milliseconds'?
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150219):
https://review.coreboot.org/c/coreboot/+/63957/comment/405c1350_f61de752
PS6, Line 264: * Initialize CRB adresses and sizes for PTT. It seems to be possible
'adresses' may be misspelled - perhaps 'addresses'?
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Change subject: drivers/intel/ptt: Use the correct detection method
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Patch Set 6: Verified-1
(1 comment)
File src/security/intel/txt/txt_register.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150218):
https://review.coreboot.org/c/coreboot/+/63956/comment/d5335506_6d2dfc6f
PS6, Line 98: #define TXT_STS_FTIF (TXT_BASE + 0x800)
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Change subject: soc/intel/alderlake/iomap: Correct the ADL-S reserved range
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Patch Set 6: Verified-1
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Change subject: superio/nuvoton/nct6687d: Add ramstage driver and ACPI
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Patch Set 5: Verified-1
(2 comments)
File src/superio/nuvoton/nct6687d/superio.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150215):
https://review.coreboot.org/c/coreboot/+/63927/comment/c5cf5b74_3ae1d550
PS5, Line 42: printk(BIOS_INFO, "set power %s after power fail\n", power_status ? "on" : "off");
line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150215):
https://review.coreboot.org/c/coreboot/+/63927/comment/1754979a_5828dfa6
PS5, Line 60: { NULL, NCT6687D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1 | PNP_MSC0,
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Change subject: soc/intel/alderlake/vr_config.c: Add VR params for ADL-S
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Patch Set 6: Verified-1
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