coreboot-gerrit June 2022

coreboot-gerrit@coreboot.org

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1234 discussions

Change in coreboot[master]: cpu/x86/smm_module_loader: Drop superfluous checks
by Arthur Heymans (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Kyösti Mälkki. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63480 ) Change subject: cpu/x86/smm_module_loader: Drop superfluous checks ...................................................................... Patch Set 21: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/63480/comment/54122338_61aab7b2 PS20, Line 10: parts of the code. > No need to describe it in commit message, but if you could add a gerrit review comments inline where the checks are now, please. It's done in the code that sets up everything (l430 in this CL). File src/cpu/x86/smm/smm_module_loader.c: https://review.coreboot.org/c/coreboot/+/63480/comment/07236b6b_2113bb8f PS20, Line 174: * output: return -1, if runtime smi code could not be installed. In > previosly 0 or 1 was returned Done https://review.coreboot.org/c/coreboot/+/63480/comment/a5241be4_5f4a94ab PS20, Line 180: static int smm_place_entry_code(const unsigned int num_cpus) > always returns 1 now Done https://review.coreboot.org/c/coreboot/+/63480/comment/2c3cab49_8ba77e80 PS20, Line 225: static int smm_stub_place_staggered_entry_points(const struct smm_loader_params *params) > always returns 1 now ? Done https://review.coreboot.org/c/coreboot/+/63480/comment/1b554d8b_dcbaba0c PS20, Line 298: printk(BIOS_ERR, "%s: staggered entry points failed\n", __func__); > cannot hit this error? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/63480 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I275d5dda9c69cc89608450ae27dd5dbd581e3595 Gerrit-Change-Number: 63480 Gerrit-PatchSet: 21 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Wed, 01 Jun 2022 11:05:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake/fsp_params.c: Add VccIn Aux Imon IccMax for ADL-S
by build bot (Jenkins) (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Michał Kopeć, Tim Wawrzynczak. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63839 ) Change subject: soc/intel/alderlake/fsp_params.c: Add VccIn Aux Imon IccMax for ADL-S ...................................................................... Patch Set 6: Verified-1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63839 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia95404e717787edbdb67c9e584e749526b973427 Gerrit-Change-Number: 63839 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Wed, 01 Jun 2022 11:05:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Do not pass IRQs for non-existent devices to FSP
by build bot (Jenkins) (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Michał Kopeć, Tim Wawrzynczak. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63837 ) Change subject: soc/intel/alderlake: Do not pass IRQs for non-existent devices to FSP ...................................................................... Patch Set 6: Verified-1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63837 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I055d4bbfd04a01fa9943278b6bbc9a31b9dfc628 Gerrit-Change-Number: 63837 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Wed, 01 Jun 2022 11:04:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake/fsp_params.c: Fill PCI SSID parameters
by build bot (Jenkins) (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Michał Kopeć, Tim Wawrzynczak. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63836 ) Change subject: soc/intel/alderlake/fsp_params.c: Fill PCI SSID parameters ...................................................................... Patch Set 6: Verified-1 (2 comments) File src/soc/intel/alderlake/fsp_params.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150256): https://review.coreboot.org/c/coreboot/+/63836/comment/81a70222_5cd5143b PS6, Line 889: uint64_t :4; space prohibited before that ':' (ctx:WxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150256): https://review.coreboot.org/c/coreboot/+/63836/comment/a87f56d6_d10f5739 PS6, Line 891: uint64_t :16; space prohibited before that ':' (ctx:WxV) -- To view, visit https://review.coreboot.org/c/coreboot/+/63836 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a6d299ec40bac8e29d06926572e375d7d835e29 Gerrit-Change-Number: 63836 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Wed, 01 Jun 2022 11:04:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/msi/ms7d25: Properly handle CnvDdrRfim parameter
by build bot (Jenkins) (Code Review) 01 Jun '22

01 Jun '22

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Change in coreboot[master]: soc/intel/alderlake/hsphy: Add support for HSPHY firmware loading
by Michał Kopeć (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Michał Żygowski, Maulik V Vaghela, Jeremy Soller, Michał Kopeć, Tim Wawrzynczak, Paul Menzel, Ronak Kanabar. Michał Kopeć has uploaded a new patch set (#5) to the change originally created by Michał Żygowski. ( https://review.coreboot.org/c/coreboot/+/64074 ) Change subject: soc/intel/alderlake/hsphy: Add support for HSPHY firmware loading ...................................................................... soc/intel/alderlake/hsphy: Add support for HSPHY firmware loading BIOS must send the IP_LOAD HECI command to fetch the firmware for CPU PCIe Gen5 and upload it via CPU REG BAR prior FSP Silicon Init. Implementation based on Slimbootloader's "Silicon/AlderlakePkg/Library/CpuPcieHsPhyInitLib" and FSP source. TEST=Boot MSI PRO Z690-A and see the HSPHY FW is loaded and its recipe and version is printed. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I6c6c11581e3d3d9bab0131fae6ef487cafe98080 Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> --- M src/soc/intel/alderlake/Makefile.inc M src/soc/intel/alderlake/chip.c A src/soc/intel/alderlake/hsphy.c A src/soc/intel/alderlake/include/soc/hsphy.h 4 files changed, 364 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/64074/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/64074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6c6c11581e3d3d9bab0131fae6ef487cafe98080 Gerrit-Change-Number: 64074 Gerrit-PatchSet: 5 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake/hsphy: Add support for HSPHY firmware loading
by Michał Kopeć (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Michał Żygowski, Maulik V Vaghela, Jeremy Soller, Tim Wawrzynczak, Paul Menzel, Ronak Kanabar. Michał Kopeć has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64074 ) Change subject: soc/intel/alderlake/hsphy: Add support for HSPHY firmware loading ...................................................................... Patch Set 4: (4 comments) File src/soc/intel/alderlake/hsphy.c: https://review.coreboot.org/c/coreboot/+/64074/comment/4835a0d5_594257bd PS2, Line 172: hexdump(hash_buf, hash_size); > suggestion: add headers before the hexdumps, like 'hash from CSE', and 'calculated hash' ? Added headers https://review.coreboot.org/c/coreboot/+/64074/comment/c0bde600_8ff505ac PS2, Line 188: { : break; // End of file : } > {} not necessary Removed https://review.coreboot.org/c/coreboot/+/64074/comment/dc3b5a18_b9afd157 PS2, Line 275: > extra tab Removed https://review.coreboot.org/c/coreboot/+/64074/comment/51bc9d1c_d35e059b PS2, Line 301: > nit: extra blank line Removed -- To view, visit https://review.coreboot.org/c/coreboot/+/64074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6c6c11581e3d3d9bab0131fae6ef487cafe98080 Gerrit-Change-Number: 64074 Gerrit-PatchSet: 4 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-CC: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Comment-Date: Wed, 01 Jun 2022 11:03:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: nb/intel/i440bx: Use PARALLEL_MP
by Kyösti Mälkki (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Keith Hui, Branden Waldner, Angel Pons, Arthur Heymans, Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59693 ) Change subject: nb/intel/i440bx: Use PARALLEL_MP ...................................................................... Patch Set 10: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59693 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic8d2582b353069eecea8561cfe01b2dd8221779b Gerrit-Change-Number: 59693 Gerrit-PatchSet: 10 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Branden Waldner <scruffy99(a)gmail.com> Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Attention: Branden Waldner <scruffy99(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 01 Jun 2022 11:02:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/msi/ms7d25: Configure PCIe Root Ports
by build bot (Jenkins) (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Michał Żygowski, Michał Kopeć. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63656 ) Change subject: mb/msi/ms7d25: Configure PCIe Root Ports ...................................................................... Patch Set 10: Verified-1 (57 comments) File src/mainboard/msi/ms7d25/gpio.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/664695d1_d4aceab7 PS10, Line 142: _PAD_CFG_STRUCT(VGPIO_4, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/20b5c6b1_2e23834b PS10, Line 172: _PAD_CFG_STRUCT(VGPIO_USB_0, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_0 */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/407cf94f_ea51ac4f PS10, Line 172: _PAD_CFG_STRUCT(VGPIO_USB_0, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_0 */ need consistent spacing around '|' (ctx:VxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/18d170ee_05dc4d24 PS10, Line 173: _PAD_CFG_STRUCT(VGPIO_USB_1, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_1 */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/b4faf8b6_ca229968 PS10, Line 173: _PAD_CFG_STRUCT(VGPIO_USB_1, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_1 */ need consistent spacing around '|' (ctx:VxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/8dacb674_f122e2cd PS10, Line 174: _PAD_CFG_STRUCT(VGPIO_USB_2, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_2 */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/32d6525e_d433dca7 PS10, Line 174: _PAD_CFG_STRUCT(VGPIO_USB_2, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_2 */ need consistent spacing around '|' (ctx:VxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/edd0bbc2_c5b6e6d5 PS10, Line 175: _PAD_CFG_STRUCT(VGPIO_USB_3, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_3 */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/51ec9625_c5a101c3 PS10, Line 175: _PAD_CFG_STRUCT(VGPIO_USB_3, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_3 */ need consistent spacing around '|' (ctx:VxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/a55fd757_c57e8e43 PS10, Line 176: _PAD_CFG_STRUCT(VGPIO_USB_8, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_8 */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/8ee13660_61df5a15 PS10, Line 176: _PAD_CFG_STRUCT(VGPIO_USB_8, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_8 */ need consistent spacing around '|' (ctx:VxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/ae6cdd89_2065ad52 PS10, Line 177: _PAD_CFG_STRUCT(VGPIO_USB_9, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_9 */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/a83a123f_c76e2bf5 PS10, Line 177: _PAD_CFG_STRUCT(VGPIO_USB_9, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_9 */ need consistent spacing around '|' (ctx:VxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/27b8ded2_dd39dd9c PS10, Line 178: _PAD_CFG_STRUCT(VGPIO_USB_10, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_10 */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/ec04e404_e6e378c4 PS10, Line 178: _PAD_CFG_STRUCT(VGPIO_USB_10, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_10 */ need consistent spacing around '|' (ctx:VxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/340d5892_e7b1d080 PS10, Line 179: _PAD_CFG_STRUCT(VGPIO_USB_11, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_11 */ line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/8e56a57b_4d2d68ff PS10, Line 179: _PAD_CFG_STRUCT(VGPIO_USB_11, PAD_FUNC(NF1) | PAD_RESET(DEEP)| PAD_CFG_GPIO_NAF_VWE, 0), /* VGPIO_USB_11 */ need consistent spacing around '|' (ctx:VxW) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/f5f7ff4c_13c1f008 PS10, Line 425: // _PAD_CFG_STRUCT(VGPIO_PCIE_0, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/46d4236a_e23ef1c9 PS10, Line 426: // _PAD_CFG_STRUCT(VGPIO_PCIE_1, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/e4c29aa7_c7285b1f PS10, Line 427: // _PAD_CFG_STRUCT(VGPIO_PCIE_2, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/02eef888_e128edd1 PS10, Line 428: // _PAD_CFG_STRUCT(VGPIO_PCIE_3, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/66a3025b_cd50103c PS10, Line 429: // _PAD_CFG_STRUCT(VGPIO_PCIE_4, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/7dba2c71_709a9018 PS10, Line 430: // _PAD_CFG_STRUCT(VGPIO_PCIE_5, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/2c93575a_7ef64a19 PS10, Line 431: // _PAD_CFG_STRUCT(VGPIO_PCIE_6, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/d501c995_d8aa4455 PS10, Line 432: // _PAD_CFG_STRUCT(VGPIO_PCIE_7, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/45b5e746_e0b36604 PS10, Line 433: // _PAD_CFG_STRUCT(VGPIO_PCIE_8, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/36058a72_617cbc68 PS10, Line 434: // _PAD_CFG_STRUCT(VGPIO_PCIE_9, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/a68fd95b_f8b6f7da PS10, Line 435: // _PAD_CFG_STRUCT(VGPIO_PCIE_10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/b6e06024_8cce82e9 PS10, Line 436: // _PAD_CFG_STRUCT(VGPIO_PCIE_11, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/7802452f_4d5979f3 PS10, Line 437: // _PAD_CFG_STRUCT(VGPIO_PCIE_12, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/bf6cddfb_b50fe729 PS10, Line 438: // _PAD_CFG_STRUCT(VGPIO_PCIE_13, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/e2691e55_07453d4b PS10, Line 439: // _PAD_CFG_STRUCT(VGPIO_PCIE_14, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/97c01c30_1bae8314 PS10, Line 440: // _PAD_CFG_STRUCT(VGPIO_PCIE_15, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/345d584a_5dd9fdff PS10, Line 441: // _PAD_CFG_STRUCT(VGPIO_PCIE_64, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/a94d0e16_6895086c PS10, Line 442: // _PAD_CFG_STRUCT(VGPIO_PCIE_65, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/5308bb01_b88cc9f0 PS10, Line 443: // _PAD_CFG_STRUCT(VGPIO_PCIE_66, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/1d61a638_9049668b PS10, Line 444: // _PAD_CFG_STRUCT(VGPIO_PCIE_67, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/137b2a70_dbaf1830 PS10, Line 447: // _PAD_CFG_STRUCT(VGPIO_PCIE_16, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/cd244411_e912e03d PS10, Line 448: // _PAD_CFG_STRUCT(VGPIO_PCIE_17, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/66529fdb_d68c223b PS10, Line 449: // _PAD_CFG_STRUCT(VGPIO_PCIE_18, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/6e57c2e4_6a1568ec PS10, Line 450: // _PAD_CFG_STRUCT(VGPIO_PCIE_19, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/99257d90_1a1d5e75 PS10, Line 451: // _PAD_CFG_STRUCT(VGPIO_PCIE_20, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/b2bda3c0_d720056b PS10, Line 452: // _PAD_CFG_STRUCT(VGPIO_PCIE_21, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/4e6750ef_e32d8ef3 PS10, Line 453: // _PAD_CFG_STRUCT(VGPIO_PCIE_22, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/53f3597e_4f7d0ace PS10, Line 454: // _PAD_CFG_STRUCT(VGPIO_PCIE_23, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/7c50e8db_5b282e52 PS10, Line 455: // _PAD_CFG_STRUCT(VGPIO_PCIE_24, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/90d5d969_b509d800 PS10, Line 456: // _PAD_CFG_STRUCT(VGPIO_PCIE_25, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/ff8ce6f3_2687894d PS10, Line 457: // _PAD_CFG_STRUCT(VGPIO_PCIE_26, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/f2f50c98_785f8a21 PS10, Line 458: // _PAD_CFG_STRUCT(VGPIO_PCIE_27, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/c03cf746_e37cacae PS10, Line 459: // _PAD_CFG_STRUCT(VGPIO_PCIE_28, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/cdc08aab_b013e701 PS10, Line 460: // _PAD_CFG_STRUCT(VGPIO_PCIE_29, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/40cd47ce_f0a4c411 PS10, Line 461: // _PAD_CFG_STRUCT(VGPIO_PCIE_30, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/78a0e55e_dd297681 PS10, Line 462: // _PAD_CFG_STRUCT(VGPIO_PCIE_31, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/41599a4b_0478d8cf PS10, Line 463: // _PAD_CFG_STRUCT(VGPIO_PCIE_68, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/36eea5d9_003c3b1c PS10, Line 464: // _PAD_CFG_STRUCT(VGPIO_PCIE_69, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/2c8e796d_7b6f4f9a PS10, Line 465: // _PAD_CFG_STRUCT(VGPIO_PCIE_70, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150250): https://review.coreboot.org/c/coreboot/+/63656/comment/784178ed_83d4dcef PS10, Line 466: // _PAD_CFG_STRUCT(VGPIO_PCIE_71, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_CFG_GPIO_NAF_VWE, 0), line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/63656 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I50199d2caf54509a72c5100acb770bf766327e7f Gerrit-Change-Number: 63656 Gerrit-PatchSet: 10 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Comment-Date: Wed, 01 Jun 2022 11:01:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake/hsphy: Add support for HSPHY firmware loading
by build bot (Jenkins) (Code Review) 01 Jun '22

01 Jun '22

Attention is currently required from: Maulik V Vaghela, Jeremy Soller, Michał Kopeć, Tim Wawrzynczak, Paul Menzel, Ronak Kanabar. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64074 ) Change subject: soc/intel/alderlake/hsphy: Add support for HSPHY firmware loading ...................................................................... Patch Set 4: Verified-1 (11 comments) File src/soc/intel/alderlake/hsphy.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150249): https://review.coreboot.org/c/coreboot/+/64074/comment/69dafca1_cb794f5e PS4, Line 28: #define HSPHY_PAYLOAD_SIZE 32*KiB Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150249): https://review.coreboot.org/c/coreboot/+/64074/comment/279498da_ce94b4e9 PS4, Line 40: #define HSPHY_MEM_VERIFIER_ERROR_STATUS (HSPHY_VERIFIER_BASE + 0x30) please, no space before tabs Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150249): https://review.coreboot.org/c/coreboot/+/64074/comment/6cfb9efe_986531a3 PS4, Line 67: }__packed; space required after that close brace '}' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150249): https://review.coreboot.org/c/coreboot/+/64074/comment/b36f5505_cf92a65f PS4, Line 159: printk (BIOS_ERR, "Hash alg %d not supported, try SHA384\n", hash_alg); space prohibited between function name and open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150249): https://review.coreboot.org/c/coreboot/+/64074/comment/a71774e6_d6e90ac8 PS4, Line 186: i += sizeof (*push_model); space prohibited between function name and open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150249): https://review.coreboot.org/c/coreboot/+/64074/comment/f72ccd2b_e203df06 PS4, Line 188: if ((push_model->address == 0) && (push_model->count == 0)) { braces {} are not necessary for single statement blocks Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150249): https://review.coreboot.org/c/coreboot/+/64074/comment/e5885163_58febade PS4, Line 194: i += sizeof (uint32_t); space prohibited between function name and open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150249): https://review.coreboot.org/c/coreboot/+/64074/comment/31f5183b_eabb2dff PS4, Line 275: trailing whitespace Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150249): https://review.coreboot.org/c/coreboot/+/64074/comment/4922592b_2bf11749 PS4, Line 312: hsphy_ver = REGBAR32(CPU_PID_PCIE_PHYx16_0, HSPHY_FW_VERSION);; Statements terminations use 1 semicolon Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150249): https://review.coreboot.org/c/coreboot/+/64074/comment/329bd48d_36ac0dc2 PS4, Line 317: hsphy_ver = REGBAR32(CPU_PID_PCIE_PHYx16_1, HSPHY_FW_VERSION);; Statements terminations use 1 semicolon Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150249): https://review.coreboot.org/c/coreboot/+/64074/comment/34cef7f3_117f7951 PS4, Line 344: } adding a line without newline at end of file -- To view, visit https://review.coreboot.org/c/coreboot/+/64074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6c6c11581e3d3d9bab0131fae6ef487cafe98080 Gerrit-Change-Number: 64074 Gerrit-PatchSet: 4 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Comment-Date: Wed, 01 Jun 2022 11:01:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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