coreboot-gerrit May 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: ec/google/chromeec: Add EC Mux device
by Prashant Malani (Code Review) 02 May '22

02 May '22

Attention is currently required from: Tim Wawrzynczak, Paul Menzel. Prashant Malani has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63792 ) Change subject: ec/google/chromeec: Add EC Mux device ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > OK. Just to clarify, if I add the devices to the override. […] FWIW, when I *just* add the device to the brya0 override (no Kconfig enabled), and try to build coreboot within the Chrome OS chroot, I get the following error: >>> 19:12:49 Jobs: 0 of 2 complete, 1 failed Load avg: 8.17, 6.09, 4.36 * Messages for package sys-boot/coreboot-9999 merged to /build/brya/: * Log file: /build/brya/tmp/portage/logs/sys-boot:coreboot-9999:20220502-191230.log * ERROR: sys-boot/coreboot-9999::chromiumos failed (compile phase): * emake failed * * Build log: /build/brya/tmp/portage/logs/sys-boot:coreboot-9999:20220502-191230.log * Stable log symlink: /build/brya/tmp/portage/sys-boot/coreboot-9999/temp/build.log * CWD: /build/brya/tmp/portage/sys-boot/coreboot-9999/work/coreboot-9999 * S: /build/brya/tmp/portage/sys-boot/coreboot-9999/work/coreboot-9999 * * A cros-workon package 'coreboot-9999' failed to build above. * Local branch for '/mnt/host/source/src/third_party/coreboot/3rdparty/libgfxinit' has no upstream and may be out of sync. * You may need to run: * git branch --set-upstream-to=m/main && git rebase --preserve-merges * * * A cros-workon package 'coreboot-9999' failed to build above. * Local branch for '/mnt/host/source/src/third_party/coreboot/3rdparty/libhwbase' has no upstream and may be out of sync. * You may need to run: * git branch --set-upstream-to=m/main && git rebase --preserve-merges It compiles fine without that specific brya0 override change. -- To view, visit https://review.coreboot.org/c/coreboot/+/63792 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia2022810292783583ee5f09ce29a63b96686dbb8 Gerrit-Change-Number: 63792 Gerrit-PatchSet: 1 Gerrit-Owner: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 02 May 2022 19:20:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Prashant Malani <pmalani(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: util/release: Update genrelnotes with the latest version
by Jason Glenesk (Code Review) 02 May '22

02 May '22

Attention is currently required from: Martin L Roth. Jason Glenesk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62440 ) Change subject: util/release: Update genrelnotes with the latest version ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/62440 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2204793a5d1cc5792d0720d2bbfb172bb6020dd4 Gerrit-Change-Number: 62440 Gerrit-PatchSet: 3 Gerrit-Owner: Martin L Roth <martinroth(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <martinroth(a)google.com> Gerrit-Comment-Date: Mon, 02 May 2022 19:16:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/release: Update genrelnotes with the latest version
by Patrick Georgi (Code Review) 02 May '22

02 May '22

Attention is currently required from: Martin L Roth. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62440 ) Change subject: util/release: Update genrelnotes with the latest version ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62440 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2204793a5d1cc5792d0720d2bbfb172bb6020dd4 Gerrit-Change-Number: 62440 Gerrit-PatchSet: 3 Gerrit-Owner: Martin L Roth <martinroth(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <martinroth(a)google.com> Gerrit-Comment-Date: Mon, 02 May 2022 19:07:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Add support for catching null dereferences through debug regs
by Robert Zieba (Code Review) 02 May '22

02 May '22

Attention is currently required from: Robert Zieba, Raul Rangel, Nico Huber, Tim Wawrzynczak, Paul Menzel, Arthur Heymans, Kyösti Mälkki, Karthik Ramasubramanian. Hello build bot (Jenkins), Nico Huber, Raul Rangel, Angel Pons, Arthur Heymans, Tim Wawrzynczak, Kyösti Mälkki, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63657 to look at the new patch set (#10). Change subject: arch/x86: Add support for catching null dereferences through debug regs ...................................................................... arch/x86: Add support for catching null dereferences through debug regs This commit adds support for catching null dereferences and execution through x86's debug registers. This is particularly useful when running 32-bit coreboot as paging is not enabled to catch these through page faults. This commit adds three new configs to support this feature: DEBUG_HW_BREAKPOINTS, DEBUG_NULL_DEREF_BREAKPOINTS and DEBUG_NULL_DEREF_HALT. BUG=b:223902046 TEST=Ran on nipperkin device, verifying that HW breakpoints work as expected. Change-Id: I113590689046a13c2a552741bbfe7668a834354a Signed-off-by: Robert Zieba <robertzieba(a)google.com> --- M src/arch/x86/Kconfig M src/arch/x86/Makefile.inc A src/arch/x86/breakpoint.c M src/arch/x86/exception.c A src/arch/x86/include/arch/breakpoint.h A src/arch/x86/include/arch/null_breakpoint.h A src/arch/x86/null_breakpoint.c 7 files changed, 454 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/63657/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/63657 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I113590689046a13c2a552741bbfe7668a834354a Gerrit-Change-Number: 63657 Gerrit-PatchSet: 10 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: arch/x86: Add support for catching null dereferences through debug regs
by Robert Zieba (Code Review) 02 May '22

02 May '22

Attention is currently required from: Robert Zieba, Raul Rangel, Nico Huber, Tim Wawrzynczak, Paul Menzel, Arthur Heymans, Kyösti Mälkki, Karthik Ramasubramanian. Hello build bot (Jenkins), Nico Huber, Raul Rangel, Angel Pons, Arthur Heymans, Tim Wawrzynczak, Kyösti Mälkki, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63657 to look at the new patch set (#9). Change subject: arch/x86: Add support for catching null dereferences through debug regs ...................................................................... arch/x86: Add support for catching null dereferences through debug regs This commit adds support for catching null dereferences and execution through x86's debug registers. This is particularly useful when running 32-bit coreboot as paging is not enabled to catch these through page faults. This commit adds three new configs to support this feature: DEBUG_HW_BREAKPOINTS, DEBUG_NULL_DEREF_BREAKPOINTS and DEBUG_NULL_DEREF_HALT. BUG=b:223902046 TEST=Ran on nipperkin device, verifying that HW breakpoints work as expected. Change-Id: I113590689046a13c2a552741bbfe7668a834354a Signed-off-by: Robert Zieba <robertzieba(a)google.com> --- M src/arch/x86/Kconfig M src/arch/x86/Makefile.inc A src/arch/x86/breakpoint.c M src/arch/x86/exception.c A src/arch/x86/include/arch/breakpoint.h A src/arch/x86/include/arch/null_breakpoint.h A src/arch/x86/null_breakpoint.c 7 files changed, 454 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/63657/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/63657 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I113590689046a13c2a552741bbfe7668a834354a Gerrit-Change-Number: 63657 Gerrit-PatchSet: 9 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in libgfxinit[master]: README: Fix hyphenations in markdown
by Angel Pons (Code Review) 02 May '22

02 May '22

Attention is currently required from: Nico Huber, Jack Rosenthal. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/63588 ) Change subject: README: Fix hyphenations in markdown ...................................................................... Patch Set 2: Verified+1 Code-Review+2 -- To view, visit https://review.coreboot.org/c/libgfxinit/+/63588 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: Ie44b3d4c14215be6cc50692f0063139066751cbf Gerrit-Change-Number: 63588 Gerrit-PatchSet: 2 Gerrit-Owner: Jack Rosenthal <jrosenth(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jack Rosenthal <jrosenth(a)chromium.org> Gerrit-Comment-Date: Mon, 02 May 2022 19:02:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation/infra/builders.md: Fix markdown inssues
by Angel Pons (Code Review) 02 May '22

02 May '22

Attention is currently required from: Felix Singer, Martin L Roth. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63804 ) Change subject: Documentation/infra/builders.md: Fix markdown inssues ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63804 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I82317f51c003b2c23d64c3cbbcecbf9a39d5d509 Gerrit-Change-Number: 63804 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <martinroth(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Martin L Roth <martinroth(a)google.com> Gerrit-Comment-Date: Mon, 02 May 2022 19:01:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: provide a list of D-states to enter LPM
by Subrata Banik (Code Review) 02 May '22

02 May '22

Attention is currently required from: Tarun Tuli, Paul Menzel. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63969 ) Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM ...................................................................... Patch Set 12: (4 comments) File src/soc/intel/alderlake/acpi.c: https://review.coreboot.org/c/coreboot/+/63969/comment/632d8ea5_805b05a7 PS12, Line 179: min_pci_d_states wondering if we have any way to reduce this static array. @Tim any-thoughts ? we could memset to `UNDEF` then only update the relevant index as-applicable for device. or how about attaching to devicetree.cb that way, only enabled device get the chance to update the `d-states` ? https://review.coreboot.org/c/coreboot/+/63969/comment/4c3069c0_0fcfba5d PS12, Line 470: does it make sense to check if device is actually enabled or not ? if not then set to `undef`? https://review.coreboot.org/c/coreboot/+/63969/comment/a1b742a9_699b991b PS12, Line 524: if (min_state == UNDEF) : min_state = D0; looks like you are setting min_state = D0 for all devices with UNDEF ? in that case, do we still need to initialise the array with UNDEF because by default it still would be `zero` aka D0. File src/soc/intel/common/block/acpi/pep.c: https://review.coreboot.org/c/coreboot/+/63969/comment/20faa8f1_44ceee26 PS12, Line 115: /* SoC returned more than zero devices so use those. */ : printk(BIOS_INFO, "Returning SoC specific constraint package for %d devices\n", num_devices) is this for debug purpose ? -- To view, visit https://review.coreboot.org/c/coreboot/+/63969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Gerrit-Change-Number: 63969 Gerrit-PatchSet: 12 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 02 May 2022 19:00:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: lib/spd_bin: Update names and definitions for LPDDR5
by Cliff Huang (Code Review) 02 May '22

02 May '22

Attention is currently required from: Bora Guvendik, Anil Kumar K, Jeremy Compostella, Subrata Banik, Jérémy Compostella, Selma Bensaid, Paul Menzel, Angel Pons, Bernardo Perez Priego. Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58101 ) Change subject: lib/spd_bin: Update names and definitions for LPDDR5 ...................................................................... Patch Set 13: (1 comment) File src/lib/spd_bin.c: https://review.coreboot.org/c/coreboot/+/58101/comment/2e173f4b_fc8c2452 PS11, Line 38: case SPD_DRAM_DDR5: > line 36 and 37 are now in line 38, and 39. put it back to the same order from the current base. -- To view, visit https://review.coreboot.org/c/coreboot/+/58101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I52ecf24a313d4cbdd0859c623533630c6a6c3713 Gerrit-Change-Number: 58101 Gerrit-PatchSet: 13 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-CC: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Comment-Date: Mon, 02 May 2022 18:46:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bora Guvendik <bora.guvendik(a)intel.com> Comment-In-Reply-To: Anil Kumar K <anil.kumar.k(a)intel.com> Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: lib/spd_bin: Update names and definitions for LPDDR5
by Cliff Huang (Code Review) 02 May '22

02 May '22

Attention is currently required from: Bora Guvendik, Anil Kumar K, Jeremy Compostella, Subrata Banik, Selma Bensaid, Paul Menzel, Angel Pons, Bernardo Perez Priego. Hello Bora Guvendik, build bot (Jenkins), Anil Kumar K, Subrata Banik, Selma Bensaid, Tim Wawrzynczak, Angel Pons, Bernardo Perez Priego, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58101 to look at the new patch set (#13). Change subject: lib/spd_bin: Update names and definitions for LPDDR5 ...................................................................... lib/spd_bin: Update names and definitions for LPDDR5 This addresses the error message: Defaulting to using DDR4 params. Please add dram_type check for 19 to use_ddr4_params 1. Add LPDDR5 for the param 2. Fix SPD name for LPDDR5 Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: I52ecf24a313d4cbdd0859c623533630c6a6c3713 --- M src/lib/spd_bin.c 1 file changed, 9 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/58101/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/58101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I52ecf24a313d4cbdd0859c623533630c6a6c3713 Gerrit-Change-Number: 58101 Gerrit-PatchSet: 13 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-CC: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit May 2022