coreboot-gerrit May 2022

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Change in coreboot[master]: treewide/azalia: Fix 16-bit read and use common functions
by Elyes Haouas (Code Review) 01 May '22

01 May '22

Attention is currently required from: Angel Pons, Arthur Heymans, Patrick Rudolph, Elyes Haouas. Hello build bot (Jenkins), Nico Huber, Paul Menzel, Arthur Heymans, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61845 to look at the new patch set (#10). Change subject: treewide/azalia: Fix 16-bit read and use common functions ...................................................................... treewide/azalia: Fix 16-bit read and use common functions Correct the codec mask and read only 16 bits. Also, use common codec_detect() and azalia_audio_init(). Not tested on hardware. Change-Id: I530aa21d5a26ade0bc071351ac609c84bd8eb2cb Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/device/azalia_device.c M src/include/device/azalia_device.h M src/northbridge/intel/haswell/minihd.c M src/soc/intel/broadwell/minihd.c M src/soc/intel/broadwell/pch/Makefile.inc M src/soc/intel/broadwell/pch/hda.c M src/southbridge/intel/bd82x6x/azalia.c M src/southbridge/intel/i82801dx/ac97.c M src/southbridge/intel/i82801gx/azalia.c M src/southbridge/intel/i82801ix/azalia.c M src/southbridge/intel/i82801jx/azalia.c M src/southbridge/intel/ibexpeak/azalia.c M src/southbridge/intel/lynxpoint/Kconfig M src/southbridge/intel/lynxpoint/Makefile.inc M src/southbridge/intel/lynxpoint/azalia.c D src/southbridge/intel/lynxpoint/hda_verb.c D src/southbridge/intel/lynxpoint/hda_verb.h 17 files changed, 30 insertions(+), 264 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/61845/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/61845 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I530aa21d5a26ade0bc071351ac609c84bd8eb2cb Gerrit-Change-Number: 61845 Gerrit-PatchSet: 10 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: MAINTAINERS: Add myself as maintainer of mc_ehl boards
by Paul Menzel (Code Review) 01 May '22

01 May '22

Attention is currently required from: Werner Zeh. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63778 ) Change subject: MAINTAINERS: Add myself as maintainer of mc_ehl boards ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63778/comment/09a003d6_e13b30dc PS2, Line 7: MAINTAINERS: Add myself as maintainer of mc_ehl boards Thank you for stepping up for that. For the future, as `git log --oneline` does not show the author, it’d be more useful to write your name instead of “myself”. ;-) -- To view, visit https://review.coreboot.org/c/coreboot/+/63778 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I203f122de6641359306c2659cb9d9dc2c93d184c Gerrit-Change-Number: 63778 Gerrit-PatchSet: 2 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Sun, 01 May 2022 07:22:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: provide a list of D-states to enter LPM
by Tarun Tuli (Code Review) 01 May '22

01 May '22

Hello Lance Zhao, build bot (Jenkins), Subrata Banik, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63969 to look at the new patch set (#8). Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM ...................................................................... soc/intel/alderlake: provide a list of D-states to enter LPM Implement sub-function 1 (Get Device Constraints) of the Low Power S0 Idle Device-Specific Method (_DSM). This provides a way in which to describe various devices required D-states to enter LPM (S0ix). The information can be used to help in diagnostics and understanding of S0ix entry failure. This implementation adds support for ADL. Other SoC's could be ported to be included as well. If they aren't, they will default to the existing behavior of a single hardcoded device to ensure compatibility with Windows. TEST=Built and tested on brya by verifying SSDT contents Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Signed-off-by: Tarun Tuli <taruntuli(a)google.com> --- M src/acpi/acpi.c M src/include/acpi/acpi.h M src/soc/intel/alderlake/acpi.c M src/soc/intel/alderlake/chip.c M src/soc/intel/common/block/acpi/pep.c M src/soc/intel/common/block/uart/uart.c 6 files changed, 418 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/63969/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/63969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Gerrit-Change-Number: 63969 Gerrit-PatchSet: 8 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: provide a list of D-states to enter LPM
by Tarun Tuli (Code Review) 01 May '22

01 May '22

Tarun Tuli has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63969 ) Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM ...................................................................... Patch Set 7: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/63969/comment/e8ee718f_5d61d7bb PS5, Line 7: ADL support for ACPI to provide a list of D states required to enter > Please look at `git log --oneline` and [1] how to compose a commit message summary. […] Done https://review.coreboot.org/c/coreboot/+/63969/comment/6d30fcb5_3d129f22 PS5, Line 10: Porting work can be carried out to other platforms. > Sorry, I do not understand that sentence. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/63969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Gerrit-Change-Number: 63969 Gerrit-PatchSet: 7 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Sun, 01 May 2022 00:24:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: provide a list of D-states to enter LPM
by Tarun Tuli (Code Review) 01 May '22

01 May '22

Attention is currently required from: Lance Zhao, Subrata Banik, Tim Wawrzynczak. Hello Lance Zhao, build bot (Jenkins), Subrata Banik, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63969 to look at the new patch set (#7). Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM ...................................................................... soc/intel/alderlake: provide a list of D-states to enter LPM Implement sub-function 1 (Get Device Constraints) of the Low Power S0 Idle Device-Specific Method (_DSM). That provides a way in which to describe various devices required D-states to enter LPM (S0ix). This information can be used to help in diagnostics and understanding of S0ix entry failure. This implementation adds support for ADL. Other SoC's could be ported to included as well. If they aren't, they will default to the existing behavior of a single hardcoded device to ensure compatibility with Windows. TEST=Built and tested on brya by verifying SSDT contents Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Signed-off-by: Tarun Tuli <taruntuli(a)google.com> --- M src/acpi/acpi.c M src/include/acpi/acpi.h M src/soc/intel/alderlake/acpi.c M src/soc/intel/alderlake/chip.c M src/soc/intel/common/block/acpi/pep.c M src/soc/intel/common/block/uart/uart.c 6 files changed, 418 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/63969/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/63969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Gerrit-Change-Number: 63969 Gerrit-PatchSet: 7 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Add support on ADL to provide a list of D-states required to enter LPM
by Tarun Tuli (Code Review) 01 May '22

01 May '22

Attention is currently required from: Lance Zhao, Tarun Tuli, Subrata Banik, Tim Wawrzynczak. Hello Lance Zhao, build bot (Jenkins), Subrata Banik, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63969 to look at the new patch set (#6). Change subject: Add support on ADL to provide a list of D-states required to enter LPM ...................................................................... Add support on ADL to provide a list of D-states required to enter LPM This change implements sub-function 1 (Get Device Constraints) of the Low Power S0 Idle Device-Specific Method (_DSM). That is, a way in which to describe various devices required D-states to enter LPM (S0ix). This information can be used to help in diagnostics and understanding of S0ix entry failure. For example, the Kernel could use this to print messages immediately before s2idle of those devices that are not yet in the required D-state for LPM. This change applies to ADL in particular, but similar porting work can be carried over to other SoC's next to provide similar functionality. Should an existing SoC not have this new implementation, it will default back the old behavior of returning a single hardcoded device to ensure Windows does not run into issues. TEST=Built and tested on brya by verifying SSDT contents Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Signed-off-by: Tarun Tuli <taruntuli(a)google.com> --- M src/acpi/acpi.c M src/include/acpi/acpi.h M src/soc/intel/alderlake/acpi.c M src/soc/intel/alderlake/chip.c M src/soc/intel/common/block/acpi/pep.c M src/soc/intel/common/block/uart/uart.c 6 files changed, 418 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/63969/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/63969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Gerrit-Change-Number: 63969 Gerrit-PatchSet: 6 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit May 2022