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Change subject: soc/intel/skylake: Move FSP_HYPERTHREADING to common Intel Kconfig
......................................................................
soc/intel/skylake: Move FSP_HYPERTHREADING to common Intel Kconfig
Move the Kconfig option `FSP_HYPERTHREADING` to common Intel Kconfig so
that it can be reused by other SoCs. Also, since not all SoCs support
hyperthreading, make it conditional on `HAVE_HYPERTHREADING`. SoCs
supporting hyperthreading need to select it so that `FSP_HYPERTHREADING`
is available.
Change-Id: I892d48b488cbf828057f0e9be9edc4352c58bbe7
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/common/block/cpu/Kconfig
M src/soc/intel/skylake/Kconfig
M src/soc/intel/tigerlake/Kconfig
5 files changed, 16 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/60543/5
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Change subject: soc/intel/skylake: Move FSP_HYPERTHREADING to common Intel Kconfig
......................................................................
Patch Set 4:
(1 comment)
File src/soc/intel/common/block/cpu/Kconfig:
https://review.coreboot.org/c/coreboot/+/60543/comment/e2ede8a7_8204ab32
PS2, Line 141: bool "Enable Hyper-Threading"
> The prompt, or the whole config, should be opt in unless you plan to […]
Done
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Hello build bot (Jenkins), Subrata Banik, Tim Wawrzynczak, Michael Niewöhner,
I'd like you to reexamine a change. Please visit
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Change subject: soc/intel/alderlake: Hook up FSP hyper-threading setting to option API
......................................................................
soc/intel/alderlake: Hook up FSP hyper-threading setting to option API
Hook up the hyper-threading setting from the FSP to the option API so
that related mainboards don't have to do that. Unless otherwise
configured (e.g. the CMOS setting or overriden by the mainboard code),
the value from the Kconfig setting `FSP_HYPERTHREADING` is used.
Change-Id: I520a936b4c3a8997ba2c6bea0126b3bbcc5d68ce
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/alderlake/romstage/fsp_params.c
2 files changed, 3 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/60547/9
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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#8).
Change subject: soc/intel/tigerlake: Hook up FSP hyper-threading setting to option API
......................................................................
soc/intel/tigerlake: Hook up FSP hyper-threading setting to option API
Hook up the hyper-threading setting from the FSP to the option API so
that related mainboards don't have to do that. Unless otherwise
configured (e.g. the CMOS setting or overriden by the mainboard code),
the value from the Kconfig setting `FSP_HYPERTHREADING` is used.
Also, remove related code from the mainboard starlabs/laptop/tgl, since
it is obsolete now.
Change-Id: I49bbd4a776b4e6c55cb373bbf88a3ca076342e3e
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/starlabs/labtop/variants/tgl/romstage.c
M src/soc/intel/tigerlake/Kconfig
M src/soc/intel/tigerlake/romstage/fsp_params.c
3 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/60545/8
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Hello build bot (Jenkins), Sean Rhodes, Nico Huber, Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/60544
to look at the new patch set (#6).
Change subject: soc/intel/cannonlake: Hook up FSP hyper-threading setting to option API
......................................................................
soc/intel/cannonlake: Hook up FSP hyper-threading setting to option API
Hook up the hyper-threading setting from the FSP to the option API so
that related mainboards don't have to do that. Unless otherwise
configured (e.g. the CMOS setting or overriden by the mainboard code),
the value from the Kconfig setting `FSP_HYPERTHREADING` is used.
Also, remove related code from the following mainboards, since it is
obsolete now.
* siemens/chili
* starlabs/laptop/cml
Change-Id: I173b87da5ce76549672c50ba30204cd77be8b82f
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/mainboard/siemens/chili/romstage.c
M src/mainboard/starlabs/labtop/variants/cml/romstage.c
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/cannonlake/romstage/fsp_params.c
4 files changed, 4 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/60544/6
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Hello build bot (Jenkins), Nico Huber, Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/60543
to look at the new patch set (#4).
Change subject: soc/intel/skylake: Move FSP_HYPERTHREADING to common Intel Kconfig
......................................................................
soc/intel/skylake: Move FSP_HYPERTHREADING to common Intel Kconfig
Move the Kconfig option `FSP_HYPERTHREADING` to common Intel Kconfig so
that it can be reused by other SoCs. Also, since not all SoCs support
hyperthreading, make it conditional on `HAVE_HYPERTHREADING`. SoCs
supporting hyperthreading need to select it so that `FSP_HYPERTHREADING`
is available.
Change-Id: I892d48b488cbf828057f0e9be9edc4352c58bbe7
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/soc/intel/common/block/cpu/Kconfig
M src/soc/intel/skylake/Kconfig
2 files changed, 13 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/60543/4
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62498 )
Change subject: mb/clevo/tgl-u: Add Clevo NV41 Tiger Lake laptop support
......................................................................
Patch Set 3:
(1 comment)
File src/mainboard/clevo/tgl-u/bootblock.c:
https://review.coreboot.org/c/coreboot/+/62498/comment/1ca32847_cfc052cf
PS1, Line 16: if (onoff) {
: gpio_set(DGPU_RST_N, 0);
: mdelay(4);
: gpio_set(DGPU_PWR_EN, 1);
: mdelay(4);
: gpio_set(DGPU_RST_N, 1);
: } else {
: gpio_set(DGPU_RST_N, 0);
: mdelay(4);
: gpio_set(DGPU_PWR_EN, 0);
> hmm, this looks like non-board-specific, generic code, that should be located in src/driver somewher […]
Aren't the power sequence GPIOs mainboard-specific? The sequence may also depend on other stuff. For example, see CB:62384
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Change subject: payloads/tianocore: Allow custom build parameters for custom builds
......................................................................
Patch Set 8: Code-Review+2
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Change subject: xcompile: Hard-code gcc-12
......................................................................
Patch Set 1: Code-Review-1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62831/comment/954f323a_dfed23a6
PS1, Line 7: xcompile: Hard-code gcc-12
Why?
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Change subject: util/crossgcc: Update to GCC 11.3
......................................................................
Patch Set 1: Code-Review+1
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