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Change subject: drivers/usb: Add chip driver for VL822 USB hub
......................................................................
Patch Set 2:
This change is ready for review.
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Change subject: Documentation: Add list of boards maintained on each branch
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Change subject: soc/intel/cmn/blk/pmc: API to inform PMC about PCI enumeration done
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Nico Huber has submitted this change. ( https://review.coreboot.org/c/libgfxinit/+/63588 )
Change subject: README: Fix hyphenations in markdown
......................................................................
README: Fix hyphenations in markdown
These hyphenations do not show properly once the Markdown is rendered
in (for example) Gitiles.
Change-Id: Ie44b3d4c14215be6cc50692f0063139066751cbf
Signed-off-by: Jack Rosenthal <jrosenth(a)chromium.org>
Reviewed-on: https://review.coreboot.org/c/libgfxinit/+/63588
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---
M README.md
1 file changed, 12 insertions(+), 12 deletions(-)
Approvals:
Angel Pons: Verified; Looks good to me, approved
Nico Huber: Looks good to me, approved
diff --git a/README.md b/README.md
index 5c54f0a..95ec37e 100644
--- a/README.md
+++ b/README.md
@@ -8,9 +8,9 @@
It can query and set up most kinds of displays based on their EDID
information. You can, however, also specify particular mode lines.
-*libgfxinit* is written in SPARK, an Ada subset with formal verifica-
-tion aspects. Absence of runtime errors can be proved automatically
-with SPARK GPL 2016.
+*libgfxinit* is written in SPARK, an Ada subset with formal
+verification aspects. Absence of runtime errors can be proved
+automatically with SPARK GPL 2016.
Building on Linux
@@ -25,9 +25,9 @@
Grab the Sources
----------------
-You'll need *libhwbase* and *libgfxinit*. Best is to clone the reposi-
-tories into a common parent directory (this way *libgfxinit* will know
-where to find *libhwbase*).
+You'll need *libhwbase* and *libgfxinit*. Best is to clone the
+repositories into a common parent directory (this way *libgfxinit*
+will know where to find *libhwbase*).
$ mkdir gfxfun && cd gfxfun
$ git clone https://review.coreboot.org/p/libhwbase.git
@@ -61,8 +61,8 @@
Build libgfxinit/`gfx_test`
---------------------------
-*libgfxinit* is configured and installed in the same manner as de-
-scribed above. You will have to select a configuration matching your
+*libgfxinit* is configured and installed in the same manner as
+described above. You will have to select a configuration matching your
hardware.
The makefile knows an additional target `gfx_test` to build a small
@@ -78,10 +78,10 @@
===========================
`gfx_test` sets up its own framebuffer in the *stolen memory*. It
-backs any current framebuffer mapping and contents up first and re-
-stores it before exiting. This works somehow even while the *i915*
-driver is running. A wrapper script `gfxtest/gfx_test.sh` is pro-
-vided to help with the setup. It switches to a text console first
+backs any current framebuffer mapping and contents up first and
+restores it before exiting. This works somehow even while the *i915*
+driver is running. A wrapper script `gfxtest/gfx_test.sh` is
+provided to help with the setup. It switches to a text console first
and tries to unload the *i915* driver. But ignores failures to do
so (it won't work if you still have any application running that
uses the gfx driver, e.g. an X server).
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Change subject: soc/intel/cmn/blk/pmc: API to inform PMC about PCI enumeration done
......................................................................
Patch Set 3:
(1 comment)
File src/soc/intel/common/block/pmc/pmclib.c:
https://review.coreboot.org/c/coreboot/+/63953/comment/8dda6b4b_53c1a941
PS2, Line 798: if (pmc_send_ipc_cmd(cmd, &req, &rsp) == CB_SUCCESS)
: return;
:
: printk(BIOS_ERR, "PMC: Failed sending PCI Enumeration Done Command\n");
> nit: […]
Ack
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Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM
......................................................................
Patch Set 12:
(2 comments)
File src/soc/intel/alderlake/acpi.c:
https://review.coreboot.org/c/coreboot/+/63969/comment/ae50738c_57b419a9
PS12, Line 179: min_pci_d_states
> Yes we could instead add statements for each device to populate at run time if we feel that improves clarity/readability. I'm somewhat indifferent on which may be cleaner so am open to the consensus.
we can do it later as well.
>
> In your second suggestion, are you proposing to include the D-states within the devicetree itself and propagating those up?
IMO, device tree is cleaner but if you and Tim already discussed then I'm okay
File src/soc/intel/common/block/acpi/pep.c:
https://review.coreboot.org/c/coreboot/+/63969/comment/fd3cb647_bbc906f3
PS12, Line 115: /* SoC returned more than zero devices so use those. */
: printk(BIOS_INFO, "Returning SoC specific constraint package for %d devices\n", num_devices)
> Yes. Will just show on boot how many devices we have emitted in this table.
Ack
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Change subject: soc/intel: Return ACPI_S4 as previous sleep state
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Change subject: ec/google/chromeec: Add EC Mux device
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
one more thing, can you split the mainboard changes in both of these CLs into one separate one on top of these two?
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