coreboot-gerrit May 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/brya/: Add PEG and initial Nvidia dGPU ASL support
by Tim Wawrzynczak (Code Review) 02 May '22

02 May '22

Attention is currently required from: Paul Menzel, Michael Niewöhner. Hello build bot (Jenkins), Subrata Banik, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62931 to look at the new patch set (#5). Change subject: mb/google/brya/: Add PEG and initial Nvidia dGPU ASL support ...................................................................... mb/google/brya/: Add PEG and initial Nvidia dGPU ASL support Some brya variants will use a GN20 series Nvidia GPU, which requires quite a bit of ACPI support code to be written for it. This patch lands a decent bit of the initial code for it on the brya platform, including: 1) PEG RTD3 methods 2) DGPU power operations (RTD3 and GCOFF, NVJT _DSM and other Methods) 3) NVOP _DSM method There will be more support to come later, this is all written to specifications from the Nvidia Software Design Guide for GN20. BUG=b:214581763 TEST=build patch train Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: Ifce1610210e9636e87dda4b55c8287334adfcc42 --- M src/mainboard/google/brya/Kconfig A src/mainboard/google/brya/acpi/gpu_defines.h A src/mainboard/google/brya/acpi/gpu_top.asl A src/mainboard/google/brya/acpi/nvjt.asl A src/mainboard/google/brya/acpi/nvop.asl A src/mainboard/google/brya/acpi/peg.asl A src/mainboard/google/brya/acpi/power.asl A src/mainboard/google/brya/acpi/utility.asl M src/mainboard/google/brya/dsdt.asl 9 files changed, 719 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/62931/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/62931 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifce1610210e9636e87dda4b55c8287334adfcc42 Gerrit-Change-Number: 62931 Gerrit-PatchSet: 5 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/var/agah: Add GPU power sequencing
by Tim Wawrzynczak (Code Review) 02 May '22

02 May '22

Attention is currently required from: Tim Wawrzynczak, Ivy Jian, Nick Vaccaro, Eric Lai. Hello build bot (Jenkins), Subrata Banik, Ivy Jian, Angel Pons, Nick Vaccaro, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62384 to look at the new patch set (#6). Change subject: mb/google/brya/var/agah: Add GPU power sequencing ...................................................................... mb/google/brya/var/agah: Add GPU power sequencing This patch adds support for power sequencing of the Nvidia GN3050 for agah, which uses PCH GPIOs to control the 5 power rails required for the GPU. The GPU is power sequenced on during mainboard initialization, then it is enumerated on the PCI bus and its resources are assigned. This GPU will be used in a sort of "hybrid graphics" mode, therefore during finalization, since its PCI BARs are saved into ACPI memory and the GPU is not required upon initial boot, the GPU is power sequenced off. Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: I1072be12ef58af5859e2a2d19c4a9c1adc0b0f88 --- M src/mainboard/google/brya/variants/agah/Makefile.inc M src/mainboard/google/brya/variants/agah/gpio.c M src/mainboard/google/brya/variants/agah/overridetree.cb A src/mainboard/google/brya/variants/agah/variant.c 4 files changed, 194 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/62384/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/62384 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1072be12ef58af5859e2a2d19c4a9c1adc0b0f88 Gerrit-Change-Number: 62384 Gerrit-PatchSet: 6 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: lib/cbfs: Compare addresses instead of arrays
by Julius Werner (Code Review) 02 May '22

02 May '22

Attention is currently required from: Martin L Roth, Paul Menzel, Angel Pons, Arthur Heymans. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62827 ) Change subject: lib/cbfs: Compare addresses instead of arrays ...................................................................... Patch Set 1: (1 comment) File src/lib/cbfs.c: https://review.coreboot.org/c/coreboot/+/62827/comment/7cc6a7a1_4bab50f0 PS1, Line 31: _preram_cbfs_cache > > Where is this defined? […] <symbols.h> actually, but that's part of the general memlayout stuff. -- To view, visit https://review.coreboot.org/c/coreboot/+/62827 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69310b0bec166faa40f56a36c6d360065cf6b08a Gerrit-Change-Number: 62827 Gerrit-PatchSet: 1 Gerrit-Owner: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Martin L Roth <martinroth(a)google.com> Gerrit-Attention: Martin L Roth <martinroth(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 02 May 2022 23:00:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: lib/spd_bin: Update names and definitions for LPDDR5
by Subrata Banik (Code Review) 02 May '22

02 May '22

Attention is currently required from: Bora Guvendik, Anil Kumar K, Cliff Huang, Jeremy Compostella, Jérémy Compostella, Selma Bensaid, Paul Menzel, Angel Pons, Bernardo Perez Priego. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58101 ) Change subject: lib/spd_bin: Update names and definitions for LPDDR5 ...................................................................... Patch Set 13: (1 comment) File src/lib/spd_bin.c: https://review.coreboot.org/c/coreboot/+/58101/comment/053c4586_1a44797b PS13, Line 27: use_ddr4_ddr5_params > I wouldn't worry too much about the names. We can simply say "DDR4 params" to refer to the param type introduced with DDR4. I agree too, `ddr4` seems good IMO as well. -- To view, visit https://review.coreboot.org/c/coreboot/+/58101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I52ecf24a313d4cbdd0859c623533630c6a6c3713 Gerrit-Change-Number: 58101 Gerrit-PatchSet: 13 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-CC: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Comment-Date: Mon, 02 May 2022 22:55:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: intel/common/../systemagent: Add sa_get_mchbar_base api
by Angel Pons (Code Review) 02 May '22

02 May '22

Attention is currently required from: Wonkyu Kim, Subrata Banik, Tim Wawrzynczak, Paul Menzel, Arthur Heymans, Michael Niewöhner. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63615 ) Change subject: intel/common/../systemagent: Add sa_get_mchbar_base api ...................................................................... Patch Set 16: (1 comment) Patchset: PS16: > @Subrata and @Angel, > > Can we summarize solution? > 1. Remove init part in case of MCBAR is not enabled in sa_get_mchbar_base API? > or > 2. use MCH_BASE_ADDRESS in ioc.c > > And enable in soc bootblock > > For #2, it's already implemented before but we updated while we adding this logic. > https://review.coreboot.org/c/coreboot/+/63198/12/src/soc/intel/common/bloc… Yes, solution #2 is my preference. -- To view, visit https://review.coreboot.org/c/coreboot/+/63615 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie4c7af3ea8c2b2b6afcc76e1165fadbe15e0bceb Gerrit-Change-Number: 63615 Gerrit-PatchSet: 16 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Mon, 02 May 2022 22:51:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Wonkyu Kim <wonkyu.kim(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: lib/spd_bin: Update names and definitions for LPDDR5
by Angel Pons (Code Review) 02 May '22

02 May '22

Attention is currently required from: Bora Guvendik, Anil Kumar K, Cliff Huang, Subrata Banik, Jeremy Compostella, Jérémy Compostella, Selma Bensaid, Paul Menzel, Bernardo Perez Priego. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58101 ) Change subject: lib/spd_bin: Update names and definitions for LPDDR5 ...................................................................... Patch Set 13: (1 comment) File src/lib/spd_bin.c: https://review.coreboot.org/c/coreboot/+/58101/comment/ba003e11_b3f0dabf PS13, Line 27: use_ddr4_ddr5_params > yes. agree. this function does not have proper name to reveal what it does at the beginning. […] I wouldn't worry too much about the names. We can simply say "DDR4 params" to refer to the param type introduced with DDR4. -- To view, visit https://review.coreboot.org/c/coreboot/+/58101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I52ecf24a313d4cbdd0859c623533630c6a6c3713 Gerrit-Change-Number: 58101 Gerrit-PatchSet: 13 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-CC: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Comment-Date: Mon, 02 May 2022 22:48:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: lib/spd_bin: Update names and definitions for LPDDR5
by Cliff Huang (Code Review) 02 May '22

02 May '22

Attention is currently required from: Bora Guvendik, Anil Kumar K, Subrata Banik, Jeremy Compostella, Jérémy Compostella, Selma Bensaid, Paul Menzel, Angel Pons, Bernardo Perez Priego. Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58101 ) Change subject: lib/spd_bin: Update names and definitions for LPDDR5 ...................................................................... Patch Set 13: (1 comment) File src/lib/spd_bin.c: https://review.coreboot.org/c/coreboot/+/58101/comment/4ccc2742_d40034d4 PS13, Line 27: use_ddr4_ddr5_params > > The function name is changed since it is modified to cover ddr5. […] yes. agree. this function does not have proper name to reveal what it does at the beginning. This has been pointed out earlier. one way to do is to create use_ddr3_param() instead of using this function and change the logic and printout. -- To view, visit https://review.coreboot.org/c/coreboot/+/58101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I52ecf24a313d4cbdd0859c623533630c6a6c3713 Gerrit-Change-Number: 58101 Gerrit-PatchSet: 13 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-CC: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Comment-Date: Mon, 02 May 2022 22:37:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel: Return ACPI_S4 as previous sleep state
by Tim Wawrzynczak (Code Review) 02 May '22

02 May '22

Attention is currently required from: Evan Green. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64002 ) Change subject: soc/intel: Return ACPI_S4 as previous sleep state ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/64002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3fb3dc428a749db80293e51a04a2096514a7b689 Gerrit-Change-Number: 64002 Gerrit-PatchSet: 1 Gerrit-Owner: Evan Green <evgreen(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Evan Green <evgreen(a)chromium.org> Gerrit-Comment-Date: Mon, 02 May 2022 22:17:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Add EC mux device to brya0
by Tim Wawrzynczak (Code Review) 02 May '22

02 May '22

Attention is currently required from: Prashant Malani. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64007 ) Change subject: mb/google/brya: Add EC mux device to brya0 ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/64007 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icf841cd32587f6bd98b15747283b0d331f013532 Gerrit-Change-Number: 64007 Gerrit-PatchSet: 2 Gerrit-Owner: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-Comment-Date: Mon, 02 May 2022 22:16:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: ec/google/chromeec/ec_acpi: Add retimer handle to Type C conn
by Tim Wawrzynczak (Code Review) 02 May '22

02 May '22

Attention is currently required from: Lance Zhao, Prashant Malani. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63793 ) Change subject: ec/google/chromeec/ec_acpi: Add retimer handle to Type C conn ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63793/comment/c2f56d54_c24ec925 PS3, Line 7: /ec_acpi nit, just: `ec/google/chromeec:` -- To view, visit https://review.coreboot.org/c/coreboot/+/63793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic0480b08c6d6a7562cca57192e49b8ea2a33b51e Gerrit-Change-Number: 63793 Gerrit-PatchSet: 3 Gerrit-Owner: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-Comment-Date: Mon, 02 May 2022 22:15:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit May 2022