coreboot-gerrit May 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: ec/google/chromeec/ec_acpi: Add retimer handle to Type C conn
by Tim Wawrzynczak (Code Review) 02 May '22

02 May '22

Attention is currently required from: Lance Zhao, Prashant Malani. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63793 ) Change subject: ec/google/chromeec/ec_acpi: Add retimer handle to Type C conn ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic0480b08c6d6a7562cca57192e49b8ea2a33b51e Gerrit-Change-Number: 63793 Gerrit-PatchSet: 3 Gerrit-Owner: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-Comment-Date: Mon, 02 May 2022 22:15:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: ec/google/chromeec: Add EC Mux device
by Tim Wawrzynczak (Code Review) 02 May '22

02 May '22

Attention is currently required from: Paul Menzel, Prashant Malani. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63792 ) Change subject: ec/google/chromeec: Add EC Mux device ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63792 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia2022810292783583ee5f09ce29a63b96686dbb8 Gerrit-Change-Number: 63792 Gerrit-PatchSet: 3 Gerrit-Owner: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-Comment-Date: Mon, 02 May 2022 22:14:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: provide a list of D-states to enter LPM
by Tim Wawrzynczak (Code Review) 02 May '22

02 May '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Paul Menzel. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63969 ) Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM ...................................................................... Patch Set 13: (9 comments) File src/soc/intel/alderlake/acpi.c: https://review.coreboot.org/c/coreboot/+/63969/comment/ac6a5041_fe0b707a PS12, Line 179: min_pci_d_states > > Yes we could instead add statements for each device to populate at run time if we feel that improv […] To me, I think it makes more sense to store a map of PCI device/path to its required D-state, e.g. ``` const static struct { unsigned int pci_dev; unsigned int d_state; } min_pci_d_states[] = { { SA_DEVFN_ROOT, ACPI_DEVICE_SLEEP_D3 }, { SA_DEVFN_CPU_PCIE1_0, ACPI_DEVICE_SLEEP_D3 }, { SA_DEVFN_IGD, ACPI_DEVICE_SLEEP_D3 }, }; ``` etc. https://review.coreboot.org/c/coreboot/+/63969/comment/588664be_8350c115 PS12, Line 470: > For clarification, we basically won't emit anything if the device is not enabled. […] soc_lpi_include_device() already includes a check for that. File src/soc/intel/alderlake/acpi.c: https://review.coreboot.org/c/coreboot/+/63969/comment/05cbaca3_56e9e5df PS13, Line 23: #define CPU_PATH_PREFIX "\\_SB.CP" See `CONFIG_ACPI_CPU_STRING` https://review.coreboot.org/c/coreboot/+/63969/comment/9ef4b2d3_3e3b43e1 PS13, Line 116: typedef enum { : D0, /* 0 */ : D1, /* 1 */ : D2, /* 2 */ : D3, /* 3 */ : UNDEF : } D_STATES; In coreboot, we don't usually use a lot of typedefs, and not all capitalized names, either so ``` enum d_states { D0, /* 0 */ D1, /* 1 */ D2, /* 2 */ D3, /* 3 */ UNDEF }; ``` But also see the existing ACPI_DEVICE_SLEEP_D0, etc., would they work here? https://review.coreboot.org/c/coreboot/+/63969/comment/b38a22c4_73829610 PS13, Line 440: if (dev && dev->enabled) { : switch (dev->path.type) { : case DEVICE_PATH_PCI: : return (min_pci_d_states[dev->path.pci.devfn] != UNDEF); : : case DEVICE_PATH_APIC: : return true; : : default: : return false; : } : } : return false; if you take my suggestion from above, this simplifies to: ``` if (!dev || !dev->enabled) return false; return dev->path.type == DEVICE_PATH_PCI || dev->path.type == DEVICE_PATH_APIC); ``` https://review.coreboot.org/c/coreboot/+/63969/comment/8c511dec_479cf89e PS13, Line 455: extern int cpu_get_apic_id(int logical_cpu); `#include <cpu/cpu.h>` https://review.coreboot.org/c/coreboot/+/63969/comment/abc813c2_2363195e PS13, Line 499: default: : /* Unhandled */ : acpigen_emit_namestring(NULL); : break; : } Probably print an error instead? soc_lpi_include_device() should take care of this case already. https://review.coreboot.org/c/coreboot/+/63969/comment/f37e3634_2df4c714 PS13, Line 505: 1 symbolic constants (e.g. `#define BLAH 1`) would be helpful for readability, and reduce the need for comments https://review.coreboot.org/c/coreboot/+/63969/comment/3576fd6b_8f7ecd18 PS13, Line 521: D0; nit: add `#define DEFAULT_CPU_D_STATE D0` -- To view, visit https://review.coreboot.org/c/coreboot/+/63969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Gerrit-Change-Number: 63969 Gerrit-PatchSet: 13 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 02 May 2022 22:11:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tarun Tuli <taruntuli(a)google.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/beadrix: Add a Proximity Sensor SX9324 for SAR
by Karthik Ramasubramanian (Code Review) 02 May '22

02 May '22

Attention is currently required from: Henry Sun, Super Ni, Teddy Shih, Paul Menzel, Aseda Aboagye, Simon Yang, Ivan Chen, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63652 ) Change subject: mb/google/dedede/var/beadrix: Add a Proximity Sensor SX9324 for SAR ...................................................................... Patch Set 4: (1 comment) File src/mainboard/google/dedede/variants/beadrix/overridetree.cb: https://review.coreboot.org/c/coreboot/+/63652/comment/6bab97c3_9313e3f7 PS4, Line 30: .speed_config[0] = { : .speed = I2C_SPEED_FAST, : .scl_lcnt = 190, : .scl_hcnt = 100, : .sda_hold = 40, : } I recommend to tune the timing for other I2C buses (0..4) in a separate patch since this CL seems to focus on P-SAR sensor. -- To view, visit https://review.coreboot.org/c/coreboot/+/63652 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If172d13aa62503547227adf91f049ea50b948888 Gerrit-Change-Number: 63652 Gerrit-PatchSet: 4 Gerrit-Owner: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Super Ni <super.ni(a)intel.corp-partner.google.com> Gerrit-Reviewer: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Reviewer: Teddy Shih <teddyshihau(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eddy Lu <eddylu(a)ami.corp-partner.google.com> Gerrit-CC: Jack Cheng <jack.cheng(a)ecs.corp-partner.google.com> Gerrit-CC: Raymond Chung <raymondchung(a)ami.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Super Ni <super.ni(a)intel.corp-partner.google.com> Gerrit-Attention: Teddy Shih <teddyshihau(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.corp-partner.google.com> Gerrit-Attention: Ivan Chen <yulunchen(a)google.com> Gerrit-Attention: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 02 May 2022 22:01:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/agah: Add GPU power sequencing
by Subrata Banik (Code Review) 02 May '22

02 May '22

Attention is currently required from: Tim Wawrzynczak, Ivy Jian, Nick Vaccaro, Eric Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62384 ) Change subject: mb/google/brya/var/agah: Add GPU power sequencing ...................................................................... Patch Set 5: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/62384 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1072be12ef58af5859e2a2d19c4a9c1adc0b0f88 Gerrit-Change-Number: 62384 Gerrit-PatchSet: 5 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Mon, 02 May 2022 21:55:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/usb: Add chip driver for VL822 USB hub
by Raul Rangel (Code Review) 02 May '22

02 May '22

Attention is currently required from: Tim Wawrzynczak, Jon Murphy, Karthik Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63968 ) Change subject: drivers/usb: Add chip driver for VL822 USB hub ...................................................................... Patch Set 2: (1 comment) File src/drivers/usb/vl/chip.h: https://review.coreboot.org/c/coreboot/+/63968/comment/92833ca8_ebf01724 PS2, Line 9: port_count Or maybe we add a port_count parameter to the existing `drivers/usb/acpi` and change this condition? https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/thi… -- To view, visit https://review.coreboot.org/c/coreboot/+/63968 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I11d7ccc42d3dce8e136eb771f120825980e5c027 Gerrit-Change-Number: 63968 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 02 May 2022 21:38:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/skyrim/var/skyrim: Add VL822 external USB hub
by Raul Rangel (Code Review) 02 May '22

02 May '22

Attention is currently required from: Jon Murphy, Karthik Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63586 ) Change subject: mb/google/skyrim/var/skyrim: Add VL822 external USB hub ...................................................................... Patch Set 4: (1 comment) File src/mainboard/google/skyrim/variants/skyrim/overridetree.cb: https://review.coreboot.org/c/coreboot/+/63586/comment/edf06684_e2f1b7f3 PS4, Line 35: chip drivers/usb/acpi Do we need to redefine these if they are already defined in the chipset.cb? -- To view, visit https://review.coreboot.org/c/coreboot/+/63586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibf6a3da8add7361fc50adcf7c62e46df234685dc Gerrit-Change-Number: 63586 Gerrit-PatchSet: 4 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 02 May 2022 21:38:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/usb: Add chip driver for VL822 USB hub
by Raul Rangel (Code Review) 02 May '22

02 May '22

Attention is currently required from: Tim Wawrzynczak, Jon Murphy, Karthik Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63968 ) Change subject: drivers/usb: Add chip driver for VL822 USB hub ...................................................................... Patch Set 2: (1 comment) File src/drivers/usb/vl/acpi_vl822.c: https://review.coreboot.org/c/coreboot/+/63968/comment/c24c1a15_bdc1f142 PS2, Line 91: ViaLabs VL822 Nothing about this file looks like it's VL822 specific. It looks like you just need a generic USB hub driver to write the required ACPI nodes. Maybe rename the files to `drivers/usb/hub` or `drivers/usb_hub/acpi`, etc. -- To view, visit https://review.coreboot.org/c/coreboot/+/63968 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I11d7ccc42d3dce8e136eb771f120825980e5c027 Gerrit-Change-Number: 63968 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 02 May 2022 21:33:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Add EC mux device to brya0
by Prashant Malani (Code Review) 02 May '22

02 May '22

Attention is currently required from: Tim Wawrzynczak, Prashant Malani. Hello build bot (Jenkins), Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/64007 to look at the new patch set (#2). Change subject: mb/google/brya: Add EC mux device to brya0 ...................................................................... mb/google/brya: Add EC mux device to brya0 Add entries to the devicetree override for brya0 and enable the Kconfig to ensure the Chrome OS EC Mux driver is build tested. BUG=b:208883648 TEST=None BRANCH=None Change-Id: Icf841cd32587f6bd98b15747283b0d331f013532 Signed-off-by: Prashant Malani <pmalani(a)chromium.org> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/variants/brya0/overridetree.cb 2 files changed, 19 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/64007/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/64007 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icf841cd32587f6bd98b15747283b0d331f013532 Gerrit-Change-Number: 64007 Gerrit-PatchSet: 2 Gerrit-Owner: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya: Add EC mux device to brya0
by Prashant Malani (Code Review) 02 May '22

02 May '22

Attention is currently required from: Tim Wawrzynczak. Prashant Malani has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/64007 ) Change subject: mb/google/brya: Add EC mux device to brya0 ...................................................................... mb/google/brya: Add EC mux device to brya0 Add entries to the devicetree override for brya0 and enable the Kconfig to ensure the Chrome OS EC Mux driver is build tested. BUG=b:208883648 TEST=None BRANCH=None Change-Id: Icf841cd32587f6bd98b15747283b0d331f013532 --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/variants/brya0/overridetree.cb 2 files changed, 19 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/64007/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 6d939ed..8c35ebc 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -21,6 +21,7 @@ select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_BOARDID select EC_GOOGLE_CHROMEEC_ESPI + select EC_GOOGLE_CHROMEEC_MUX select EC_GOOGLE_CHROMEEC_SKUID select FW_CONFIG select FW_CONFIG_SOURCE_CHROMEEC_CBI diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index 6f0eb21..c654965 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -707,7 +707,24 @@ use conn0 as mux_conn[0] use conn1 as mux_conn[1] use conn2 as mux_conn[2] - device pnp 0c09.0 on end + use ecmux0 as retimer_conn[0] + use ecmux1 as retimer_conn[1] + use ecmux2 as retimer_conn[2] + device pnp 0c09.0 on + chip ec/google/chromeec/mux + device generic 0 on + chip ec/google/chromeec/mux/conn + device generic 0 alias ecmux0 on end + end + chip ec/google/chromeec/mux/conn + device generic 1 alias ecmux1 on end + end + chip ec/google/chromeec/mux/conn + device generic 2 alias ecmux2 on end + end + end + end + end end end device ref pmc hidden -- To view, visit https://review.coreboot.org/c/coreboot/+/64007 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icf841cd32587f6bd98b15747283b0d331f013532 Gerrit-Change-Number: 64007 Gerrit-PatchSet: 1 Gerrit-Owner: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newchange

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coreboot-gerrit May 2022