coreboot-gerrit May 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/asus/p2b/dsdt.asl: Align POST code ASL stuff
by Lean Sheng Tan (Code Review) 02 May '22

02 May '22

Attention is currently required from: Angel Pons. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63987 ) Change subject: mb/asus/p2b/dsdt.asl: Align POST code ASL stuff ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63987 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8aa362007ff98e5b42add6c7908a8f7beac2222b Gerrit-Change-Number: 63987 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 02 May 2022 19:38:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Add support for catching null dereferences through debug regs
by Robert Zieba (Code Review) 02 May '22

02 May '22

Attention is currently required from: Raul Rangel, Nico Huber, Tim Wawrzynczak, Paul Menzel, Angel Pons, Arthur Heymans, Kyösti Mälkki, Karthik Ramasubramanian. Robert Zieba has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63657 ) Change subject: arch/x86: Add support for catching null dereferences through debug regs ...................................................................... Patch Set 11: (19 comments) File src/arch/x86/Makefile.inc: https://review.coreboot.org/c/coreboot/+/63657/comment/be953b12_5dba3e9f PS7, Line 237: ramstage > Why only ramstage? Done File src/arch/x86/breakpoint.c: https://review.coreboot.org/c/coreboot/+/63657/comment/38e93e77_24ca6688 PS7, Line 41: = {0, 0, 0, 0} > If you still want to keep the initializer, you can simply use `{ 0 }` regardless of how many element […] Done https://review.coreboot.org/c/coreboot/+/63657/comment/08541e9e_6576ed51 PS7, Line 41: DEBUG_REGISTER_COUNT > Instead of parallel arrays how about a struct? […] Done https://review.coreboot.org/c/coreboot/+/63657/comment/2b48509f_0841bc1c PS7, Line 42: = {NULL, NULL, NULL, NULL}; > Same Done https://review.coreboot.org/c/coreboot/+/63657/comment/f83b07dc_5fb95ca5 PS7, Line 46: uintptr_t ret = ~0x0; > Instead of returning a magic value, can you define an `*out` parameter and return true or false on s […] This function isn't be used anywhere so I ended up just removing it. https://review.coreboot.org/c/coreboot/+/63657/comment/a192bac4_acb65e6f PS7, Line 72: void > Same Done https://review.coreboot.org/c/coreboot/+/63657/comment/f1b21701_c7f7be7d PS7, Line 193: enum breakpoint_type type = write_only ? BREAKPOINT_TYPE_DATA_WRITE : BREAKPOINT_TYPE_DATA_RW; > clang-format Done https://review.coreboot.org/c/coreboot/+/63657/comment/93a64453_67ec4ad2 PS7, Line 258: DEBUG_STATUS_GET_BP_HIT > Can multiple BPs be hit at the same time? The documentation isn't clear on this. I want to say that multiples can't be hit at once but I've changed this to handle multiple ones just to be safe. https://review.coreboot.org/c/coreboot/+/63657/comment/7274333b_eda00195 PS7, Line 257: for (int i = 0; i < DEBUG_REGISTER_COUNT; i++) { : if (DEBUG_STATUS_GET_BP_HIT(i, status)) { : bp = i; : break; : } : } : : if (bp == -1) : return 0; > Can we move this to a helper that returns true/false if hit. Done https://review.coreboot.org/c/coreboot/+/63657/comment/dd22a6f7_a5c570da PS7, Line 279: fails > Why is this going to fail? We can store the type in the struct above can't we? Done File src/arch/x86/include/arch/breakpoint.h: https://review.coreboot.org/c/coreboot/+/63657/comment/1b887634_34c20eff PS7, Line 22: BREAKPOINT_TYPE_DATA_RW > What's the difference beteween this and BREAKPOINT_TYPE_DATA_WRITE? A write breakpoint only gets hit on write, RW gets hit on read and write. https://review.coreboot.org/c/coreboot/+/63657/comment/ab3c360d_a4b157a6 PS7, Line 26: out_handle > What's an out_handle? Done https://review.coreboot.org/c/coreboot/+/63657/comment/9220ae21_ac1f6461 PS7, Line 28: out_handle > Same? Done https://review.coreboot.org/c/coreboot/+/63657/comment/52e3af43_31acfdba PS7, Line 31: handle > Oh this is a handle to control the breakpoint? It would make it clearer if you defined a `struct bre […] Done https://review.coreboot.org/c/coreboot/+/63657/comment/4564674b_7af1c309 PS7, Line 44: ) { return 0; /* Not implemented */ } > clang-format Done File src/arch/x86/null_breakpoint.c: https://review.coreboot.org/c/coreboot/+/63657/comment/8836e006_cdb2d7f9 PS7, Line 10: handle > What does handle refer to in this case? Done https://review.coreboot.org/c/coreboot/+/63657/comment/1ff0b276_8e2652a4 PS7, Line 14: else > Should we have two exception handlers instead? Done https://review.coreboot.org/c/coreboot/+/63657/comment/d4e316e6_4df84d99 PS7, Line 16: printk > Can you instead call x86_exception. it prints out more information […] Ack https://review.coreboot.org/c/coreboot/+/63657/comment/3d5a54c0_57476f0b PS7, Line 40: null_exec_bp > Do we need a NULL instruction handler? Isn't that an invalid opcode? The existing exception handler […] This breakpoint will get hit when there's an instruction fetch from address 0. I've updated the message to make it clearer. -- To view, visit https://review.coreboot.org/c/coreboot/+/63657 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I113590689046a13c2a552741bbfe7668a834354a Gerrit-Change-Number: 63657 Gerrit-PatchSet: 11 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 02 May 2022 19:37:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: util/scripts: Add options to update_submodules
by Raul Rangel (Code Review) 02 May '22

02 May '22

Attention is currently required from: Felix Singer, Martin L Roth, Patrick Georgi. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60831 ) Change subject: util/scripts: Add options to update_submodules ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60831 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I222103babff7d5f4f8eb02869c598a4e06748a17 Gerrit-Change-Number: 60831 Gerrit-PatchSet: 6 Gerrit-Owner: Martin L Roth <martinroth(a)google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Martin L Roth <martinroth(a)google.com> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Comment-Date: Mon, 02 May 2022 19:33:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/ocp, soc/intel/xeon_sp: Use common ASL POST defines
by Tim Wawrzynczak (Code Review) 02 May '22

02 May '22

Attention is currently required from: Anjaneya "Reddy" Chagam, Johnny Lin, Christian Walter, Angel Pons, Arthur Heymans, Morgan Jang, Tim Chu. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63989 ) Change subject: mb/ocp, soc/intel/xeon_sp: Use common ASL POST defines ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63989 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5b4c11860a8c33e56edaea0f6de378cbaa63a8c5 Gerrit-Change-Number: 63989 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 02 May 2022 19:33:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86/acpi: Consolidate POST code handling
by Tim Wawrzynczak (Code Review) 02 May '22

02 May '22

Attention is currently required from: Lance Zhao, Angel Pons. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63988 ) Change subject: arch/x86/acpi: Consolidate POST code handling ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63988 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I891bd8754f10f16d618e76e1ab88c26164776a50 Gerrit-Change-Number: 63988 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 02 May 2022 19:32:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/asus/p2b/dsdt.asl: Align POST code ASL stuff
by Tim Wawrzynczak (Code Review) 02 May '22

02 May '22

Attention is currently required from: Angel Pons. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63987 ) Change subject: mb/asus/p2b/dsdt.asl: Align POST code ASL stuff ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63987 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8aa362007ff98e5b42add6c7908a8f7beac2222b Gerrit-Change-Number: 63987 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 02 May 2022 19:30:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86/acpi/debug.asl: Drop POST code stuff
by Tim Wawrzynczak (Code Review) 02 May '22

02 May '22

Attention is currently required from: Lance Zhao, Angel Pons. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63986 ) Change subject: arch/x86/acpi/debug.asl: Drop POST code stuff ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63986 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd73e5c1f700fd7e735bed1668f02da8f9a3adf3 Gerrit-Change-Number: 63986 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 02 May 2022 19:30:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: ec/google/chromeec: Add EC Mux device
by Tim Wawrzynczak (Code Review) 02 May '22

02 May '22

Attention is currently required from: Paul Menzel, Prashant Malani. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63792 ) Change subject: ec/google/chromeec: Add EC Mux device ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > FWIW, when I *just* add the device to the brya0 override (no Kconfig enabled), and try to build core […] Yep you need to select the Kconfig in src/mb/google/brya/Kconfig in order to be able to compile in the new driver (and e.g. use it in the overridetree file) -- To view, visit https://review.coreboot.org/c/coreboot/+/63792 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia2022810292783583ee5f09ce29a63b96686dbb8 Gerrit-Change-Number: 63792 Gerrit-PatchSet: 1 Gerrit-Owner: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-Comment-Date: Mon, 02 May 2022 19:27:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Prashant Malani <pmalani(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel: Return ACPI_S4 as previous sleep state
by Evan Green (Code Review) 02 May '22

02 May '22

Evan Green has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/64002 ) Change subject: soc/intel: Return ACPI_S4 as previous sleep state ...................................................................... soc/intel: Return ACPI_S4 as previous sleep state pmc_prev_sleep_state() isn't handling the case where acpi_sleep_from_pm1() returns ACPI_S4. Pass that value along so it can get set as a prev_sleep_state. BUG=b:230031158 TEST=Resume from S4 on Primus4es Signed-off-by: Evan Green <evgreen(a)chromium.org> Change-Id: I3fb3dc428a749db80293e51a04a2096514a7b689 --- M src/soc/intel/common/block/pmc/pmclib.c 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/64002/1 diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c index a2e3e9e..a733920 100644 --- a/src/soc/intel/common/block/pmc/pmclib.c +++ b/src/soc/intel/common/block/pmc/pmclib.c @@ -399,6 +399,9 @@ if (CONFIG(HAVE_ACPI_RESUME)) prev_sleep_state = ACPI_S3; break; + case ACPI_S4: + prev_sleep_state = ACPI_S4; + break; case ACPI_S5: prev_sleep_state = ACPI_S5; break; -- To view, visit https://review.coreboot.org/c/coreboot/+/64002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3fb3dc428a749db80293e51a04a2096514a7b689 Gerrit-Change-Number: 64002 Gerrit-PatchSet: 1 Gerrit-Owner: Evan Green <evgreen(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: arch/x86: Add support for catching null dereferences through debug regs
by Robert Zieba (Code Review) 02 May '22

02 May '22

Attention is currently required from: Robert Zieba, Raul Rangel, Nico Huber, Tim Wawrzynczak, Paul Menzel, Arthur Heymans, Kyösti Mälkki, Karthik Ramasubramanian. Hello build bot (Jenkins), Nico Huber, Raul Rangel, Angel Pons, Arthur Heymans, Tim Wawrzynczak, Kyösti Mälkki, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63657 to look at the new patch set (#11). Change subject: arch/x86: Add support for catching null dereferences through debug regs ...................................................................... arch/x86: Add support for catching null dereferences through debug regs This commit adds support for catching null dereferences and execution through x86's debug registers. This is particularly useful when running 32-bit coreboot as paging is not enabled to catch these through page faults. This commit adds three new configs to support this feature: DEBUG_HW_BREAKPOINTS, DEBUG_NULL_DEREF_BREAKPOINTS and DEBUG_NULL_DEREF_HALT. BUG=b:223902046 TEST=Ran on nipperkin device, verifying that HW breakpoints work as expected. Change-Id: I113590689046a13c2a552741bbfe7668a834354a Signed-off-by: Robert Zieba <robertzieba(a)google.com> --- M src/arch/x86/Kconfig M src/arch/x86/Makefile.inc A src/arch/x86/breakpoint.c M src/arch/x86/exception.c A src/arch/x86/include/arch/breakpoint.h A src/arch/x86/include/arch/null_breakpoint.h A src/arch/x86/null_breakpoint.c 7 files changed, 454 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/63657/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/63657 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I113590689046a13c2a552741bbfe7668a834354a Gerrit-Change-Number: 63657 Gerrit-PatchSet: 11 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit May 2022