coreboot-gerrit May 2022

coreboot-gerrit@coreboot.org

1 participants
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Change in coreboot[master]: util/scripts: Add script to show platforms, CPU, type, and date added
by Raul Rangel (Code Review) 02 May '22

02 May '22

Attention is currently required from: Felix Singer, Martin L Roth, Stefan Reinauer. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63799 ) Change subject: util/scripts: Add script to show platforms, CPU, type, and date added ...................................................................... Patch Set 1: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/63799/comment/86e52019_fdaad5a8 PS1, Line 12: Can you provide a sample of the output? File util/scripts/show_platforms.sh: https://review.coreboot.org/c/coreboot/+/63799/comment/bf6185ba_5960384c PS1, Line 13: ./Kconfig\ Can you use the `-mindepth` modifiers to have find perform the filtering? https://review.coreboot.org/c/coreboot/+/63799/comment/e4cafcd3_63a0fee0 PS1, Line 26: $ Should this be quoted? -- To view, visit https://review.coreboot.org/c/coreboot/+/63799 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f7265d95df31f3a74aa2aa164f6a094c1139750 Gerrit-Change-Number: 63799 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <martinroth(a)google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Martin L Roth <martinroth(a)google.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Mon, 02 May 2022 18:21:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Update maximum PCIe and TBT ports and clocks
by Tim Wawrzynczak (Code Review) 02 May '22

02 May '22

Attention is currently required from: Michał Żygowski, Subrata Banik, John Zhao. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63457 ) Change subject: soc/intel/alderlake: Update maximum PCIe and TBT ports and clocks ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63457 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I408c815d5a43c081beb3f84d795c2b863ce33eb2 Gerrit-Change-Number: 63457 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Comment-Date: Mon, 02 May 2022 18:14:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in libgfxinit[master]: README: Fix hyphenations in markdown
by Jack Rosenthal (Code Review) 02 May '22

02 May '22

Attention is currently required from: Jack Rosenthal. Hello Nico Huber, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/libgfxinit/+/63588 to look at the new patch set (#2). Change subject: README: Fix hyphenations in markdown ...................................................................... README: Fix hyphenations in markdown These hyphenations do not show properly once the Markdown is rendered in (for example) Gitiles. Change-Id: Ie44b3d4c14215be6cc50692f0063139066751cbf Signed-off-by: Jack Rosenthal <jrosenth(a)chromium.org> --- M README.md 1 file changed, 12 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/88/63588/2 -- To view, visit https://review.coreboot.org/c/libgfxinit/+/63588 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: Ie44b3d4c14215be6cc50692f0063139066751cbf Gerrit-Change-Number: 63588 Gerrit-PatchSet: 2 Gerrit-Owner: Jack Rosenthal <jrosenth(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jack Rosenthal <jrosenth(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: lib/spd_bin: Update names and definitions for LPDDR5
by Cliff Huang (Code Review) 02 May '22

02 May '22

Attention is currently required from: Bora Guvendik, Anil Kumar K, Jeremy Compostella, Subrata Banik, Jérémy Compostella, Selma Bensaid, Paul Menzel, Angel Pons, Bernardo Perez Priego. Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58101 ) Change subject: lib/spd_bin: Update names and definitions for LPDDR5 ...................................................................... Patch Set 12: (4 comments) File src/lib/spd_bin.c: https://review.coreboot.org/c/coreboot/+/58101/comment/862ffe7f_4bc5ea99 PS11, Line 38: case SPD_DRAM_DDR5: > Can you please move these back to lines 36, 37? line 36 and 37 are now in line 38, and 39. https://review.coreboot.org/c/coreboot/+/58101/comment/5c840e69_544e4da4 PS11, Line 119: : DDR3_ORGANIZATION; > indentation. Done https://review.coreboot.org/c/coreboot/+/58101/comment/4cb46eab_f157ca9f PS11, Line 130: : DDR3_ORGANIZATION; > indentation. Done https://review.coreboot.org/c/coreboot/+/58101/comment/9d3dd02d_dfb7de02 PS11, Line 141: : DDR3_BUS_DEV_WIDTH; > indentation. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/58101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I52ecf24a313d4cbdd0859c623533630c6a6c3713 Gerrit-Change-Number: 58101 Gerrit-PatchSet: 12 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-CC: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Comment-Date: Mon, 02 May 2022 18:09:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bora Guvendik <bora.guvendik(a)intel.com> Comment-In-Reply-To: Anil Kumar K <anil.kumar.k(a)intel.com> Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/cmn/blk/pmc: API to inform PMC about PCI enumeration done
by Subrata Banik (Code Review) 02 May '22

02 May '22

Attention is currently required from: Tim Wawrzynczak, Angel Pons, Arthur Heymans, Eric Lai, Lean Sheng Tan, Werner Zeh. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63953 ) Change subject: soc/intel/cmn/blk/pmc: API to inform PMC about PCI enumeration done ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/common/block/pmc/pmclib.c: https://review.coreboot.org/c/coreboot/+/63953/comment/ea8c9db1_bce257d6 PS2, Line 801: printk(BIOS_ERR, "PMC: Failed sending PCI Enumeration Done Command\n"); > As you have the response handy here, would it make sense to show the reason for this command being failed? Or is it just another magic bitfield with no proper decoding? Unfortunately, it's the latter one where the response bit field is not documented hence, had to relying on status instead parsing than actual response. -- To view, visit https://review.coreboot.org/c/coreboot/+/63953 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I77d428f9501feaccab8bb431090d10ce8d3af9b2 Gerrit-Change-Number: 63953 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Mon, 02 May 2022 18:09:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

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Change in coreboot[master]: lib/spd_bin: Update names and definitions for LPDDR5
by Cliff Huang (Code Review) 02 May '22

02 May '22

Attention is currently required from: Anil Kumar K, Cliff Huang, Subrata Banik, Jérémy Compostella, Selma Bensaid, Paul Menzel, Angel Pons, Bernardo Perez Priego. Hello Bora Guvendik, build bot (Jenkins), Anil Kumar K, Subrata Banik, Selma Bensaid, Tim Wawrzynczak, Angel Pons, Bernardo Perez Priego, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58101 to look at the new patch set (#12). Change subject: lib/spd_bin: Update names and definitions for LPDDR5 ...................................................................... lib/spd_bin: Update names and definitions for LPDDR5 This addresses the error message: Defaulting to using DDR4 params. Please add dram_type check for 19 to use_ddr4_params 1. Add LPDDR5 for the param 2. Fix SPD name for LPDDR5 Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: I52ecf24a313d4cbdd0859c623533630c6a6c3713 --- M src/lib/spd_bin.c 1 file changed, 11 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/58101/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/58101 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I52ecf24a313d4cbdd0859c623533630c6a6c3713 Gerrit-Change-Number: 58101 Gerrit-PatchSet: 12 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-CC: Jeremy Compostella <jeremy.compostella(a)intel.corp-partner.google.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: arch/x86/smbios.c: Add SMBIOS type 17 for empty DIMM slots
by Nico Huber (Code Review) 02 May '22

02 May '22

Attention is currently required from: Arthur Heymans, Patrick Rudolph, Paul Menzel, Jingle Hsu, Angel Pons, Nill Ge, Marc Jones, Subrata Banik, Johnny Lin, lichenchen.carl, Tim Chu, Shelly Chang. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63882 ) Change subject: arch/x86/smbios.c: Add SMBIOS type 17 for empty DIMM slots ...................................................................... Patch Set 8: (1 comment) Patchset: PS8: How about setting correct `meminfo->dimm_cnt` for the platforms that you want to report empty slots? Together with the new `->present` field that would be all the interface changes you need. No weak function and no Kconfig needed. -- To view, visit https://review.coreboot.org/c/coreboot/+/63882 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia3ff1353667f9d3bd302db42c739b7be9d3f4a32 Gerrit-Change-Number: 63882 Gerrit-PatchSet: 8 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: lichenchen.carl <lichenchen.carl(a)bytedance.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Patrick Rudolph Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: lichenchen.carl <lichenchen.carl(a)bytedance.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-Comment-Date: Mon, 02 May 2022 18:00:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: sc7280: Performance improvement by removing delays in cpucp init
by Shelley Chen (Code Review) 02 May '22

02 May '22

Attention is currently required from: Ravi Kumar Bokka. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63085 ) Change subject: sc7280: Performance improvement by removing delays in cpucp init ...................................................................... Patch Set 15: (1 comment) Patchset: PS15: Hey Ravi, 1. None of the comments are resolved, so it's hard to tell what you've addressed and what you haven't. 2. I don't think that you've addressed most of requests in the comments. Is this ready for review? -- To view, visit https://review.coreboot.org/c/coreboot/+/63085 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1a727514810a505cd1005ae7f52e5215e404b3bb Gerrit-Change-Number: 63085 Gerrit-PatchSet: 15 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Comment-Date: Mon, 02 May 2022 17:56:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86: Add support for catching null dereferences through debug regs
by Robert Zieba (Code Review) 02 May '22

02 May '22

Attention is currently required from: Robert Zieba, Raul Rangel, Nico Huber, Tim Wawrzynczak, Paul Menzel, Arthur Heymans, Kyösti Mälkki, Karthik Ramasubramanian. Hello build bot (Jenkins), Nico Huber, Raul Rangel, Angel Pons, Arthur Heymans, Tim Wawrzynczak, Kyösti Mälkki, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63657 to look at the new patch set (#8). Change subject: arch/x86: Add support for catching null dereferences through debug regs ...................................................................... arch/x86: Add support for catching null dereferences through debug regs This commit adds support for catching null dereferences and execution through x86's debug registers. This is particularly useful when running 32-bit coreboot as paging is not enabled to catch these through page faults. This commit adds three new configs to support this feature: DEBUG_HW_BREAKPOINTS, DEBUG_NULL_DEREF_BREAKPOINTS and DEBUG_NULL_DEREF_HALT. BUG=b:223902046 TEST=Ran on nipperkin device, verifying that HW breakpoints work as expected. Change-Id: I113590689046a13c2a552741bbfe7668a834354a Signed-off-by: Robert Zieba <robertzieba(a)google.com> --- M src/arch/x86/Kconfig M src/arch/x86/Makefile.inc A src/arch/x86/breakpoint.c M src/arch/x86/exception.c A src/arch/x86/include/arch/breakpoint.h A src/arch/x86/include/arch/null_breakpoint.h A src/arch/x86/null_breakpoint.c 7 files changed, 454 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/63657/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/63657 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I113590689046a13c2a552741bbfe7668a834354a Gerrit-Change-Number: 63657 Gerrit-PatchSet: 8 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: coreboot_tables: Add PCIe info to coreboot table
by Shelley Chen (Code Review) 02 May '22

02 May '22

Attention is currently required from: Ravi Kumar Bokka, Hung-Te Lin, Nico Huber, Tim Wawrzynczak, Paul Menzel, Rex-BC Chen, Julius Werner, Arthur Heymans, Yu-Ping Wu, Jianjun Wang. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63251 ) Change subject: coreboot_tables: Add PCIe info to coreboot table ...................................................................... Patch Set 20: (1 comment) Patchset: PS9: > From Qualcomm's reply, 1MB is max possible PCIe endpoints. […] Hi Yu-ping, Tim and I have a meeting scheduled with Qualcomm Tuesday to discuss this, so hopefully we can resolve this issue and unblock you guys. Sorry for the delay. I will post an update after the meeting. -- To view, visit https://review.coreboot.org/c/coreboot/+/63251 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6cdce21efc66aa441ec077e6fc1d5d1c6a9aafb0 Gerrit-Change-Number: 63251 Gerrit-PatchSet: 20 Gerrit-Owner: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Comment-Date: Mon, 02 May 2022 17:53:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-MessageType: comment

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coreboot-gerrit May 2022