coreboot-gerrit May 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/mtl: Do initial Meteor Lake SoC commit till bootblock
by Ravishankar Sarawadi (Code Review) 04 May '22

04 May '22

Attention is currently required from: Felix Singer, Jamie Ryu, Subrata Banik, Wonkyu Kim, Ethan Tsao, Tim Wawrzynczak, Paul Menzel, Angel Pons, Raj Astekar, Ravishankar Sarawadi. Ravishankar Sarawadi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62772 ) Change subject: soc/intel/mtl: Do initial Meteor Lake SoC commit till bootblock ...................................................................... Patch Set 13: (5 comments) File src/soc/intel/meteorlake/Kconfig: https://review.coreboot.org/c/coreboot/+/62772/comment/a1ba3746_f4819d23 PS13, Line 51: Platform FSP integration guide document > Is this available yet? Not yet, so keeping it same as ADL for now. File src/soc/intel/meteorlake/bootblock/soc_die.c: https://review.coreboot.org/c/coreboot/+/62772/comment/4f2b094a_8d79e346 PS13, Line 101: soc_die_early_iorange_init > does this need to be public? Ack File src/soc/intel/meteorlake/include/soc/iomap.h: https://review.coreboot.org/c/coreboot/+/62772/comment/2912c5b9_db606016 PS13, Line 63: : #define IOE_PCR_ABOVE_4G_BASE_ADDR 0x3fff0000000 : #define IOE_P2SB_BAR IOE_PCR_ABOVE_4G_BASE_ADDR : #define IOE_P2SB_SIZE (256 * MiB) : : #define IOM_BASE_ADDR 0x3fff0aa0000 : #define IOM_BASE_SIZE 0x1600 : #define IOM_BASE_ADDR_MAX 0x3fff0aa15ff > does coreboot need to access these MMIO ranges? Yes, for TCSS functionality based on IOE. File src/soc/intel/meteorlake/include/soc/pci_devs.h: https://review.coreboot.org/c/coreboot/+/62772/comment/fb0a2c81_adae1d6e PS13, Line 186: //#define PCH_DEV_SLOT_LPC PCI_DEV_SLOT_ESPI > not needed? Right, it's not needed. File src/soc/intel/meteorlake/include/soc/pcr_ids.h: https://review.coreboot.org/c/coreboot/+/62772/comment/8605f94b_61809e23 PS13, Line 5: /* > nit: missing a blank line before `/*` Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/62772 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I26479fcc3a3f9c6f8ebf5f198ab0809f0b4a2cc4 Gerrit-Change-Number: 62772 Gerrit-PatchSet: 13 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ethan Tsao <ethan.tsao(a)intel.corp-partner.google.com> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Thu, 05 May 2022 02:30:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86/smbios.c: Add SMBIOS type 17 for empty DIMM slots
by Johnny Lin (Code Review) 04 May '22

04 May '22

Johnny Lin has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/63882 ) Change subject: arch/x86/smbios.c: Add SMBIOS type 17 for empty DIMM slots ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/63882 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia3ff1353667f9d3bd302db42c739b7be9d3f4a32 Gerrit-Change-Number: 63882 Gerrit-PatchSet: 8 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: lichenchen.carl <lichenchen.carl(a)bytedance.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: include/memory_info.h: Increase DIMM_INFO_TOTAL to 32
by Johnny Lin (Code Review) 04 May '22

04 May '22

Attention is currently required from: Arthur Heymans, Marc Jones, Patrick Rudolph, Jonathan Zhang, Angel Pons, lichenchen.carl, Nill Ge, Tim Chu. Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64041 ) Change subject: include/memory_info.h: Increase DIMM_INFO_TOTAL to 32 ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > Where does `struct memory_info` get saved? I guess it's saved into CBMEM? If so, then space usage is […] Yes it's in CBMEM, updated to simply increase the value of the define. -- To view, visit https://review.coreboot.org/c/coreboot/+/64041 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If72a8622ac1e7e67646aa4dd24b99637fb8b1297 Gerrit-Change-Number: 64041 Gerrit-PatchSet: 3 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: lichenchen.carl <lichenchen.carl(a)bytedance.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: lichenchen.carl <lichenchen.carl(a)bytedance.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Thu, 05 May 2022 02:25:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jonathan Zhang <jonzhang(a)fb.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: include/memory_info.h: Increase DIMM_INFO_TOTAL to 32
by Johnny Lin (Code Review) 04 May '22

04 May '22

Attention is currently required from: Arthur Heymans, Marc Jones, Patrick Rudolph, Jonathan Zhang, Johnny Lin, lichenchen.carl, Nill Ge, Tim Chu. Hello Arthur Heymans, Marc Jones, Patrick Rudolph, Jonathan Zhang, Angel Pons, lichenchen.carl, Nill Ge, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/64041 to look at the new patch set (#3). Change subject: include/memory_info.h: Increase DIMM_INFO_TOTAL to 32 ...................................................................... include/memory_info.h: Increase DIMM_INFO_TOTAL to 32 For multiple sockets platform 16 may not be enough, so increase it to 32. Change-Id: If72a8622ac1e7e67646aa4dd24b99637fb8b1297 Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com> --- M src/include/memory_info.h 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/64041/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/64041 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If72a8622ac1e7e67646aa4dd24b99637fb8b1297 Gerrit-Change-Number: 64041 Gerrit-PatchSet: 3 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: lichenchen.carl <lichenchen.carl(a)bytedance.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: lichenchen.carl <lichenchen.carl(a)bytedance.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek/mt8186: Change the power-down time slot from 0xA to 0xF
by Yu-Ping Wu (Code Review) 04 May '22

04 May '22

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64038 ) Change subject: soc/mediatek/mt8186: Change the power-down time slot from 0xA to 0xF ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/64038/comment/47c69bdb_9d64b13d PS1, Line 9: We encountered a delay issue when powering down. The root cause is : the incorrect setting for delay time. : : The meaning of PMIC_CPSDSA4[4:0] is: power down at specified time slot. : If PMIC_CPSDSA4[4:0] is 0xA, in this time slot, it cause delay 20ms : comparing with 0xF. : : To resolve this issue, we need to change to correct time slot. : Therefore, we change the value from 0xA to 0xF. PMIC_CPSDSA4[4:0] controls the power-down at the specified time slot. Setting it to 0xA would cause an extra delay of 20ms compared to 0xF. To avoid the delay, change the value from 0xA to 0xF. -- To view, visit https://review.coreboot.org/c/coreboot/+/64038 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I537fe87740f0f8c25b923d7d536e81503b71762b Gerrit-Change-Number: 64038 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Thu, 05 May 2022 02:15:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: Change the power-down time slot from 0xA to 0xF
by Rex-BC Chen (Code Review) 04 May '22

04 May '22

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64038 ) Change subject: soc/mediatek/mt8186: Change the power-down time slot from 0xA to 0xF ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: gentle ping for this patch. -- To view, visit https://review.coreboot.org/c/coreboot/+/64038 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I537fe87740f0f8c25b923d7d536e81503b71762b Gerrit-Change-Number: 64038 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 05 May 2022 02:06:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brask/variants/moli: enable BT offload
by Casper Chang (Code Review) 04 May '22

04 May '22

Attention is currently required from: Tim Wawrzynczak. Casper Chang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64020 ) Change subject: mb/google/brask/variants/moli: enable BT offload ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/64020 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I72d91d2dafffa7d9604b7dd3d697cb3b2b04b152 Gerrit-Change-Number: 64020 Gerrit-PatchSet: 4 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Thu, 05 May 2022 01:21:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/mb/google: add support for nissa
by Reka Norman (Code Review) 04 May '22

04 May '22

Attention is currently required from: Kangheui Won, Paul Fagerburg, Shou-Chieh Hsu. Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64045 ) Change subject: util/mb/google: add support for nissa ...................................................................... Patch Set 1: Code-Review+1 (2 comments) Patchset: PS1: Looks good, but it would be good to test it. This should be covered by running new_variant_fulltest, right? File util/mainboard/google/nissa/template/memory/Makefile.inc: https://review.coreboot.org/c/coreboot/+/64045/comment/b39a0bfa_d34a91f9 PS1, Line 5: placeholder > Have you tested that we can build a new variant with this template? I think this will cause make to […] This should be fine, it's what we've been doing on other boards. See CB:57795. -- To view, visit https://review.coreboot.org/c/coreboot/+/64045 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I04f75ff91f9851b82641f703ba950b04c22e2e72 Gerrit-Change-Number: 64045 Gerrit-PatchSet: 1 Gerrit-Owner: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Thu, 05 May 2022 01:19:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/crota: Fix codec reset pin in overridetree
by Terry Chen (Code Review) 04 May '22

04 May '22

Terry Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64043 ) Change subject: mb/google/brya/var/crota: Fix codec reset pin in overridetree ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/64043/comment/54986da7_8151a5a5 PS1, Line 7: setting for codec reset pin in overridetree > `Fix codec reset pin in overridetree` Done -- To view, visit https://review.coreboot.org/c/coreboot/+/64043 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica3467fbc8639526bee071d56af854de5e07091e Gerrit-Change-Number: 64043 Gerrit-PatchSet: 2 Gerrit-Owner: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 05 May 2022 01:13:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/crota: Fix codec reset pin in overridetree
by Terry Chen (Code Review) 04 May '22

04 May '22

Attention is currently required from: Terry Chen. Hello build bot (Jenkins), Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/64043 to look at the new patch set (#2). Change subject: mb/google/brya/var/crota: Fix codec reset pin in overridetree ...................................................................... mb/google/brya/var/crota: Fix codec reset pin in overridetree Crota360 is using a Cirrus CS42L42 for its audio codec; it requires the reset pin to be deasserted in ramstage for proper power sequencing. BUG=b:230074351 BRANCH=none TEST=build coreboot without error Signed-off-by: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Change-Id: Ica3467fbc8639526bee071d56af854de5e07091e --- M src/mainboard/google/brya/variants/crota/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/64043/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/64043 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica3467fbc8639526bee071d56af854de5e07091e Gerrit-Change-Number: 64043 Gerrit-PatchSet: 2 Gerrit-Owner: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit May 2022