coreboot-gerrit May 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/skyrim/var/skyrim: Add VL822 USB hub
by Karthik Ramasubramanian (Code Review) 04 May '22

04 May '22

Attention is currently required from: Jon Murphy, Karthik Ramasubramanian. Hello build bot (Jenkins), Raul Rangel, Jon Murphy, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63586 to look at the new patch set (#5). Change subject: mb/google/skyrim/var/skyrim: Add VL822 USB hub ...................................................................... mb/google/skyrim/var/skyrim: Add VL822 USB hub In Skyrim, USB-A port and WWAN modules are connected to the SoC USB ports through an external hub. Update the USB configuration in the devicetree accordingly. Enable the ACPI driver for external USB hub. BUG=b:227761300 TEST=Build and boot to OS in Skyrim. Ensure that the hub and USB-A ports are enumerated correctly in the output of lusub command. Change-Id: Ibf6a3da8add7361fc50adcf7c62e46df234685dc Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/skyrim/Kconfig M src/mainboard/google/skyrim/variants/baseboard/devicetree.cb M src/mainboard/google/skyrim/variants/skyrim/overridetree.cb 3 files changed, 43 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/63586/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/63586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibf6a3da8add7361fc50adcf7c62e46df234685dc Gerrit-Change-Number: 63586 Gerrit-PatchSet: 5 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: provide a list of D-states to enter LPM
by Tim Wawrzynczak (Code Review) 04 May '22

04 May '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Angel Pons. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63969 ) Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM ...................................................................... Patch Set 20: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Gerrit-Change-Number: 63969 Gerrit-PatchSet: 20 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Wed, 04 May 2022 21:46:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/adl: Send EOP early in the boot sequence
by Tim Crawford (Code Review) 04 May '22

04 May '22

Attention is currently required from: Maulik V Vaghela. Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62272 ) Change subject: soc/intel/adl: Send EOP early in the boot sequence ...................................................................... Patch Set 11: (1 comment) Patchset: PS11: > IMO, this is expected when u already sent EOP command. Yes, per the CSME doc: > The firmware does not respond to SET ME DISABLE message after the End of Post With the config removed, sending the command succeeds (but checking the result fails). I didn't see the global reset occur, but CSME is disabled on next boot. -- To view, visit https://review.coreboot.org/c/coreboot/+/62272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9401d5e36ad43cdc0dfe947aabc82528d824df9b Gerrit-Change-Number: 62272 Gerrit-PatchSet: 11 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Comment-Date: Wed, 04 May 2022 21:43:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: provide a list of D-states to enter LPM
by Tarun Tuli (Code Review) 04 May '22

04 May '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Angel Pons. Tarun Tuli has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63969 ) Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM ...................................................................... Patch Set 20: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63969/comment/5f1a4566_6584a06c PS19, Line 14: > suggestion: give the Intel document # that this information came from Done -- To view, visit https://review.coreboot.org/c/coreboot/+/63969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Gerrit-Change-Number: 63969 Gerrit-PatchSet: 20 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Wed, 04 May 2022 21:37:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: provide a list of D-states to enter LPM
by Tarun Tuli (Code Review) 04 May '22

04 May '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Angel Pons. Hello Lance Zhao, build bot (Jenkins), Subrata Banik, Matt DeVillier, Tim Wawrzynczak, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63969 to look at the new patch set (#20). Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM ...................................................................... soc/intel/alderlake: provide a list of D-states to enter LPM Implement sub-function 1 (Get Device Constraints) of the Low Power S0 Idle Device-Specific Method (_DSM). This provides a way in which to describe various devices required D-states to enter LPM (S0ix). The information can be used to help in diagnostics and understanding of S0ix entry failure. Values were derived from Intel document 595644 (rev 0.45) and the ADL FSP sample ASL. This implementation adds support for ADL. Other SoC's could be ported to be included as well. If they aren't, they will default to the existing behavior of a single hardcoded device to ensure compatibility with Windows. TEST=Built and tested on brya by verifying SSDT contents Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Signed-off-by: Tarun Tuli <taruntuli(a)google.com> --- M src/include/acpi/acpi.h M src/soc/intel/alderlake/acpi.c M src/soc/intel/common/block/acpi/pep.c 3 files changed, 177 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/63969/20 -- To view, visit https://review.coreboot.org/c/coreboot/+/63969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Gerrit-Change-Number: 63969 Gerrit-PatchSet: 20 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/adl: Send EOP early in the boot sequence
by Subrata Banik (Code Review) 04 May '22

04 May '22

Attention is currently required from: Maulik V Vaghela. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62272 ) Change subject: soc/intel/adl: Send EOP early in the boot sequence ...................................................................... Patch Set 11: (2 comments) Patchset: PS11: > No, I mean this mechanism: CB:52800 oh i see this now. IMO, this is expected when u already sent EOP command. PS11: @Sridhar, can u please comment ? -- To view, visit https://review.coreboot.org/c/coreboot/+/62272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9401d5e36ad43cdc0dfe947aabc82528d824df9b Gerrit-Change-Number: 62272 Gerrit-PatchSet: 11 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Comment-Date: Wed, 04 May 2022 21:27:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: sc7280: Add PCIe host controller driver
by Tim Wawrzynczak (Code Review) 04 May '22

04 May '22

Attention is currently required from: Ravi Kumar Bokka, Nico Huber, Furquan Shaikh, Paul Menzel, Julius Werner, Prasad Malisetty, mturney mturney. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53902 ) Change subject: sc7280: Add PCIe host controller driver ...................................................................... Patch Set 89: (5 comments) File src/soc/qualcomm/sc7280/include/soc/addressmap.h: https://review.coreboot.org/c/coreboot/+/53902/comment/790b635c_d471bd20 PS89, Line 78: 0x100000 I thought that it turned out this was actually 4K? File src/soc/qualcomm/sc7280/pcie_host.c: https://review.coreboot.org/c/coreboot/+/53902/comment/1039815a_fbfd05de PS89, Line 34: db dbi https://review.coreboot.org/c/coreboot/+/53902/comment/1029a818_5c625999 PS89, Line 55: gpio_t perst; what if there is more than one endpoint downstream of the RC? would they still always use the same PERST# GPIO? https://review.coreboot.org/c/coreboot/+/53902/comment/f62ac335_79017604 PS89, Line 110: static const struct qcom_qmp_phy_init_tbl sc7280_qmp_pcie_serdes_tbl[] = { Are all of these static SERDES and PCIe RX/TX tables chipset specific, or possily board specific? https://review.coreboot.org/c/coreboot/+/53902/comment/7794a962_57393036 PS89, Line 424: mdelay(100); : gpio_set(perst, 1); : mdelay(50); same here, I think it's up to the mainboard specific code to ensure these delays are met. -- To view, visit https://review.coreboot.org/c/coreboot/+/53902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccf60aa56541f5230fa9c3f821d7709615c36631 Gerrit-Change-Number: 53902 Gerrit-PatchSet: 89 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Comment-Date: Wed, 04 May 2022 21:26:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/adl: Send EOP early in the boot sequence
by Angel Pons (Code Review) 04 May '22

04 May '22

Attention is currently required from: Maulik V Vaghela. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62272 ) Change subject: soc/intel/adl: Send EOP early in the boot sequence ...................................................................... Patch Set 11: (1 comment) Patchset: PS11: > > This seems to cause issues with the ME disable logic, as EOP is now sent before `me_disable` is ch […] No, I mean this mechanism: CB:52800 -- To view, visit https://review.coreboot.org/c/coreboot/+/62272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9401d5e36ad43cdc0dfe947aabc82528d824df9b Gerrit-Change-Number: 62272 Gerrit-PatchSet: 11 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Comment-Date: Wed, 04 May 2022 21:20:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/fast_spi: Use `need_restore_mtrr()` to clear temp MTRR
by Arthur Heymans (Code Review) 04 May '22

04 May '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Nick Vaccaro, Eric Lai, Werner Zeh. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63492 ) Change subject: soc/intel/fast_spi: Use `need_restore_mtrr()` to clear temp MTRR ...................................................................... Patch Set 2: (1 comment) File src/cpu/x86/mtrr/mtrrlib.c: https://review.coreboot.org/c/coreboot/+/63492/comment/24c2f280_f078272e PS1, Line 52: /* Need to restore mtrr later using remove_temp_solution. */ : if (ENV_RAMSTAGE) : need_restore_mtrr(); > > Is this still an open? Or can this be merged? > > Yes, may be waiting for Arthur to share a feedback. I provided some feedback on the wait for idle AP implementation. -- To view, visit https://review.coreboot.org/c/coreboot/+/63492 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I67fd36080b318ace53f3e34da53d747f9a3aa400 Gerrit-Change-Number: 63492 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Wed, 04 May 2022 21:17:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: provide a list of D-states to enter LPM
by Tim Wawrzynczak (Code Review) 04 May '22

04 May '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Angel Pons. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63969 ) Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM ...................................................................... Patch Set 19: Code-Review+2 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/63969/comment/75359ff7_a2693f3a PS19, Line 14: suggestion: give the Intel document # that this information came from File src/soc/intel/alderlake/acpi.c: https://review.coreboot.org/c/coreboot/+/63969/comment/df6e9689_26760a6d PS19, Line 312: \ nit: not required -- To view, visit https://review.coreboot.org/c/coreboot/+/63969 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe46a0583c522a8adf0a015cd3a698f694482437 Gerrit-Change-Number: 63969 Gerrit-PatchSet: 19 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Wed, 04 May 2022 21:17:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit May 2022