coreboot-gerrit February 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/brya: Lock TPM IRQ pin in brask and brya baseboards
by Subrata Banik (Code Review) 03 Feb '22

03 Feb '22

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61500 ) Change subject: mb/google/brya: Lock TPM IRQ pin in brask and brya baseboards ...................................................................... Patch Set 6: (1 comment) File src/mainboard/google/brya/variants/baseboard/brask/gpio.c: https://review.coreboot.org/c/coreboot/+/61500/comment/ea91eb4e_9f3b2040 PS6, Line 371: PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), > Is the thinking here that there's no need to set these as LOCK_CONFIG in the early table given they won't get locked until closer to the end of coreboot anyway, so the definitions in the main table will surfice? Yes, in our gpio_lock_pad() function have anyway discarded the lock_config request coming from early boot stages till ramstage. Hence, adding LOCK_CONFIG here as `early_gpio_table` might not be useful. -- To view, visit https://review.coreboot.org/c/coreboot/+/61500 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icfc251152278c59f9a94b84fcd8c6d36c26bff62 Gerrit-Change-Number: 61500 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 03 Feb 2022 03:27:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: qualcomm/sc7280: Add display external clock support in coreboot
by Sudheer Amrabadi (Code Review) 03 Feb '22

03 Feb '22

Attention is currently required from: Ravi kumar, mturney mturney. Sudheer Amrabadi has uploaded a new patch set (#12) to the change originally created by Ravi kumar. ( https://review.coreboot.org/c/coreboot/+/59611 ) Change subject: qualcomm/sc7280: Add display external clock support in coreboot ...................................................................... qualcomm/sc7280: Add display external clock support in coreboot Add support for EDP (Embedded DisplayPort) clocks in coreboot. This change supports the configuration and enablement of EDP PIXEL, LINK, LINK_INTF and AUX clocks. BUG=b:182963902,b:216687885 TEST=Validated on qualcomm sc7280 development board. Signed-off-by: Taniya Das <quic_tdas(a)quicinc.com> Change-Id: Ia6872ede515401e95ea2dadc9766e3e70fb66144 --- M src/soc/qualcomm/sc7280/clock.c M src/soc/qualcomm/sc7280/include/soc/clock.h 2 files changed, 53 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/59611/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/59611 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia6872ede515401e95ea2dadc9766e3e70fb66144 Gerrit-Change-Number: 59611 Gerrit-PatchSet: 12 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Taniya Das <quic_tdas(a)quicinc.com> Gerrit-CC: Taniya Das <tdas(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/nissa: Add devicetree
by Reka Norman (Code Review) 03 Feb '22

03 Feb '22

Attention is currently required from: Kangheui Won, Tim Wawrzynczak, Krishna P Bhat D. Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61141 ) Change subject: mb/google/nissa: Add devicetree ...................................................................... Patch Set 5: (2 comments) File src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb: https://review.coreboot.org/c/coreboot/+/61141/comment/31ed50be_043ab042 PS5, Line 120: i2c0 Can we add the tpm driver here? I think the only reason brya has it in the variants is that some variants use I2C1 and some I2C3. But on nissa they should all use I2C0 (for now at least). https://review.coreboot.org/c/coreboot/+/61141/comment/3783b876_59960db7 PS5, Line 123: pcie_rp7 Are we supporting RTD3 on the SD card, and if so should we add the RTD3 driver here? On brya, the SD card RP is enabled in the baseboard, but the RTD3 driver is added individually in each variant. I'm not sure if there's a reason not to do both in the baseboard. -- To view, visit https://review.coreboot.org/c/coreboot/+/61141 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6cd332fd05fde19078ebc4bd2797580abfb76f3b Gerrit-Change-Number: 61141 Gerrit-PatchSet: 5 Gerrit-Owner: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-CC: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Comment-Date: Thu, 03 Feb 2022 02:31:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/nissa: Add devicetree
by Reka Norman (Code Review) 03 Feb '22

03 Feb '22

Attention is currently required from: Kangheui Won, Tim Wawrzynczak, Krishna P Bhat D. Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61141 ) Change subject: mb/google/nissa: Add devicetree ...................................................................... Patch Set 5: (1 comment) File src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb: https://review.coreboot.org/c/coreboot/+/61141/comment/3746c096_f424064b PS5, Line 28: Port 7 (index 6) is actually used for WFC on nereid. I'm not sure if it's better to enable it here and disable it on nivviks, or just enable it in nereid. -- To view, visit https://review.coreboot.org/c/coreboot/+/61141 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6cd332fd05fde19078ebc4bd2797580abfb76f3b Gerrit-Change-Number: 61141 Gerrit-PatchSet: 5 Gerrit-Owner: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-CC: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Comment-Date: Thu, 03 Feb 2022 02:09:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: console: Add loglevel prefix to interactive consoles
by Julius Werner (Code Review) 03 Feb '22

03 Feb '22

Attention is currently required from: Raul Rangel, Nico Huber, Patrick Georgi, Kyösti Mälkki. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61306 ) Change subject: console: Add loglevel prefix to interactive consoles ...................................................................... Patch Set 4: (1 comment) File src/console/console.c: https://review.coreboot.org/c/coreboot/+/61306/comment/8a1dd85b_7d489f38 PS3, Line 27: line_start > You would need to expose `prefix_tx_byte`, or probably better renamed to `interactive_console_tx_byt […] Hmmm... yeah, actually, on second thought I see your point, that does work out pretty nicely! And I didn't actually notice before that my previous implementation didn't work with the CONSOLE_LOG_FAST thing at all, which I fixed now too. I even managed to avoid the global variable entirely, PTAL. -- To view, visit https://review.coreboot.org/c/coreboot/+/61306 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic83413475400821f8097ef1819a293ee8926bb0b Gerrit-Change-Number: 61306 Gerrit-PatchSet: 4 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Thu, 03 Feb 2022 02:03:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: console: Pass log_state to vtxprintf()
by Julius Werner (Code Review) 03 Feb '22

03 Feb '22

Attention is currently required from: Raul Rangel. Hello Raul Rangel, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/61580 to review the following change. Change subject: console: Pass log_state to vtxprintf() ...................................................................... console: Pass log_state to vtxprintf() This patch makes a slight change in the way CONSOLE_LOG_FAST and CONSOLE_LOG_ALL are differentiated, by no longer passing a different tx_byte() function pointer and instead using the `data` argument to vtxprintf() to encode the difference. It also passes the message log level through to the tx_byte() function this way, which will be needed in the next patch. Change-Id: I0bba134cd3e70c2032689abac83ff53d7cdf2d7f Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- M src/console/printk.c 1 file changed, 19 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/61580/1 diff --git a/src/console/printk.c b/src/console/printk.c index 1ed39cb..ef3d29f 100644 --- a/src/console/printk.c +++ b/src/console/printk.c @@ -59,37 +59,43 @@ console_time_stop(); } +union log_state { + void *as_ptr; + struct { + uint8_t level; + uint8_t speed; + }; +}; + static void wrap_putchar(unsigned char byte, void *data) { - console_tx_byte(byte); -} + union log_state state = { .as_ptr = data }; -static void wrap_putchar_cbmemc(unsigned char byte, void *data) -{ - __cbmemc_tx_byte(byte); + if (state.speed == CONSOLE_LOG_FAST) + __cbmemc_tx_byte(byte); + else + console_tx_byte(byte); } int vprintk(int msg_level, const char *fmt, va_list args) { - int i, log_this; + union log_state state = { .level = msg_level }; + int i; if (CONFIG(SQUELCH_EARLY_SMP) && ENV_ROMSTAGE_OR_BEFORE && !boot_cpu()) return 0; - log_this = console_log_level(msg_level); - if (log_this < CONSOLE_LOG_FAST) + state.speed = console_log_level(msg_level); + if (state.speed < CONSOLE_LOG_FAST) return 0; spin_lock(&console_lock); console_time_run(); - if (log_this == CONSOLE_LOG_FAST) { - i = vtxprintf(wrap_putchar_cbmemc, fmt, args, NULL); - } else { - i = vtxprintf(wrap_putchar, fmt, args, NULL); + i = vtxprintf(wrap_putchar, fmt, args, state.as_ptr); + if (state.speed != CONSOLE_LOG_FAST) console_tx_flush(); - } console_time_stop(); -- To view, visit https://review.coreboot.org/c/coreboot/+/61580 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0bba134cd3e70c2032689abac83ff53d7cdf2d7f Gerrit-Change-Number: 61580 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: console: Add loglevel marker codes to stored consoles
by Julius Werner (Code Review) 03 Feb '22

03 Feb '22

Attention is currently required from: Nico Huber, Patrick Georgi, Julius Werner, Kyösti Mälkki. Hello build bot (Jenkins), Raul Rangel, Nico Huber, Patrick Georgi, Kyösti Mälkki, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61308 to look at the new patch set (#6). Change subject: console: Add loglevel marker codes to stored consoles ...................................................................... console: Add loglevel marker codes to stored consoles In order to provide the same loglevel prefixes and highlighting that were recently introduced for "interactive" consoles (e.g. UART) to "stored" consoles (e.g. CBMEM) but minimize the amont of extra storage space wasted on this info, this patch will write a 1-byte control character marker indicating the loglevel to the start of every line logged in those consoles. The `cbmem` utility will then interpret those markers and translate them back into loglevel prefixes and escape sequences as needed. Since coreboot and userspace log readers aren't always in sync, occasionally an older reader may come across these markers and not know how to interpret them... but that should usually be fine, as the range chosen contains non-printable ASCII characters that normally have no effect on the terminal. At worst the outdated reader would display one garbled character at the start of every line which isn't that bad. (Older versions of the `cbmem` utility will translate non-printable characters into `?` question marks.) Signed-off-by: Julius Werner <jwerner(a)chromium.org> Change-Id: I86073f48aaf1e0a58e97676fb80e2475ec418ffc --- M src/commonlib/include/commonlib/loglevel.h M src/console/printk.c M util/cbmem/cbmem.c 3 files changed, 43 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/61308/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/61308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I86073f48aaf1e0a58e97676fb80e2475ec418ffc Gerrit-Change-Number: 61308 Gerrit-PatchSet: 6 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: console: Add ANSI escape sequences for highlighting
by Julius Werner (Code Review) 03 Feb '22

03 Feb '22

Attention is currently required from: Raul Rangel, Nico Huber, Patrick Georgi, Kyösti Mälkki. Hello build bot (Jenkins), Raul Rangel, Nico Huber, Patrick Georgi, Kyösti Mälkki, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61307 to look at the new patch set (#5). Change subject: console: Add ANSI escape sequences for highlighting ...................................................................... console: Add ANSI escape sequences for highlighting This patch adds ANSI escape sequences to highlight a log line based on its loglevel to the output of "interactive" consoles that are meant to be displayed on a terminal (e.g. UART). This should help make errors and warnings stand out better among the usual spew of debug messages. For users whose terminal or use case doesn't support these sequences for some reason (or who simply don't like them), they can be disabled with a Kconfig. While ANSI escape sequences can be used to add color, minicom (the presumably most common terminal emulator for UART endpoints?) doesn't support color output unless explicitly enabled (via -c command line flag), and other terminal emulators may have similar restrictions, so in an effort to make this as widely useful by default as possible I have chosen not to use color codes and implement this highlighting via bolding, underlining and inverting alone (which seem to go through in all cases). If desired, support for separate color highlighting could be added via Kconfig later. Signed-off-by: Julius Werner <jwerner(a)chromium.org> Change-Id: I868f4026918bc0e967c32e14bcf3ac05816415e8 --- M src/commonlib/include/commonlib/loglevel.h M src/console/Kconfig M src/console/printk.c 3 files changed, 53 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/61307/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/61307 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I868f4026918bc0e967c32e14bcf3ac05816415e8 Gerrit-Change-Number: 61307 Gerrit-PatchSet: 5 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: console: Add loglevel prefix to interactive consoles
by Julius Werner (Code Review) 03 Feb '22

03 Feb '22

Attention is currently required from: Nico Huber, Patrick Georgi, Julius Werner, Kyösti Mälkki. Hello build bot (Jenkins), Raul Rangel, Nico Huber, Patrick Georgi, Kyösti Mälkki, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61306 to look at the new patch set (#5). Change subject: console: Add loglevel prefix to interactive consoles ...................................................................... console: Add loglevel prefix to interactive consoles In an attempt to make loglevels more visible (and therefore useful, hopefully), this patch adds a prefix indicating the log level to every line sent to an "interactive" console (such as a UART). If the code contains a `printk(BIOS_DEBUG, "This is a debug message!\n"), it will now show up as [DEBUG] This is a debug message! on the UART output. "Stored" consoles (such as in CBMEM) will get a similar but more space-efficient feature in a later CL. Signed-off-by: Julius Werner <jwerner(a)chromium.org> Change-Id: Ic83413475400821f8097ef1819a293ee8926bb0b --- M src/commonlib/include/commonlib/loglevel.h M src/console/console.c M src/console/printk.c M src/include/console/streams.h 4 files changed, 70 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/61306/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/61306 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic83413475400821f8097ef1819a293ee8926bb0b Gerrit-Change-Number: 61306 Gerrit-PatchSet: 5 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/cezanne: Turn off gpp clock request for disabled devices
by Robert Zieba (Code Review) 03 Feb '22

03 Feb '22

Attention is currently required from: Robert Zieba, Jason Glenesk, Raul Rangel, Marshall Dawson, Rob Barnes. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Rob Barnes, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61259 to look at the new patch set (#10). Change subject: soc/amd/cezanne: Turn off gpp clock request for disabled devices ...................................................................... soc/amd/cezanne: Turn off gpp clock request for disabled devices The current behavior does not actually check if a device is present before enabling the corresponding gpp_clkx_clock_request_mapping bits which may cause issues with L1SS. This change sets the corresponding gpp_clkx_clock_request_mapping to off if the corresponding device is disabled. BUG=b:202252869 TEST=Checked that value of GPP_CLK_CNTRL matched the expected value when devices are enabled/disabled FIXED=b:202252869 Signed-off-by: Robert Zieba <robertzieba(a)google.com> Change-Id: I77389372c60bdec572622a3b49484d4789fd4e4c --- M src/mainboard/google/guybrush/Makefile.inc M src/soc/amd/cezanne/chip.h M src/soc/amd/cezanne/fch.c 3 files changed, 82 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/61259/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/61259 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I77389372c60bdec572622a3b49484d4789fd4e4c Gerrit-Change-Number: 61259 Gerrit-PatchSet: 10 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Peers <epeers(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit February 2022