coreboot-gerrit February 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Add optional _OFF and _ON skip control
by Tim Wawrzynczak (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Bora Guvendik, Anil Kumar K, Cliff Huang, Subrata Banik, Paul Menzel, Thejaswani Putta, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61353 ) Change subject: soc/intel/common/block/pcie/rtd3: Add optional _OFF and _ON skip control ...................................................................... Patch Set 7: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/61353/comment/3014e977_8bd0aa2a PS7, Line 69: metheds `methods` -- To view, visit https://review.coreboot.org/c/coreboot/+/61353 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic32d151d65107bfc220258c383a575e40a496b6f Gerrit-Change-Number: 61353 Gerrit-PatchSet: 7 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 04 Feb 2022 22:09:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Add PM methods to the device.
by Tim Wawrzynczak (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Bora Guvendik, Lance Zhao, Anil Kumar K, Cliff Huang, Subrata Banik, Paul Menzel, Thejaswani Putta, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61352 ) Change subject: soc/intel/common/block/pcie/rtd3: Add PM methods to the device. ...................................................................... Patch Set 6: Code-Review+2 (6 comments) File src/soc/intel/common/block/pcie/rtd3/chip.h: https://review.coreboot.org/c/coreboot/+/61352/comment/44053cac_fadcb7b5 PS5, Line 9: ACPI_PCIE_RP_EMIT_NONE = 0x00, /* None */ : ACPI_PCIE_RP_EMIT_L23 = 0x01, /* L23 */ : ACPI_PCIE_RP_EMIT_PSD0 = 0x02, /* PSD0 */ : ACPI_PCIE_RP_EMIT_SRCK = 0x04, /* SRCK */ : ACPI_PCIE_RP_EMIT_L23_PSD0 = 0x03, /* L23, PSD0 */ : ACPI_PCIE_RP_EMIT_L23_SRCK = 0x05, /* L23, SRCK */ : ACPI_PCIE_RP_EMIT_PSD0_SRCK = 0x06, /* PSD0, SRCK */ : ACPI_PCIE_RP_EMIT_ALL = 0x07 /* L23, PSD0, SRCK */ : }; > Currently, each bit is corresponding method (i.e. […] You know what, I was thinking too far ahead, I was thinking of refactoring this too, so that the internal driver could reuse the L23D/DL23, etc. methods so that there is not so much duplication in the emitted AML. But this will work for now. File src/soc/intel/common/block/pcie/rtd3/rtd3.c: https://review.coreboot.org/c/coreboot/+/61352/comment/e845a443_3a0e2201 PS5, Line 336: || pcie_rp > CONFIG_MAX_ROOT_PORTS > I think so, will fix this. Good catch. Done File src/soc/intel/common/block/pcie/rtd3/rtd3.c: https://review.coreboot.org/c/coreboot/+/61352/comment/880d817d_1a55b781 PS6, Line 104: static void : pcie_rtd3_acpi_method_dl23(void) nit: fits on one line https://review.coreboot.org/c/coreboot/+/61352/comment/329aaa2a_4061f115 PS6, Line 113: static void : pcie_rtd3_acpi_method_l23d(void) nit: fits on one line https://review.coreboot.org/c/coreboot/+/61352/comment/19f63060_461fa1fe PS6, Line 122: static void : pcie_rtd3_acpi_method_pds0(unsigned int pcie_rp) nit: fits on one line https://review.coreboot.org/c/coreboot/+/61352/comment/928ac9f1_38024b14 PS6, Line 131: static void : pcie_rtd3_acpi_method_srck(unsigned int pcie_rp, : const struct soc_intel_common_block_pcie_rtd3_config *config) nit: ``` static void pcie_rtd3_acpi_method_srck(unsigned int pcie_rp, const struct soc_intel_common_block_pcie_rtd3_config *config) ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/61352 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79de76f26c8424b036cb7d2719df68937599ca2f Gerrit-Change-Number: 61352 Gerrit-PatchSet: 6 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lance Zhao Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Lance Zhao Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 04 Feb 2022 22:06:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Bora Guvendik <bora.guvendik(a)intel.com> Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Add custom PLD fields to device tree for brya0 and br...
by Nick Vaccaro (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Subrata Banik, Won Chung, Benson Leung, EricR Lai, Prashant Malani. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61388 ) Change subject: mb/google/brya: Add custom PLD fields to device tree for brya0 and brya4es ...................................................................... Patch Set 11: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61388 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea975a4f436a204d4edd19fad0f5652fb44c6301 Gerrit-Change-Number: 61388 Gerrit-PatchSet: 11 Gerrit-Owner: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: Benson Leung <bleung(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Won Chung <wonchung(a)google.com> Gerrit-Attention: Benson Leung <bleung(a)chromium.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-Comment-Date: Fri, 04 Feb 2022 22:04:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/i2c/cs35l53: Add driver for generating device in SSDT
by Tim Wawrzynczak (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Patrick Georgi, Furquan Shaikh, Vitaly Rodionov, Marco Chen, Karthik Ramasubramanian. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61448 ) Change subject: drivers/i2c/cs35l53: Add driver for generating device in SSDT ...................................................................... Patch Set 2: Code-Review+1 (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/61448/comment/47ffb3f8_8212b9b8 PS2, Line 9: This driver uses the ACPI Device Property interface to generate Mention the full chip vendor and name here? Patchset: PS2: Thanks you Vitaly, this is a very well-documented driver! Just a few minor nits File src/drivers/i2c/cs35l53/cs35l53.c: https://review.coreboot.org/c/coreboot/+/61448/comment/0c4c93c4_6cf1a0a7 PS2, Line 56: AAD `Add` ? https://review.coreboot.org/c/coreboot/+/61448/comment/3e37256f_82cc95d3 PS2, Line 105: 5 nit: `ACPI_NAME_BUFFER_SIZE` -- To view, visit https://review.coreboot.org/c/coreboot/+/61448 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2cbb1cef89f8d56ee73fab06c68933a2ab8c3606 Gerrit-Change-Number: 61448 Gerrit-PatchSet: 2 Gerrit-Owner: Vitaly Rodionov <vitaly.rodionov(a)cirrus.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marco Chen <marcochen(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-CC: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Vitaly Rodionov <vitaly.rodionov(a)cirrus.corp-partner.google.com> Gerrit-Attention: Marco Chen <marcochen(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 04 Feb 2022 22:03:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Add crashlog records to BERT
by Nick Vaccaro (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Francois Toguo Fotso, Furquan Shaikh, Tim Wawrzynczak, Kane Chen, Patrick Rudolph, Karthik Ramasubramanian. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57686 ) Change subject: soc/intel/common: Add crashlog records to BERT ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/57686 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I646053e00fbe4649d5fdcc7ae91dfa8477a5ae65 Gerrit-Change-Number: 57686 Gerrit-PatchSet: 4 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 04 Feb 2022 22:00:45 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: spd/lp5: Generate initial SPDs for Sabrina SoC
by Nick Vaccaro (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Reka Norman, Tim Wawrzynczak, Karthik Ramasubramanian. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61543 ) Change subject: spd/lp5: Generate initial SPDs for Sabrina SoC ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61543 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibb43f26b36460290341c5ffcad1ef5a2ff1647c8 Gerrit-Change-Number: 61543 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 04 Feb 2022 22:00:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/spd_tools/spd_gen: Add support for Sabrina SoC
by Nick Vaccaro (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Tim Wawrzynczak, Karthik Ramasubramanian. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61542 ) Change subject: util/spd_tools/spd_gen: Add support for Sabrina SoC ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61542 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2a2c0d0e8c8cbebf3937a99df8f170ae8afc75df Gerrit-Change-Number: 61542 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 04 Feb 2022 21:57:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Add custom PLD fields to device tree for brya0 and br...
by Tim Wawrzynczak (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Subrata Banik, Won Chung, Nick Vaccaro, Benson Leung, EricR Lai, Prashant Malani. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61388 ) Change subject: mb/google/brya: Add custom PLD fields to device tree for brya0 and brya4es ...................................................................... Patch Set 11: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61388 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea975a4f436a204d4edd19fad0f5652fb44c6301 Gerrit-Change-Number: 61388 Gerrit-PatchSet: 11 Gerrit-Owner: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: Benson Leung <bleung(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Won Chung <wonchung(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Benson Leung <bleung(a)chromium.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-Comment-Date: Fri, 04 Feb 2022 21:56:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/nivviks: Initialise overridetree
by Tim Wawrzynczak (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Kangheui Won, Reka Norman, Rizwan Qureshi, Krishna P Bhat D, Usha P. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61605 ) Change subject: mb/google/brya/var/nivviks: Initialise overridetree ...................................................................... Patch Set 3: (1 comment) File src/mainboard/google/brya/variants/nivviks/overridetree.cb: https://review.coreboot.org/c/coreboot/+/61605/comment/d7885a41_4925d10d PS1, Line 10: SaGv_Enabled > Not sure if this should be disabled for initial bringup. Probably, but good to double check. Rizwan, has SaGV been verified as stable with current FSP on ADL-N yet? -- To view, visit https://review.coreboot.org/c/coreboot/+/61605 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id3ecd184415a20a3a52da8bb5e60fe2ce0495b44 Gerrit-Change-Number: 61605 Gerrit-PatchSet: 3 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Comment-Date: Fri, 04 Feb 2022 21:55:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Reka Norman <rekanorman(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Re-use Alder Lake-M device IDs for Alder Lake-N
by Tim Wawrzynczak (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Bora Guvendik, Selma Bensaid, Rizwan Qureshi, Krishna P Bhat D, Usha P, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61162 ) Change subject: soc/intel/common: Re-use Alder Lake-M device IDs for Alder Lake-N ...................................................................... Patch Set 3: (1 comment) File src/include/device/pci_ids.h: https://review.coreboot.org/c/coreboot/+/61162/comment/00540461_8376891e PS3, Line 3400: #define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP1 0x54b8 : #define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP2 0x54b9 : #define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP3 0x54ba : #define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP4 0x54bb : #define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP5 0x54bc : #define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP6 0x54bd : #define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP7 0x54be : #define PCI_DEVICE_ID_INTEL_ADP_M_PCIE_RP8 0x54bf : #define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP9 0x54b0 : #define PCI_DEVICE_ID_INTEL_ADP_M_N_PCIE_RP10 0x54b1 Hm, for ADL-N, though, wouldn't these be called RP1 - RP7 ? instead of 1, 2, 3, 4, 7, 9, 10? -- To view, visit https://review.coreboot.org/c/coreboot/+/61162 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6042017c6189cbc3ca9dce0e50acfb68ea4003f1 Gerrit-Change-Number: 61162 Gerrit-PatchSet: 3 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 04 Feb 2022 21:54:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit February 2022