coreboot-gerrit February 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: util/ifdtool: add PLATFORM_IFD2 to reduce common ifd tool change
by Wonkyu Kim (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Subrata Banik, Ethan Tsao, Ravishankar Sarawadi, Stefan Reinauer, Tim Wawrzynczak. Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61576 ) Change subject: util/ifdtool: add PLATFORM_IFD2 to reduce common ifd tool change ...................................................................... Patch Set 2: (1 comment) File util/ifdtool/ifdtool.c: https://review.coreboot.org/c/coreboot/+/61576/comment/f8d28d32_983dcc00 PS1, Line 227: PLATFORM_V1 > > IFD2 platform already have use many plaforms which is not same as TGL,ADL. […] Got it. If we can differentiate IFDv2 and IFDv3 for later, I also think PLATFORM_IFD should be ok. -- To view, visit https://review.coreboot.org/c/coreboot/+/61576 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14a71a58c7d51b9c8b92e013b5637c6b35005f22 Gerrit-Change-Number: 61576 Gerrit-PatchSet: 2 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 04 Feb 2022 22:30:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: util/ifdtool: add PLATFORM_IFD2 to reduce common ifd tool change
by Wonkyu Kim (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Wonkyu Kim, Ethan Tsao, Ravishankar Sarawadi, Tim Wawrzynczak. Hello build bot (Jenkins), Ethan Tsao, Subrata Banik, Ravishankar Sarawadi, Tim Wawrzynczak, Edward O'Callaghan, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61576 to look at the new patch set (#2). Change subject: util/ifdtool: add PLATFORM_IFD2 to reduce common ifd tool change ...................................................................... util/ifdtool: add PLATFORM_IFD2 to reduce common ifd tool change TGL, ADL have same ifd tool and future platforms may also use same tool. As TGL, ADL use own names for enabling ifd tool, we need to update ifd tool code for new platforms even if ifd tool is not changed. For avoid unnessary change, use generic platform name(PLATFORM_IFD2) for support future platforms without tool changes. Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com> Change-Id: I14a71a58c7d51b9c8b92e013b5637c6b35005f22 --- M util/ifdtool/ifdtool.c M util/ifdtool/ifdtool.h 2 files changed, 7 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/61576/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61576 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14a71a58c7d51b9c8b92e013b5637c6b35005f22 Gerrit-Change-Number: 61576 Gerrit-PatchSet: 2 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/basecode/eop: coreboot driver perform EOP operations
by Tim Wawrzynczak (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Arthur Heymans, Felix Singer, Subrata Banik, Angel Pons, Lean Sheng Tan, Werner Zeh, Patrick Rudolph, EricR Lai. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60405 ) Change subject: soc/intel/common/basecode/eop: coreboot driver perform EOP operations ...................................................................... Patch Set 23: (1 comment) File src/soc/intel/common/basecode/eop/eop.c: https://review.coreboot.org/c/coreboot/+/60405/comment/189bd730_51c0b628 PS23, Line 20: static void do_eop_operations(void *unused) : { : if (CONFIG(SKIP_FSP_NOTIFY_PHASE_READY_TO_BOOT)) { : /* Step 1 */ : cse_send_end_of_post(); : : /* Step 2 */ : cse_lock_config(); : : /* Step 3 */ : if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT)) { : cse_set_to_d0i3(); : heci1_disable(); : } : } : : if (CONFIG(SKIP_FSP_NOTIFY_PHASE_END_OF_FIRMWARE)) { : /* Step 4 */ : heci_set_to_d0i3(); : /* Step 5 */ : pmc_clear_pmcon_sts(); : } : } Thinking out loud even a bit more........... do these things have to happen here inside their own module? Aside from `pmc_clear_pmcon_sts` (which seems redundant here to the call in finalize.c for each chipset), these are all fundamentally CSE operations. I wonder if maybe the `.final` callback on the CSE heci1 CSE device is the right place for the other operations? Then we don't require another boot state callback. Right now, I don't believe coreboot is doing anything that would require sending EOP after the device finalize callbacks are happening. -- To view, visit https://review.coreboot.org/c/coreboot/+/60405 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70bde33f77026e8be165ff082defe3cab6686ec7 Gerrit-Change-Number: 60405 Gerrit-PatchSet: 23 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Fri, 04 Feb 2022 22:27:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Add 5G WWAN ACPI support for Brya and Redrix
by Tim Wawrzynczak (Code Review) 04 Feb '22

04 Feb '22

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Change in coreboot[master]: drivers/pcie/generic: Add new pcie generic chip driver
by Tim Wawrzynczak (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Subrata Banik, Angel Pons, Nick Vaccaro. Hello build bot (Jenkins), Subrata Banik, Angel Pons, Nick Vaccaro, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61627 to look at the new patch set (#2). Change subject: drivers/pcie/generic: Add new pcie generic chip driver ...................................................................... drivers/pcie/generic: Add new pcie generic chip driver This new chip driver will be used for attaching ACPI properties to PCIe endpoints. The first property it supports is "UntrustedDevice." This property can be used by a payload to, e.g., restrict the device to its own IOMMU domain for security purposes. The new property is added by adding a _DSD and an integer property set to 1. Example of the property from google/brya0: Scope (\_SB.PCI0.RP01) { Device (DEV0) { Name (_ADR, 0x0000000000000000) // _ADR: Address Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "UntrustedDevice", One } } }) } } BUG=b:215424986 TEST=boot patch train on google/brya0, dump SSDT, see above for snippet Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: I53986614dcbf4d10a6bb4010e131f5ff5a9d25cf --- A src/drivers/pcie/generic/Kconfig A src/drivers/pcie/generic/Makefile.inc A src/drivers/pcie/generic/chip.h A src/drivers/pcie/generic/generic.c 4 files changed, 86 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/61627/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61627 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I53986614dcbf4d10a6bb4010e131f5ff5a9d25cf Gerrit-Change-Number: 61627 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Add PM methods to the device.
by Cliff Huang (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Lance Zhao, Anil Kumar K, Subrata Banik, Paul Menzel, Thejaswani Putta, Patrick Rudolph. Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61352 ) Change subject: soc/intel/common/block/pcie/rtd3: Add PM methods to the device. ...................................................................... Patch Set 6: (5 comments) File src/soc/intel/common/block/pcie/rtd3/chip.h: https://review.coreboot.org/c/coreboot/+/61352/comment/21ff9e48_6b4edabd PS5, Line 9: ACPI_PCIE_RP_EMIT_NONE = 0x00, /* None */ : ACPI_PCIE_RP_EMIT_L23 = 0x01, /* L23 */ : ACPI_PCIE_RP_EMIT_PSD0 = 0x02, /* PSD0 */ : ACPI_PCIE_RP_EMIT_SRCK = 0x04, /* SRCK */ : ACPI_PCIE_RP_EMIT_L23_PSD0 = 0x03, /* L23, PSD0 */ : ACPI_PCIE_RP_EMIT_L23_SRCK = 0x05, /* L23, SRCK */ : ACPI_PCIE_RP_EMIT_PSD0_SRCK = 0x06, /* PSD0, SRCK */ : ACPI_PCIE_RP_EMIT_ALL = 0x07 /* L23, PSD0, SRCK */ : }; > You know what, I was thinking too far ahead, I was thinking of refactoring this too, so that the int […] okay. Let's have separate one for refactoring and we can also change to use acpigen_[method/if/scope/device]_end() instead of acpigen_pop_len(), as well as using extra C brackets (i.e. { and }) and indention to match closer to the generated ACPI code in there. Those two good ideas from you. File src/soc/intel/common/block/pcie/rtd3/rtd3.c: https://review.coreboot.org/c/coreboot/+/61352/comment/63ab8f86_f56a3530 PS6, Line 104: static void : pcie_rtd3_acpi_method_dl23(void) > nit: fits on one line Done https://review.coreboot.org/c/coreboot/+/61352/comment/d0caacc0_a9e61d5f PS6, Line 113: static void : pcie_rtd3_acpi_method_l23d(void) > nit: fits on one line Done https://review.coreboot.org/c/coreboot/+/61352/comment/a394da43_6072aca3 PS6, Line 122: static void : pcie_rtd3_acpi_method_pds0(unsigned int pcie_rp) > nit: fits on one line Done https://review.coreboot.org/c/coreboot/+/61352/comment/bf9818db_b2aa6752 PS6, Line 131: static void : pcie_rtd3_acpi_method_srck(unsigned int pcie_rp, : const struct soc_intel_common_block_pcie_rtd3_config *config) > nit: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/61352 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79de76f26c8424b036cb7d2719df68937599ca2f Gerrit-Change-Number: 61352 Gerrit-PatchSet: 6 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lance Zhao Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 04 Feb 2022 22:22:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Add PM methods to the device.
by Cliff Huang (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Lance Zhao, Anil Kumar K, Cliff Huang, Subrata Banik, Paul Menzel, Thejaswani Putta, Patrick Rudolph. Hello Bora Guvendik, build bot (Jenkins), Anil Kumar K, Subrata Banik, Selma Bensaid, Tim Wawrzynczak, Thejaswani Putta, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/61352 to look at the new patch set (#7). Change subject: soc/intel/common/block/pcie/rtd3: Add PM methods to the device. ...................................................................... soc/intel/common/block/pcie/rtd3: Add PM methods to the device. Add L23 enter/exit, modPHY power gate, and source clock control methods. DL23: method for L2/L3 entry. L23D: method for L2/L3 exit. PSD0: method for modPHY power gate. SRCK: method for enabling/disable source clock. These optional methods are to be used in the device ACPI to construct flows with root port's power management functions. Test: Enable and verify DL23, L23D, PSD0, SRCK methods in ssdt. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: I79de76f26c8424b036cb7d2719df68937599ca2f --- M src/soc/intel/common/block/pcie/rtd3/chip.h M src/soc/intel/common/block/pcie/rtd3/rtd3.c 2 files changed, 100 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/61352/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/61352 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79de76f26c8424b036cb7d2719df68937599ca2f Gerrit-Change-Number: 61352 Gerrit-PatchSet: 7 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lance Zhao Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Add PM methods to the device.
by Bora Guvendik (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Lance Zhao, Anil Kumar K, Cliff Huang, Subrata Banik, Paul Menzel, Thejaswani Putta, Patrick Rudolph. Bora Guvendik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61352 ) Change subject: soc/intel/common/block/pcie/rtd3: Add PM methods to the device. ...................................................................... Patch Set 6: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/61352 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79de76f26c8424b036cb7d2719df68937599ca2f Gerrit-Change-Number: 61352 Gerrit-PatchSet: 6 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lance Zhao Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 04 Feb 2022 22:17:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/wwan/fm: Add Fibocom 5G WWAN ACPI support
by Tim Wawrzynczak (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Bora Guvendik, Anil Kumar K, Cliff Huang, Subrata Banik, Paul Menzel, Thejaswani Putta. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61354 ) Change subject: drivers/wwan/fm: Add Fibocom 5G WWAN ACPI support ...................................................................... Patch Set 10: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/61354/comment/3bab88da_d4eeec96 PS10, Line 11: It would be good to mention the explicit dependency on having a `soc/intel/common/block/pcie/rtd3` chip driver and device under the same parent in the devicetree here and in fact that this driver builds on that one? File src/drivers/wwan/fm/Kconfig: https://review.coreboot.org/c/coreboot/+/61354/comment/b782e1f1_f7929d2c PS10, Line 9: Right now there is an explicit dependency on also having a `soc/intel/common/block/pcie/rtd3` chip driver and device under the same parent in the devicetree ? File src/drivers/wwan/fm/acpi_fm350gl.c: https://review.coreboot.org/c/coreboot/+/61354/comment/e81455a5_d241a594 PS10, Line 103: : /* : Generate second half reset flow (SHRF) method. : */ ``` /* * Generate second half reset flow (SHRF) method. */ ``` File src/drivers/wwan/fm/chip.h: https://review.coreboot.org/c/coreboot/+/61354/comment/374e1935_0220257c PS10, Line 21: RTD3 It points to the RP right? maybe: `PCIe RP device` ? -- To view, visit https://review.coreboot.org/c/coreboot/+/61354 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e0b9fd405f6cfb1e216ea27558bb9299a09e566 Gerrit-Change-Number: 61354 Gerrit-PatchSet: 10 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Thejaswani Putta <thejaswani.putta(a)intel.com> Gerrit-Comment-Date: Fri, 04 Feb 2022 22:17:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Add custom PLD fields to devicetree for brya variants
by Nick Vaccaro (Code Review) 04 Feb '22

04 Feb '22

Attention is currently required from: Subrata Banik, Won Chung, Benson Leung, Prashant Malani. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61571 ) Change subject: mb/google/brya: Add custom PLD fields to devicetree for brya variants ...................................................................... Patch Set 3: Code-Review+1 (1 comment) Patchset: PS3: Where did you get the positional information for each variant? This change LGTM, but giving a +1 as I'm currently not sure how to verify positions are correct for each of these variants. -- To view, visit https://review.coreboot.org/c/coreboot/+/61571 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If610e6b3c849d982345ed1b8607ffd2af105dc51 Gerrit-Change-Number: 61571 Gerrit-PatchSet: 3 Gerrit-Owner: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: Benson Leung <bleung(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-CC: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Won Chung <wonchung(a)google.com> Gerrit-Attention: Benson Leung <bleung(a)chromium.org> Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-Comment-Date: Fri, 04 Feb 2022 22:11:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit February 2022