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Change subject: arch/x86: Helper functions to get deterministic cache parameters
......................................................................
arch/x86: Helper functions to get deterministic cache parameters
This patch creates helper function that internally detects the CPU
type (AMD or Intel) and pick the leaf to send CPUID instruction with
different cache level to retrieve deterministic cache parameters.
Lists of helper functions generated as part of this CL :
1. cpu_check_deterministic_cache_cpuid_supported => if CPU has support
for deterministic cache using CPUID instruction.
2. cpu_get_cache_ways_assoc_info => Get cache ways for associativity.
3. cpu_get_cache_type => Get cache type.
4. cpu_get_cache_level => Get cache level.
5. cpu_get_cache_phy_partition_info => Get cache physical partitions.
6. cpu_get_cache_line_size => Get cahce line size.
7. cpu_get_cache_sets => Get cache number of sets.
8. cpu_is_cache_full_assoc => Check if cache is fully associative.
9. cpu_get_max_cache_share => Cores are sharing this cache.
10. get_cache_size => Calculate the cache size.
Change-Id: I0dd701fb47460092448b64c7fa2162f762bf3095
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/arch/x86/cpu_common.c
M src/arch/x86/include/arch/cpu.h
2 files changed, 204 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/55965/4
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Change subject: Documentation: Improve x86_64
......................................................................
Patch Set 4: Code-Review+2
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Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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Change subject: util/cbfstool: Add option to specify a minumum and maximum offset
......................................................................
util/cbfstool: Add option to specify a minumum and maximum offset
On some Intel platforms the offset of some blobs needs to be at xMB
from the top of memory mapped flash. Instead of hardcoding the
location in the buildsystem, have cbfstool deal with this.
Change-Id: Ia4815683011ab9b51b98bbc5759af26a524be368
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M util/cbfstool/cbfs_image.c
M util/cbfstool/cbfs_image.h
M util/cbfstool/cbfstool.c
3 files changed, 85 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/55579/12
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Change subject: mb/google/zork/var/shuboz: adjust telemetry settings
......................................................................
Patch Set 1: Code-Review+2
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Change subject: util/cbfstool: Add option to specify a minumum and maximum offset
......................................................................
Patch Set 11: -Code-Review
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Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56127 )
Change subject: util/cbfstool: Catch baseaddress parameter errors early
......................................................................
util/cbfstool: Catch baseaddress parameter errors early
Instead of just failing, provide accurate errors early on, on why a
base parameter might be wrong. Also return if a non-XIP FSP has a
flash mapped base address, as loading a binary in RO flash will cause
runtime errors.
Change-Id: Icfd121b34ce79fe1394f79d5cbd4da6ddf5c5656
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M util/cbfstool/cbfstool.c
1 file changed, 23 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/56127/1
diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c
index 1032ab2..678a28c 100644
--- a/util/cbfstool/cbfstool.c
+++ b/util/cbfstool/cbfstool.c
@@ -804,6 +804,29 @@
return 1;
}
+ if (param.baseaddress_assigned) {
+ if (param.type == CBFS_TYPE_FSP && param.stage_xip) {
+ assert(create_mmap_windows());
+ if (!find_mmap_window(HOST_SPACE_ADDR, param.baseaddress)) {
+ ERROR("Wrong -b parameter: FSP non-XIP has to be located outside of flash\n");
+ return 1;
+ }
+ } else {
+ if (IS_HOST_SPACE_ADDRESS(param.baseaddress)) {
+ if (find_mmap_window(HOST_SPACE_ADDR, param.baseaddress)) {
+ ERROR("Wrong -b parameter: base not mapped inside flash\n");
+ return 1;
+ }
+ } else {
+ if (param.baseaddress >= param.image_region->size) {
+ ERROR("Wrong -b parameter: base bigger than %s region\n",
+ param.region_name);
+ return 1;
+ }
+ }
+ }
+ }
+
if (!filename) {
ERROR("You need to specify -f/--filename.\n");
return 1;
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Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55579
to look at the new patch set (#11).
Change subject: util/cbfstool: Add option to specify a minumum and maximum offset
......................................................................
util/cbfstool: Add option to specify a minumum and maximum offset
On some Intel platforms the offset of some blobs needs to be at xMB
from the top of memory mapped flash. Instead of hardcoding the
location in the buildsystem, have cbfstool deal with this.
Change-Id: Ia4815683011ab9b51b98bbc5759af26a524be368
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M util/cbfstool/cbfs_image.c
M util/cbfstool/cbfs_image.h
M util/cbfstool/cbfstool.c
3 files changed, 84 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/55579/11
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Melo Chuang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55112 )
Change subject: mb/google/dedede/var/boten: Modify Wifi-SAR sku condition
......................................................................
Patch Set 1:
(2 comments)
Patchset:
PS1:
there should be always needing a Wifi SAR table, so that's why we modify the conditional expressions (above 0x90000),
this CL (changed conditional expression) is to distinguish which Wifi SAR table should be taken between Boten and Botenflex.
thanks
File src/mainboard/google/dedede/variants/boten/variant.c:
https://review.coreboot.org/c/coreboot/+/55112/comment/832079e9_5bf38d41
PS1, Line 33: if (sku_id >= SKU_ID_BOTENFLEX)
> What if a new SKU is added above the range 0x90000, but do not want the botenflex Wifi SAR. […]
there should be always needing a Wifi SAR table, so that's why we modify the conditional expressions (above 0x90000),
this CL (changed conditional expression) is to distinguish which Wifi SAR table should be taken between Boten and Botenflex.
thanks
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Change subject: Documentation: Improve x86_64
......................................................................
Patch Set 4:
(5 comments)
File Documentation/arch/x86/x86_64.md:
https://review.coreboot.org/c/coreboot/+/56017/comment/8692bc1b_3abcb2f0
PS1, Line 13: * Intel Sandy Bridge boards
> Maybe add the `git grep` command to find all boards, or mention the Kconfig symbol?
Added the Kconfig to enable x86_64 support.
https://review.coreboot.org/c/coreboot/+/56017/comment/d7a808f4_59638685
PS1, Line 22: * The BIOS region is large enough to contain the page tables
> I don't know the name on AMD hardware. […]
mention that this region exists on intel platforms only.
https://review.coreboot.org/c/coreboot/+/56017/comment/4eb7e13e_a92bbba7
PS1, Line 58: It cannot use 32bit addressing as the memory model
> Please add a dot/period at the end of sentences.
Done
https://review.coreboot.org/c/coreboot/+/56017/comment/cb9f3a3d_101b0768
PS1, Line 62: - This requires a complete memory map to be present in postcar stage
> Ditto.
Done
File Documentation/arch/x86/x86_64.md:
https://review.coreboot.org/c/coreboot/+/56017/comment/71cb63c1_ee2ac7c3
PS2, Line 10: *hack*
> Maybe put it in quotes: “hacks”.
Done
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