coreboot-gerrit July 2021

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Change in coreboot[master]: superio/nuvoton/nct5567d: Add NCT5567D support
by Felix Held (Code Review) 07 Jul '21

07 Jul '21

Attention is currently required from: Angel Pons, Marvin Drees. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55895 ) Change subject: superio/nuvoton/nct5567d: Add NCT5567D support ...................................................................... Patch Set 6: (2 comments) Patchset: PS6: only had a very brief look; mainly looked at the differences File src/superio/nuvoton/nct5567d/superio.c: https://review.coreboot.org/c/coreboot/+/55895/comment/3192fc01_82da2480 PS6, Line 62: 0x0ff8, }, { NULL, NCT5567D_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8, }, is missing here -- To view, visit https://review.coreboot.org/c/coreboot/+/55895 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0a9fab2bb1fb7dc777b14e70a741e04636b967b8 Gerrit-Change-Number: 55895 Gerrit-PatchSet: 6 Gerrit-Owner: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Comment-Date: Wed, 07 Jul 2021 13:15:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation/Intel/ Documentation/mainboard/kontron/ Documentation/m...
by Jose S. Cofreros Jr. (Code Review) 07 Jul '21

07 Jul '21

Jose S. Cofreros Jr. has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56150 ) Change subject: Documentation/Intel/ Documentation/mainboard/kontron/ Documentation/mainboard/purism/: Change word/phrase Coreboot to Coreboot ...................................................................... Documentation/Intel/ Documentation/mainboard/kontron/ Documentation/mainboard/purism/: Change word/phrase Coreboot to Coreboot lint-stable-021-coreboot-lowercase requires Coreboot to be coreboot but instead replaced to Coreboot. C is the HTML code for C. Signed-off-by: Jose S. Cofreros Jr <jose.sx.cofreros.jr(a)intel.com> Change-Id: Iab265fa7fee5018a2ad8cafa0133f37a2a4e3737 --- M Documentation/Intel/SoC/quark.html M Documentation/Intel/SoC/soc.html M Documentation/Intel/development.html M Documentation/Intel/index.html M Documentation/mainboard/kontron/mal10.md M Documentation/mainboard/purism/librem_14.md M Documentation/mainboard/purism/librem_mini.md 7 files changed, 28 insertions(+), 28 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/56150/1 diff --git a/Documentation/Intel/SoC/quark.html b/Documentation/Intel/SoC/quark.html index c3eead2..d3f7806 100644 --- a/Documentation/Intel/SoC/quark.html +++ b/Documentation/Intel/SoC/quark.html @@ -19,7 +19,7 @@ <li><a target="_blank" href="../fsp1_1.html">FSP 1.1</a> integration</li> <li><a target="_blank" href="../Board/board.html">Board</a> support</li> <li><a target="_blank" href="#QuarkFsp">Quark™ FSP</a></li> - <li><a target="_blank" href="#CorebootPayloadPkg">CorebootPayloadPkg</a></li> + <li><a target="_blank" href="#CorebootPayloadPkg">CorebootPayloadPkg</a></li> </ul> </td> </tr> @@ -49,23 +49,23 @@ <hr> -<h2><a name="CorebootPayloadPkg">Quark™ EDK2 CorebootPayloadPkg</a></h2> +<h2><a name="CorebootPayloadPkg">Quark™ EDK2 CorebootPayloadPkg</a></h2> <p> Build Instructions: </p> <ol> <li>Set up <a href="#BuildEnvironment">build environment</a></li> <li>Linux (assumes GCC48): -<pre><code>build -p CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc -a IA32 \ +<pre><code>build -p CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc -a IA32 \ -t GCC48 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 \ -DDEBUG_PRINT_ERROR_LEVEL=0x80000042 -DSHELL_TYPE=BUILD_SHELL \ -DMAX_LOGICAL_PROCESSORS=1 -ls Build/CorebootPayloadPkgIA32/DEBUG_GCC48/FV/UEFIPAYLOAD.fd +ls Build/CorebootPayloadPkgIA32/DEBUG_GCC48/FV/UEFIPAYLOAD.fd </code></pre> </li> <li>Windows (assumes Visual Studio 2015): -<pre><code>build -p CorebootPayloadPkg\CorebootPayloadPkgIa32.dsc -a IA32 -t VS2015x86 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 -DDEBUG_PRINT_ERROR_LEVEL=0x80000042 -DSHELL_TYPE=BUILD_SHELL -DMAX_LOGICAL_PROCESSORS=1 -dir Build\CorebootPayloadPkgIA32\DEBUG_VS2015x86\FV\UEFIPAYLOAD.fd +<pre><code>build -p CorebootPayloadPkg\CorebootPayloadPkgIa32.dsc -a IA32 -t VS2015x86 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 -DDEBUG_PRINT_ERROR_LEVEL=0x80000042 -DSHELL_TYPE=BUILD_SHELL -DMAX_LOGICAL_PROCESSORS=1 +dir Build\CorebootPayloadPkgIA32\DEBUG_VS2015x86\FV\UEFIPAYLOAD.fd </code></pre> </li> <li>In the .config for coreboot, set the following Kconfig values: diff --git a/Documentation/Intel/SoC/soc.html b/Documentation/Intel/SoC/soc.html index 8d565d5..adf1fd3 100644 --- a/Documentation/Intel/SoC/soc.html +++ b/Documentation/Intel/SoC/soc.html @@ -569,18 +569,18 @@ <hr> <h2><a name="AcpiTables">ACPI Tables</a></h2> <p> - One of the payloads that needs ACPI tables is the EDK2 <a target="_blank" href="quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a>. + One of the payloads that needs ACPI tables is the EDK2 <a target="_blank" href="quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a>. </p> <h3>FADT</h3> <p> The EDK2 module - CorebootModulePkg/Library/CbParseLib/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/Library/CbP…">CbParseLib.c</a> + CorebootModulePkg/Library/CbParseLib/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/Library…">CbParseLib.c</a> requires that the FADT contains the values in the table below. These values are placed into a HOB identified by - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/CorebootMod…">gUefiAcpiBoardInfoGuid</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/Cor…">gUefiAcpiBoardInfoGuid</a> by routine - CorebootModulePkg/CbSupportPei/CbSupportPei/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/CbSupportPe…">CbPeiEntryPoint</a>. + CorebootModulePkg/CbSupportPei/CbSupportPei/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/CbSuppo…">CbPeiEntryPoint</a>. </p> <table border="1"> <tr bgcolor="#c0ffc0"> @@ -597,9 +597,9 @@ <td>gpe0_blk<br>gpe0_blk_len</td> <td>Gpe0Blk<br>Gpe0BlkLen</td> <td> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/Library/CbP…">PmGpeEnBase</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/Library…">PmGpeEnBase</a> </td> - <td><a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/Re…">Shutdown</a></td> + <td><a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Librar…">Shutdown</a></td> <td>4.8.4.1</td> </tr> <tr> @@ -607,8 +607,8 @@ <td>Pm1aCntBlk</td> <td>PmCtrlRegBase</td> <td> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/Re…">Shutdown</a><br> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/Re…">Suspend</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Librar…">Shutdown</a><br> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Librar…">Suspend</a> </td> <td>4.8.3.2.1</td> </tr> @@ -616,7 +616,7 @@ <td>pm1a_evt_blk</td> <td>Pm1aEvtBlk</td> <td>PmEvtBase</td> - <td><a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/Re…">Shutdown</a></td> + <td><a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Librar…">Shutdown</a></td> <td>4.8.3.1.1</td> </tr> <tr> @@ -624,7 +624,7 @@ <td>PmTmrBlk</td> <td>PmTimerRegBase</td> <td> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/Ac…">Timer</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Librar…">Timer</a> </td> <td>4.8.3.3</td> </tr> @@ -633,9 +633,9 @@ <td>ResetReg.Address</td> <td>ResetRegAddress</td> <td> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/Re…">Cold</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Librar…">Cold</a> and - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/Re…">Warm</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Librar…">Warm</a> resets </td> <td>4.3.3.6</td> @@ -645,9 +645,9 @@ <td>ResetValue</td> <td>ResetValue</td> <td> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/Re…">Cold</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Librar…">Cold</a> and - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/Re…">Warm</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Librar…">Warm</a> resets </td> <td>4.8.3.6</td> @@ -677,7 +677,7 @@ <hr> <h2><a name="LegacyHardware">Legacy Hardware</a></h2> <p> - One of the payloads that needs legacy hardare is the EDK2 <a target="_blank" href="quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a>. + One of the payloads that needs legacy hardare is the EDK2 <a target="_blank" href="quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a>. </p> <table border="1"> diff --git a/Documentation/Intel/development.html b/Documentation/Intel/development.html index 92b1d4b..c38d0e6 100644 --- a/Documentation/Intel/development.html +++ b/Documentation/Intel/development.html @@ -150,12 +150,12 @@ <tr> <td>8254 Programmable Interval Timer</td> <td><a target="_blank" href="SoC/soc.html#LegacyHardware">Legacy hardware</a> support</td> - <td><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a> gets to shell prompt</td> + <td><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a> gets to shell prompt</td> </tr> <tr> <td>8259 Programmable Interrupt Controller</td> <td><a target="_blank" href="SoC/soc.html#LegacyHardware">Legacy hardware</a> support</td> - <td><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a> gets to shell prompt</td> + <td><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a> gets to shell prompt</td> </tr> <tr> <td>Cache-as-RAM</td> diff --git a/Documentation/Intel/index.html b/Documentation/Intel/index.html index 9d8aad0..f7d4bb8 100644 --- a/Documentation/Intel/index.html +++ b/Documentation/Intel/index.html @@ -10,7 +10,7 @@ <h2>Intel® x86 Boards</h2> <ul> <li><a target="_blank" href="Board/galileo.html">Galileo</a></li> - <li><a target="_blank" href="http://wiki.minnowboard.org/Coreboot">MinnowBoard MAX</a></li> + <li><a target="_blank" href="http://wiki.minnowboard.org/Coreboot">MinnowBoard MAX</a></li> </ul> <h2>Intel® x86 SoCs</h2> @@ -36,7 +36,7 @@ <hr> <h2>Payload Development</h2> <ul> - <li><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a> + <li><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a> <ul> <li><a target="_blank" href="https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Development-Pr…">EDK II Development Process</a></li> <li>EDK II <a target="_blank" href="https://github.com/tianocore/tianocore.github.io/wiki/EDK%20II%20White%20pa…">White Papers</a></li> diff --git a/Documentation/mainboard/kontron/mal10.md b/Documentation/mainboard/kontron/mal10.md index b2eefc3..a28ef88 100644 --- a/Documentation/mainboard/kontron/mal10.md +++ b/Documentation/mainboard/kontron/mal10.md @@ -76,7 +76,7 @@ ## Known issues - Works only with Tianocore "UEFIPayload" payload edk2-stable201903-1569-g3e63a91 - Booting with the "CorebootPayload" [crashes]. + Booting with the "CorebootPayload" [crashes]. - Tianocore outputs video through an external GPU only. ## Untested diff --git a/Documentation/mainboard/purism/librem_14.md b/Documentation/mainboard/purism/librem_14.md index 6ece264..82e97ed 100644 --- a/Documentation/mainboard/purism/librem_14.md +++ b/Documentation/mainboard/purism/librem_14.md @@ -92,7 +92,7 @@ * Internal display with libgfxinit, VGA option ROM, or FSP/GOP init * External displays via HDMI, USB-C Alt-Mode - * SeaBIOS (1.14), Tianocore (CorebootPayloadPkg), and Heads payloads + * SeaBIOS (1.14), Tianocore (CorebootPayloadPkg), and Heads payloads * Ethernet, m.2 2230 Wi-Fi * System firmware updates via flashrom * M.2 storage (NVMe, SATA III) diff --git a/Documentation/mainboard/purism/librem_mini.md b/Documentation/mainboard/purism/librem_mini.md index f8ee00d..76e215b 100644 --- a/Documentation/mainboard/purism/librem_mini.md +++ b/Documentation/mainboard/purism/librem_mini.md @@ -107,7 +107,7 @@ * External displays via HDMI/DisplayPort with VGA option ROM or FSP/GOP init (no libgfxinit support yet) - * SeaBIOS (1.14), Tianocore (CorebootPayloadPkg), Heads (Purism downstream) payloads + * SeaBIOS (1.14), Tianocore (CorebootPayloadPkg), Heads (Purism downstream) payloads * Ethernet, m.2 2230 Wi-Fi * System firmware updates via flashrom * PCIe NVMe -- To view, visit https://review.coreboot.org/c/coreboot/+/56150 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab265fa7fee5018a2ad8cafa0133f37a2a4e3737 Gerrit-Change-Number: 56150 Gerrit-PatchSet: 1 Gerrit-Owner: Jose S. Cofreros Jr. <jose.sx.cofreros.jr(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: test
by Mars Chen (Code Review) 07 Jul '21

07 Jul '21

Mars Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56149 ) Change subject: test ...................................................................... test Change-Id: I34ad3fab181c7f4a6b52453250a3165097dc8ccb --- A src/test 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/56149/1 diff --git a/src/test b/src/test new file mode 100644 index 0000000..9daeafb --- /dev/null +++ b/src/test @@ -0,0 +1 @@ +test -- To view, visit https://review.coreboot.org/c/coreboot/+/56149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I34ad3fab181c7f4a6b52453250a3165097dc8ccb Gerrit-Change-Number: 56149 Gerrit-PatchSet: 1 Gerrit-Owner: Mars Chen <chenxiangrui(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/intel/gma: Support IGD Opregion 2.1
by Angel Pons (Code Review) 07 Jul '21

07 Jul '21

Attention is currently required from: Nico Huber, Krishna Prabhakaran, Furquan Shaikh, Maulik V Vaghela, Selma Bensaid, Tim Wawrzynczak, Subrata Banik, Meera Ravindranath, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52758 ) Change subject: drivers/intel/gma: Support IGD Opregion 2.1 ...................................................................... Patch Set 11: Code-Review+1 (1 comment) File src/drivers/intel/gma/opregion.c: https://review.coreboot.org/c/coreboot/+/52758/comment/dd3023d8_75fce164 PS10, Line 362: CONFIG_INTEL_IGD_OPREGION_VERSION > Thanks for this, yes a left shift of 16 is required. […] Done, thanks for checking! -- To view, visit https://review.coreboot.org/c/coreboot/+/52758 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I95a9f3df185002a4e38faa910f867ace0b97ac2b Gerrit-Change-Number: 52758 Gerrit-PatchSet: 11 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Krishna Prabhakaran <krishna.prabhakaran(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Krishna Prabhakaran <krishna.prabhakaran(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 07 Jul 2021 10:54:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Meera Ravindranath <meera.ravindranath(a)intel.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/gma: Support IGD Opregion 2.1
by Meera Ravindranath (Code Review) 07 Jul '21

07 Jul '21

Attention is currently required from: Nico Huber, Krishna Prabhakaran, Furquan Shaikh, Maulik V Vaghela, Selma Bensaid, Angel Pons, Subrata Banik, Patrick Rudolph. Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52758 ) Change subject: drivers/intel/gma: Support IGD Opregion 2.1 ...................................................................... Patch Set 11: (10 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/52758/comment/f02cab9b_8afb48e2 PS10, Line 12: incase > in case Done File src/drivers/intel/gma/Kconfig: https://review.coreboot.org/c/coreboot/+/52758/comment/b24ea982_d66f368e PS6, Line 149: config INTEL_GFX_IGD_OPREGION_2_1 > Please align name with above convention […] Done https://review.coreboot.org/c/coreboot/+/52758/comment/ef21e89d_e207e1da PS6, Line 153: Support IGD Opregion version 2.1 > Platform supports IGD opregion version 2.1 […] Ack File src/drivers/intel/gma/Kconfig: https://review.coreboot.org/c/coreboot/+/52758/comment/b672964b_9bccfd5f PS10, Line 57: register (0xe0) rather than the SWSCI register (0xe8). > Place new Kconfig options here. Done https://review.coreboot.org/c/coreboot/+/52758/comment/a47d1bd0_dc34f2d1 PS10, Line 149: config INTEL_IGD_OPREGION_VERSION > This shouldn't be guarded by `if GFX_GMA`. […] Done https://review.coreboot.org/c/coreboot/+/52758/comment/093af3ac_f3b895bb PS10, Line 151: default 0x200 > To handle the different RVDA meaning, as we don't support Opregion versions earlier than 2. […] Done File src/drivers/intel/gma/opregion.h: https://review.coreboot.org/c/coreboot/+/52758/comment/871151e1_4c2e05e5 PS6, Line 32: #define IGD_OPREGION_VERSION 2 > Can we put this macro as IF condition or select as per KCONFIG. […] Done File src/drivers/intel/gma/opregion.c: https://review.coreboot.org/c/coreboot/+/52758/comment/e94b2e59_8e3bd218 PS6, Line 334: > nit: remove extra line added here Done https://review.coreboot.org/c/coreboot/+/52758/comment/9cfc1cbd_27d718c7 PS6, Line 364: if(CONFIG(INTEL_GFX_IGD_OPREGION_2_1)) > We can remove this Done File src/drivers/intel/gma/opregion.c: https://review.coreboot.org/c/coreboot/+/52758/comment/4b651a3c_bc2b2c21 PS10, Line 362: CONFIG_INTEL_IGD_OPREGION_VERSION > This now has a different value. Looks like it's not intentional? […] Thanks for this, yes a left shift of 16 is required. Bits [31:24] - Major Version Number BCD Integer representing the major version of the OpRegion Bits [23:16] - Minor Version Number BCD Integer representing the minor version of the OpRegion -- To view, visit https://review.coreboot.org/c/coreboot/+/52758 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I95a9f3df185002a4e38faa910f867ace0b97ac2b Gerrit-Change-Number: 52758 Gerrit-PatchSet: 11 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Krishna Prabhakaran <krishna.prabhakaran(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Krishna Prabhakaran <krishna.prabhakaran(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 07 Jul 2021 10:49:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/gma: Support IGD Opregion 2.1
by Meera Ravindranath (Code Review) 07 Jul '21

07 Jul '21

Attention is currently required from: Nico Huber, Krishna Prabhakaran, Furquan Shaikh, Selma Bensaid, Subrata Banik, Patrick Rudolph. Hello build bot (Jenkins), Nico Huber, Krishna Prabhakaran, Furquan Shaikh, Maulik V Vaghela, Selma Bensaid, Subrata Banik, Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52758 to look at the new patch set (#11). Change subject: drivers/intel/gma: Support IGD Opregion 2.1 ...................................................................... drivers/intel/gma: Support IGD Opregion 2.1 List of changes: 1. Define new config for Opregion version 2. Assign rvda to relative address of the Opregion buffer in case of opregion version > 2.0 Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I95a9f3df185002a4e38faa910f867ace0b97ac2b --- M src/drivers/intel/gma/Kconfig M src/drivers/intel/gma/opregion.c M src/drivers/intel/gma/opregion.h 3 files changed, 30 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/52758/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/52758 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I95a9f3df185002a4e38faa910f867ace0b97ac2b Gerrit-Change-Number: 52758 Gerrit-PatchSet: 11 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Krishna Prabhakaran <krishna.prabhakaran(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Krishna Prabhakaran <krishna.prabhakaran(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/siemens/mc_ehl: Clean up Kconfig
by Mario Scheithauer (Code Review) 07 Jul '21

07 Jul '21

Attention is currently required from: Werner Zeh. Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56034 ) Change subject: mb/siemens/mc_ehl: Clean up Kconfig ...................................................................... Patch Set 1: (1 comment) File src/mainboard/siemens/mc_ehl/Kconfig: https://review.coreboot.org/c/coreboot/+/56034/comment/fc342ef2_aa85e3c7 PS1, Line 3: select SOC_INTEL_ELKHARTLAKE : select BOARD_ROMSIZE_KB_32768 : select DRIVERS_I2C_GENERIC : select HAVE_SPD_IN_CBFS : select HAVE_ACPI_TABLES : > and maybe you can also go directly to 16MB flash size in this patch sorry...56035: mb/siemens/mc_ehl: Switch to 16 MB ROM and provide a flashmap | https://review.coreboot.org/c/coreboot/+/56035 -- To view, visit https://review.coreboot.org/c/coreboot/+/56034 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If231f37f06c6763d52a821799e87fdb3010af0aa Gerrit-Change-Number: 56034 Gerrit-PatchSet: 1 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Wed, 07 Jul 2021 10:41:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/siemens/mc_ehl: Clean up Kconfig
by Mario Scheithauer (Code Review) 07 Jul '21

07 Jul '21

Attention is currently required from: Werner Zeh. Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56034 ) Change subject: mb/siemens/mc_ehl: Clean up Kconfig ...................................................................... Patch Set 1: (1 comment) File src/mainboard/siemens/mc_ehl/Kconfig: https://review.coreboot.org/c/coreboot/+/56034/comment/47618957_0e6a34fe PS1, Line 3: select SOC_INTEL_ELKHARTLAKE : select BOARD_ROMSIZE_KB_32768 : select DRIVERS_I2C_GENERIC : select HAVE_SPD_IN_CBFS : select HAVE_ACPI_TABLES : > Why don't you sort it alphabetically? and maybe you can also go directly to 16MB flash size in this patch -- To view, visit https://review.coreboot.org/c/coreboot/+/56034 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If231f37f06c6763d52a821799e87fdb3010af0aa Gerrit-Change-Number: 56034 Gerrit-PatchSet: 1 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Wed, 07 Jul 2021 10:39:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/adlrvp: Fix DDR5 Boot issue
by Subrata Banik (Code Review) 07 Jul '21

07 Jul '21

Attention is currently required from: Bora Guvendik, Furquan Shaikh, Selma Bensaid, Maulik V Vaghela, Paul Menzel, Meera Ravindranath, Angel Pons. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50996 ) Change subject: mb/adlrvp: Fix DDR5 Boot issue ...................................................................... Patch Set 13: (1 comment) File src/mainboard/intel/adlrvp/romstage_fsp_params.c: https://review.coreboot.org/c/coreboot/+/50996/comment/15a7ea55_f0aca572 PS13, Line 60: ADL_P_DDR5_2 > Here you are skipping the call to `memcfg_init()`. […] @meera, can you please address this review comment ? Consider to move this in below file?https://github.com/coreboot/coreboot/blob/master/src/soc/intel/alderla… void memcfg_init(FSP_M_CONFIG *mem_cfg, const struct mb_cfg *mb_cfg, const struct mem_spd *spd_info, bool half_populated) { static const int spd_array[] = { 0xA0, 0xA2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xA4, 0xA6, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 } switch (mb_cfg->type) { case MEM_TYPE_DDR5: /* Fill FSP UPDs with SMBus Addresses until SMbus driver in coreboot is updated with DDR5 support TODO: Drop this check once the SMBus driver is ready */ for (int i = 0; i < 16; i++) m_cfg->SpdAddressTable[i] = spd_array[i]; case MEM_TYPE_DDR4: meminit_ddr(mem_cfg, &mb_cfg->ddr_config); dq_dqs_auto_detect = true; break; .... } that way you are not skipping anything important? -- To view, visit https://review.coreboot.org/c/coreboot/+/50996 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9998bfcd12b81c11fcc9f791da2a27d3c788e48a Gerrit-Change-Number: 50996 Gerrit-PatchSet: 13 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Wed, 07 Jul 2021 10:23:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: grunt/treeya: add Realtek ALC5682 codec support
by Paul Menzel (Code Review) 07 Jul '21

07 Jul '21

Attention is currently required from: Daniel Kurtz, Kevin Chang, Martin Roth. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56100 ) Change subject: grunt/treeya: add Realtek ALC5682 codec support ...................................................................... Patch Set 2: (3 comments) File src/mainboard/google/kahlee/variants/treeya/audio.c: https://review.coreboot.org/c/coreboot/+/56100/comment/c775406c_7d75411b PS2, Line 22: 0xfedc2000 Can you define a macro for this? https://review.coreboot.org/c/coreboot/+/56100/comment/9187f9cb_f4a648f9 PS2, Line 24: } Can one of the checks be moved into the do-while condition? ``` do { mmio_dev = dev_find_path(mmio_dev, DEVICE_PATH_MMIO); if (mmio_dev == NULL) break; } while (mmio_dev->path.mmio.addr != 0xfedc2000); ``` https://review.coreboot.org/c/coreboot/+/56100/comment/ca9ca20c_25c3d9e8 PS2, Line 27: return; Can’t you return already above? Maybe also print an error? -- To view, visit https://review.coreboot.org/c/coreboot/+/56100 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I49c673fd944b2c2a79c4283eee941a16596ba7fa Gerrit-Change-Number: 56100 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Daniel Kurtz <djkurtz(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alec Wang <alec.wang(a)lcfc.corp-partner.google.com> Gerrit-CC: Allen Cheng <allen.cheng(a)lcfc.corp-partner.google.com> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Daniel Kurtz <djkurtz(a)chromium.org> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Wed, 07 Jul 2021 09:48:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit July 2021