coreboot-gerrit July 2021

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Change in coreboot[master]: util/ifdtool: Add sklkbl to IFDv2 platforms
by Patrick Georgi (Code Review) 07 Jul '21

07 Jul '21

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56070 ) Change subject: util/ifdtool: Add sklkbl to IFDv2 platforms ...................................................................... util/ifdtool: Add sklkbl to IFDv2 platforms Currently ifdtool breaks the descriptor because it treats it as IFDv1. This change adds it to the list of IFDv2 platforms. Fixes boot for X11SSH-LN4F. Fixes: 8c082e5fef ("util/ifdtool: Use -p platform name to detect IFDv2 platform and chipset") Change-Id: I3f92b090e929336b5c18b442d1504ee1000f5594 Signed-off-by: Jan Tatje <jan(a)jnt.io> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56070 Reviewed-by: Subrata Banik <subrata.banik(a)intel.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M util/ifdtool/ifdtool.c 1 file changed, 4 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Angel Pons: Looks good to me, approved diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c index e99cdec..b91c90c 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c @@ -205,9 +205,8 @@ return CHIPSET_9_SERIES_WILDCAT_POINT; } else if (nm == 6) { return CHIPSET_C620_SERIES_LEWISBURG; - } else { - return CHIPSET_100_200_SERIES_SUNRISE_POINT; } + return CHIPSET_PCH_UNKNOWN; } static enum ich_chipset ifd2_platform_to_chipset(const int pindex) @@ -219,6 +218,8 @@ return CHIPSET_N_SERIES_JASPER_LAKE; case PLATFORM_EHL: return CHIPSET_x6000_SERIES_ELKHART_LAKE; + case PLATFORM_SKLKBL: + return CHIPSET_100_200_SERIES_SUNRISE_POINT; case PLATFORM_CNL: return CHIPSET_300_SERIES_CANNON_POINT; case PLATFORM_TGL: @@ -250,6 +251,7 @@ PLATFORM_JSL, PLATFORM_EHL, PLATFORM_ADL, + PLATFORM_SKLKBL, }; unsigned int i; -- To view, visit https://review.coreboot.org/c/coreboot/+/56070 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3f92b090e929336b5c18b442d1504ee1000f5594 Gerrit-Change-Number: 56070 Gerrit-PatchSet: 3 Gerrit-Owner: Jan Tatje <jan(a)jnt.io> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: arch/x86: Save resume vector to stack in x86_64 mode
by Patrick Georgi (Code Review) 07 Jul '21

07 Jul '21

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55947 ) Change subject: arch/x86: Save resume vector to stack in x86_64 mode ...................................................................... arch/x86: Save resume vector to stack in x86_64 mode In x86_64, the first function parameter is passed in rdi register, and the 32-bit code after exiting long mode reads the resume vector in 4(%esp), so it's needed to save the resume vector from rdi to 4(%rsp). Also note that the function attribute "regparm" only works on x86-32 targets according to the GCC manual, so "asmlinkage" doesn't change the ABI of an x86_64 function. Tested on HP EliteBook 2560p. The laptop can resume from S3 in x86_64 mode after this change. Change-Id: I45f2678071b2511c0af5dce9d9b73ac70dfd7252 Signed-off-by: Iru Cai <mytbk920423(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55947 Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/arch/x86/wakeup.S 1 file changed, 7 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/arch/x86/wakeup.S b/src/arch/x86/wakeup.S index dc9510b..7462dad 100644 --- a/src/arch/x86/wakeup.S +++ b/src/arch/x86/wakeup.S @@ -15,6 +15,13 @@ .globl __wakeup __wakeup: #if ENV_X86_64 + /* When called in x86_64 mode, the resume vector is in %rdi + * instead of the stack, save it in 4(%rsp) for the 32-bit code. + * It's OK to overwrite the return address at (%rsp) because this + * function doesn't return. + */ + mov %edi, 4(%rsp) + xor %rax,%rax mov %ss, %ax push %rax -- To view, visit https://review.coreboot.org/c/coreboot/+/55947 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45f2678071b2511c0af5dce9d9b73ac70dfd7252 Gerrit-Change-Number: 55947 Gerrit-PatchSet: 5 Gerrit-Owner: Iru Cai (vimacs) <mytbk920423(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: merged

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Change in coreboot[master]: Documentation: Improve x86_64
by Patrick Georgi (Code Review) 07 Jul '21

07 Jul '21

Attention is currently required from: Patrick Rudolph, Paul Menzel. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56017 ) Change subject: Documentation: Improve x86_64 ...................................................................... Patch Set 4: (1 comment) File Documentation/arch/x86/index.md: https://review.coreboot.org/c/coreboot/+/56017/comment/4c689c31_c9d31afa PS4, Line 6: x86_64_ what's that trailing underscore for? -- To view, visit https://review.coreboot.org/c/coreboot/+/56017 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia5ba51be629a8c878aad64d3297176457cf8e855 Gerrit-Change-Number: 56017 Gerrit-PatchSet: 4 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 07 Jul 2021 14:53:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Makefile.inc: Drop the cbfs master header from non-X86
by Patrick Georgi (Code Review) 07 Jul '21

07 Jul '21

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56120 ) Change subject: Makefile.inc: Drop the cbfs master header from non-X86 ...................................................................... Makefile.inc: Drop the cbfs master header from non-X86 The pointer to the header has a x86 top mmaped address even though the boot medium is not mapped that way. If no pointer is used to find the header FMAP is needed. If FMAP is used anyway there is no need for a cbfs master header. Change-Id: I6d693bdd4ddaf4c9b3cffb4ea9879c761200aca9 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56120 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> --- M Makefile.inc 1 file changed, 2 insertions(+), 9 deletions(-) Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved diff --git a/Makefile.inc b/Makefile.inc index b1c7067..fee73f5 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -1101,22 +1101,15 @@ -b -$(call file-size,$(objcbfs)/bootblock.bin) $(cbfs-autogen-attributes) \ $(TS_OPTIONS) \ $(CBFSTOOL_ADD_CMD_OPTIONS) + # the cbfs master header is a deprecated feature only used on x86 + $(CBFSTOOL) $@.tmp add-master-header $(TS_OPTIONS) $(CBFSTOOL_ADD_CMD_OPTIONS) else # ifeq ($(CONFIG_ARCH_X86),y) $(CBFSTOOL) $@.tmp write -u \ -r BOOTBLOCK \ -f $(objcbfs)/bootblock.bin # make space for the CBFS master header pointer. "ptr_" is just # arbitrary 4 bytes that will be overwritten by add-master-header. - printf "ptr_" > $@.tmp.2 - $(CBFSTOOL) $@.tmp add \ - -f $@.tmp.2 \ - -n "header pointer" \ - -t "cbfs header" \ - -b -4 \ - $(CBFSTOOL_ADD_CMD_OPTIONS) - rm -f $@.tmp.2 endif # ifeq ($(CONFIG_ARCH_X86),y) - $(CBFSTOOL) $@.tmp add-master-header $(TS_OPTIONS) $(CBFSTOOL_ADD_CMD_OPTIONS) $(prebuild-files) true mv $@.tmp $@ else # ifneq ($(CONFIG_UPDATE_IMAGE),y) -- To view, visit https://review.coreboot.org/c/coreboot/+/56120 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6d693bdd4ddaf4c9b3cffb4ea9879c761200aca9 Gerrit-Change-Number: 56120 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: Makefile.inc: Drop the cbfs master header from non-X86
by Patrick Georgi (Code Review) 07 Jul '21

07 Jul '21

Attention is currently required from: Martin Roth. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56120 ) Change subject: Makefile.inc: Drop the cbfs master header from non-X86 ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56120 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6d693bdd4ddaf4c9b3cffb4ea9879c761200aca9 Gerrit-Change-Number: 56120 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Wed, 07 Jul 2021 14:52:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: Makefile.inc: Fix IFITTOOL dependencies
by Patrick Georgi (Code Review) 07 Jul '21

07 Jul '21

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56112 ) Change subject: Makefile.inc: Fix IFITTOOL dependencies ...................................................................... Makefile.inc: Fix IFITTOOL dependencies Add IFITTOOL as a dependency where needed and remove where it is unneeded. Change-Id: I88c9fc19cca0c72e80d3218dbcc76b89b04feacf Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56112 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> --- M Makefile.inc M src/cpu/intel/fit/Makefile.inc M src/security/intel/cbnt/Makefile.inc 3 files changed, 5 insertions(+), 5 deletions(-) Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved diff --git a/Makefile.inc b/Makefile.inc index 96374a9..b1c7067 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -1090,7 +1090,7 @@ endif ifneq ($(CONFIG_UPDATE_IMAGE),y) -$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $(IFITTOOL) $$(cpu_ucode_cbfs_file) $(obj)/fmap.fmap $(obj)/fmap.desc +$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $(obj)/fmap.fmap $(obj)/fmap.desc $(CBFSTOOL) $@.tmp create -M $(obj)/fmap.fmap -r $(shell cat $(obj)/fmap.desc) ifeq ($(CONFIG_ARCH_X86),y) $(CBFSTOOL) $@.tmp add \ @@ -1146,7 +1146,7 @@ $(1): $(obj)/coreboot.pre $(2) | $(INTERMEDIATE) \ $(eval INTERMEDIATE+=$(1)) $(eval PHONY+=$(1)) -$(obj)/coreboot.rom: $(obj)/coreboot.pre $(CBFSTOOL) $$(INTERMEDIATE) +$(obj)/coreboot.rom: $(obj)/coreboot.pre $(CBFSTOOL) $(IFITTOOL) $$(INTERMEDIATE) @printf " CBFS $(subst $(obj)/,,$(@))\n" # The full ROM may be larger than the CBFS part, so create an empty # file (filled with \377 = 0xff) and copy the CBFS image over it. diff --git a/src/cpu/intel/fit/Makefile.inc b/src/cpu/intel/fit/Makefile.inc index b4926ba..aac2fe6 100644 --- a/src/cpu/intel/fit/Makefile.inc +++ b/src/cpu/intel/fit/Makefile.inc @@ -21,7 +21,7 @@ ifneq ($(CONFIG_CPU_MICROCODE_CBFS_NONE),y) -$(call add_intermediate, add_mcu_fit, set_fit_ptr) +$(call add_intermediate, add_mcu_fit, set_fit_ptr $(IFITTOOL)) @printf " UPDATE-FIT Microcode\n" $(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT @@ -32,7 +32,7 @@ @printf " UPDATE-FIT Top Swap: set FIT pointer to table\n" $(IFITTOOL) -f $< -F -n intel_fit_ts -r COREBOOT $(TS_OPTIONS) -$(call add_intermediate, add_ts_mcu_fit, set_ts_fit_ptr) +$(call add_intermediate, add_ts_mcu_fit, set_ts_fit_ptr $(IFITTOOL)) @printf " UPDATE-FIT Top Swap: Microcode\n" ifneq ($(FIT_ENTRY),) $(IFITTOOL) -f $< -A -n $(FIT_ENTRY) -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT diff --git a/src/security/intel/cbnt/Makefile.inc b/src/security/intel/cbnt/Makefile.inc index cc18b20..a520696 100644 --- a/src/security/intel/cbnt/Makefile.inc +++ b/src/security/intel/cbnt/Makefile.inc @@ -86,7 +86,7 @@ $(CBNT_PROV) bpm-sign $< $@ $(CONFIG_INTEL_CBNT_BPM_PRIV_KEY_FILE) "" # Add BPM at the end of the build when all files have been added -files_added:: $(obj)/bpm.bin +files_added:: $(obj)/bpm.bin $(IFITTOOL) printf " CBNT Adding BPM\n" $(CBFSTOOL) $(obj)/coreboot.rom add -f $< -n boot_policy_manifest.bin -a 0x10 -t raw printf " IFITTOOL Adding BPM\n" -- To view, visit https://review.coreboot.org/c/coreboot/+/56112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88c9fc19cca0c72e80d3218dbcc76b89b04feacf Gerrit-Change-Number: 56112 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: Makefile.inc: Fix IFITTOOL dependencies
by Patrick Georgi (Code Review) 07 Jul '21

07 Jul '21

Attention is currently required from: Martin Roth, Patrick Rudolph. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56112 ) Change subject: Makefile.inc: Fix IFITTOOL dependencies ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88c9fc19cca0c72e80d3218dbcc76b89b04feacf Gerrit-Change-Number: 56112 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 07 Jul 2021 14:51:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Add UsbTcPortEn in devicetree
by EricR Lai (Code Review) 07 Jul '21

07 Jul '21

Attention is currently required from: Furquan Shaikh, Subrata Banik, Patrick Rudolph. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56074 ) Change subject: mb/google/brya: Add UsbTcPortEn in devicetree ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: weird, let me try the latest CPFE FW... -- To view, visit https://review.coreboot.org/c/coreboot/+/56074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe9d3a6d1d73cb37daae4a1ae49ee26abc43635b Gerrit-Change-Number: 56074 Gerrit-PatchSet: 5 Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 07 Jul 2021 14:51:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: Makefile.inc: Remove explicit ramstage dependency for coreboot.rom
by Patrick Georgi (Code Review) 07 Jul '21

07 Jul '21

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56111 ) Change subject: Makefile.inc: Remove explicit ramstage dependency for coreboot.rom ...................................................................... Makefile.inc: Remove explicit ramstage dependency for coreboot.rom This is already handled in $(prebuild-files). Change-Id: I648f97198772d30d6d267ab9d6f7fa8d1d5d0e91 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56111 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> --- M Makefile.inc 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved diff --git a/Makefile.inc b/Makefile.inc index eb505e5..96374a9 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -1146,7 +1146,7 @@ $(1): $(obj)/coreboot.pre $(2) | $(INTERMEDIATE) \ $(eval INTERMEDIATE+=$(1)) $(eval PHONY+=$(1)) -$(obj)/coreboot.rom: $(obj)/coreboot.pre $(RAMSTAGE) $(CBFSTOOL) $$(INTERMEDIATE) +$(obj)/coreboot.rom: $(obj)/coreboot.pre $(CBFSTOOL) $$(INTERMEDIATE) @printf " CBFS $(subst $(obj)/,,$(@))\n" # The full ROM may be larger than the CBFS part, so create an empty # file (filled with \377 = 0xff) and copy the CBFS image over it. -- To view, visit https://review.coreboot.org/c/coreboot/+/56111 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I648f97198772d30d6d267ab9d6f7fa8d1d5d0e91 Gerrit-Change-Number: 56111 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: vc/mediatek/mt8195: Enable DRAM Vcore DVFS settings
by Patrick Georgi (Code Review) 07 Jul '21

07 Jul '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56106 ) Change subject: vc/mediatek/mt8195: Enable DRAM Vcore DVFS settings ...................................................................... Patch Set 3: (1 comment) File src/vendorcode/mediatek/mt8195/dramc/dramc_top.c: https://review.coreboot.org/c/coreboot/+/56106/comment/0e1d3229_1fdeebb2 PS3, Line 355: #elif CONFIG(CHROMEOS) How is this ChromeOS specific? -- To view, visit https://review.coreboot.org/c/coreboot/+/56106 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I39342aea902a87cdc2c5b862e5d1a889fcc822c5 Gerrit-Change-Number: 56106 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Wed, 07 Jul 2021 14:50:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit July 2021