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Change subject: security/intel/cbnt/Makefile.inc: Improve build flow
......................................................................
security/intel/cbnt/Makefile.inc: Improve build flow
Now that adding all files to cbfs is a distinct Makefile target in the
buildprocess called "add_prebuild_files", it can be used to streamline
setting up cbnt. Using 'files_added::' is not needed any longer.
Change-Id: I22aa140202f0665b7095a01cb138af4986aa9ac3
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/security/intel/cbnt/Makefile.inc
1 file changed, 7 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/56119/3
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I'd like you to reexamine a change. Please visit
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Change subject: soc/intel/alderlake: Implement report_cache_info() function
......................................................................
soc/intel/alderlake: Implement report_cache_info() function
Make use of deterministic cache helper functions from Alder Lake
SoC code to print useful information during boot as below:
CPU: Genuine Intel(R) 0000
CPU: ID 906a0, Alderlake Platform, ucode: 00000019
CPU: AES supported, TXT supported, VT supported
Cache Information for Level3: assoc=12 par=1 line_size=64 sets=16384
@@ cache_size 0xc00000 bytes
Change-Id: I30a56266015d69abccb885b3f230689488ee0360
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/soc/intel/alderlake/bootblock/report_platform.c
1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/55654/3
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Arthur Heymans has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/56113 )
Change subject: Makefile.inc: Remove the $(INTERMEDIATE) dependency
......................................................................
Abandoned
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56113 )
Change subject: Makefile.inc: Remove the $(INTERMEDIATE) dependency
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> no, macros and functions are evaluated in parse order. So when you add intermediates A, B, C, D, ... the current setup ensures that B depends on A, C on B and A, D on C, B, A, ... (which could be optimized by a small amount by removing the transitive dependencies), creating a stable execution order.
>
> Without that order-only dependency, executing C, A, D, B would be a valid strategy (and depending on how many parallel make jobs you have and what happens in them, that might well happen).
>
> I added that order-only target in https://review.coreboot.org/c/coreboot/+/49358 specifically to avoid race conditions that we were seeing...
Ok I hope that does not put too much restrictions on the order of things?
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Hello build bot (Jenkins), Furquan Shaikh, Rizwan Qureshi, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Patrick Rudolph,
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Change subject: arch/x86: Helper functions to get deterministic cache parameters
......................................................................
arch/x86: Helper functions to get deterministic cache parameters
This patch creates helper function that internally detects the CPU
type (AMD or Intel) and pick the leaf to send CPUID instruction with
different cache level to retrieve deterministic cache parameters.
Lists of helper functions generated as part of this CL :
1. cpu_check_deterministic_cache_cpuid_supported => if CPU has support
for deterministic cache using CPUID instruction.
2. cpu_get_cache_ways_assoc_info => Get cache ways for associativity.
3. cpu_get_cache_type => Get cache type.
4. cpu_get_cache_level => Get cache level.
5. cpu_get_cache_phy_partition_info => Get cache physical partitions.
6. cpu_get_cache_line_size => Get cahce line size.
7. cpu_get_cache_sets => Get cache number of sets.
8. cpu_is_cache_full_assoc => Check if cache is fully associative.
9. cpu_get_max_cache_share => Cores are sharing this cache.
10. get_cache_size => Calculate the cache size.
Change-Id: I0dd701fb47460092448b64c7fa2162f762bf3095
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/arch/x86/cpu_common.c
M src/arch/x86/include/arch/cpu.h
2 files changed, 204 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/55965/3
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55965 )
Change subject: arch/x86: Helper functions to get deterministic cache parameters
......................................................................
Patch Set 2:
(2 comments)
File src/arch/x86/cpu_common.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123527):
https://review.coreboot.org/c/coreboot/+/55965/comment/314d8d03_3a1b3132
PS2, Line 127: break;
break is not useful after a goto or return
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123527):
https://review.coreboot.org/c/coreboot/+/55965/comment/62f551c1_728a76de
PS2, Line 130: break;
break is not useful after a goto or return
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Hello build bot (Jenkins), Furquan Shaikh, Rizwan Qureshi, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55965
to look at the new patch set (#2).
Change subject: arch/x86: Helper functions to get deterministic cache parameters
......................................................................
arch/x86: Helper functions to get deterministic cache parameters
This patch creates helper function that internally detects the CPU
type (AMD or Intel) and pick the leaf to send CPUID instruction with
different cache level to retrieve deterministic cache parameters.
Lists of helper functions generated as part of this CL:
1. cpu_check_deterministic_cache_cpuid_supported => if CPU has support
for deterministic cache using CPUID instruction.
2. cpu_get_cache_ways_assoc_info => Get cache ways for associativity.
3. cpu_get_cache_type => Get cache type.
4. cpu_get_cache_level => Get cache level.
5. cpu_get_cache_phy_partition_info => Get cache physical partitions.
6. cpu_get_cache_line_size => Get cahce line size.
7. cpu_get_cache_sets => Get cache number of sets.
8. cpu_is_cache_full_assoc => Check if cache is fully associative.
9. cpu_get_max_cache_share => Cores are sharing this cache.
10. get_cache_size => Calculate the cache size.
Change-Id: I0dd701fb47460092448b64c7fa2162f762bf3095
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/arch/x86/cpu_common.c
M src/arch/x86/include/arch/cpu.h
2 files changed, 206 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/55965/2
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