Attention is currently required from: Martin Roth.
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56113 )
Change subject: Makefile.inc: Remove the $(INTERMEDIATE) dependency
......................................................................
Makefile.inc: Remove the $(INTERMEDIATE) dependency
This makes it possible to have interdependencies between targets added
with add_intermediate.
Change-Id: I5e8d84c32f242ff3309ced3a1b5f3dc4565d3387
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M Makefile.inc
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/56113/1
diff --git a/Makefile.inc b/Makefile.inc
index 9abcfbe..66af076 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -1143,7 +1143,7 @@
endif
add_intermediate = \
- $(1): $(obj)/coreboot.pre $(2) | $(INTERMEDIATE) \
+ $(1): $(obj)/coreboot.pre $(2) \
$(eval INTERMEDIATE+=$(1)) $(eval PHONY+=$(1))
$(obj)/coreboot.rom: $(obj)/coreboot.pre $(CBFSTOOL) $$(INTERMEDIATE)
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I5e8d84c32f242ff3309ced3a1b5f3dc4565d3387
Gerrit-Change-Number: 56113
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Attention: Martin Roth <martinroth(a)google.com>
Gerrit-MessageType: newchange
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56111 )
Change subject: Makefile.inc: Remove explicit ramstage dependency for coreboot.rom
......................................................................
Makefile.inc: Remove explicit ramstage dependency for coreboot.rom
This is already handled in $(prebuild-files).
Change-Id: I648f97198772d30d6d267ab9d6f7fa8d1d5d0e91
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M Makefile.inc
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/56111/1
diff --git a/Makefile.inc b/Makefile.inc
index eb505e5..96374a9 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -1146,7 +1146,7 @@
$(1): $(obj)/coreboot.pre $(2) | $(INTERMEDIATE) \
$(eval INTERMEDIATE+=$(1)) $(eval PHONY+=$(1))
-$(obj)/coreboot.rom: $(obj)/coreboot.pre $(RAMSTAGE) $(CBFSTOOL) $$(INTERMEDIATE)
+$(obj)/coreboot.rom: $(obj)/coreboot.pre $(CBFSTOOL) $$(INTERMEDIATE)
@printf " CBFS $(subst $(obj)/,,$(@))\n"
# The full ROM may be larger than the CBFS part, so create an empty
# file (filled with \377 = 0xff) and copy the CBFS image over it.
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I648f97198772d30d6d267ab9d6f7fa8d1d5d0e91
Gerrit-Change-Number: 56111
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-MessageType: newchange