coreboot-gerrit July 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS
by Sean Rhodes (Code Review) 06 Jul '21

06 Jul '21

Attention is currently required from: SRIDHAR SIRICILLA, Furquan Shaikh, Rizwan Qureshi, Tim Wawrzynczak, Subrata Banik, Angel Pons, Sridhar Siricilla, Patrick Rudolph. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52800 ) Change subject: soc/intel: Allow enable/disable ME via CMOS ...................................................................... Patch Set 55: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/52800/comment/46872c8a_e86ea598 PS48, Line 11: > also adding one line here about the motivation would be helpful why we need this ? […] Ack File src/soc/intel/common/block/cse/cse.c: https://review.coreboot.org/c/coreboot/+/52800/comment/95a113a8_a772d57b PS48, Line 980: disable_me > are you taking care of return status? what if https://review.coreboot. […] Ack https://review.coreboot.org/c/coreboot/+/52800/comment/b212cea4_28557e9a PS48, Line 1003: enable_me > same here ? Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/52800 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I374db3b7c0ded71cdc18f27970252fec7220cc20 Gerrit-Change-Number: 52800 Gerrit-PatchSet: 55 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: SRIDHAR SIRICILLA Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: SRIDHAR SIRICILLA Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 06 Jul 2021 14:29:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS
by Sean Rhodes (Code Review) 06 Jul '21

06 Jul '21

Attention is currently required from: SRIDHAR SIRICILLA, Furquan Shaikh, Rizwan Qureshi, Tim Wawrzynczak, Angel Pons, Sridhar Siricilla, Patrick Rudolph. Hello build bot (Jenkins), SRIDHAR SIRICILLA, Furquan Shaikh, Rizwan Qureshi, Tim Wawrzynczak, Sridhar Siricilla, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52800 to look at the new patch set (#55). Change subject: soc/intel: Allow enable/disable ME via CMOS ...................................................................... soc/intel: Allow enable/disable ME via CMOS Added .enable method that will set the CSME state. State is based on me_state, with values of 0 and 1. Method is very stable, reliable, and easy to change. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I374db3b7c0ded71cdc18f27970252fec7220cc20 --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 127 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/52800/55 -- To view, visit https://review.coreboot.org/c/coreboot/+/52800 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I374db3b7c0ded71cdc18f27970252fec7220cc20 Gerrit-Change-Number: 52800 Gerrit-PatchSet: 55 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: SRIDHAR SIRICILLA Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: SRIDHAR SIRICILLA Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: vc/mediatek/mt8195: Enable VREF calibration at DDR3200 for S0 stability
by Yu-Ping Wu (Code Review) 06 Jul '21

06 Jul '21

Attention is currently required from: Hung-Te Lin. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56105 ) Change subject: vc/mediatek/mt8195: Enable VREF calibration at DDR3200 for S0 stability ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56105 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9df776b393f6b6166d1d6f02d5e96bd7ebc4a707 Gerrit-Change-Number: 56105 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Tue, 06 Jul 2021 14:27:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: vc/mediatek/mt8195: Improve settings of duty calibration
by Yu-Ping Wu (Code Review) 06 Jul '21

06 Jul '21

Attention is currently required from: Hung-Te Lin. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56104 ) Change subject: vc/mediatek/mt8195: Improve settings of duty calibration ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56104 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic4aeaec947356001d073df72977899ca06b18bda Gerrit-Change-Number: 56104 Gerrit-PatchSet: 3 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Tue, 06 Jul 2021 14:27:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: payloads/Linuxboot/u-root: Explicitly set GO111MODULE=off
by Jan Tatje (Code Review) 06 Jul '21

06 Jul '21

Attention is currently required from: Martin Roth, Paul Menzel, Stefan Reinauer, Christian Walter, Arthur Heymans, Ron Minnich. Jan Tatje has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55095 ) Change subject: payloads/Linuxboot/u-root: Explicitly set GO111MODULE=off ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Patchset: PS2: Works for me. -- To view, visit https://review.coreboot.org/c/coreboot/+/55095 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie90b400418ccd06426a0e00ec7f7932066f57d7e Gerrit-Change-Number: 55095 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jan Tatje <jan(a)jnt.io> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Ron Minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Tue, 06 Jul 2021 13:49:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS
by Sean Rhodes (Code Review) 06 Jul '21

06 Jul '21

Attention is currently required from: Sean Rhodes, SRIDHAR SIRICILLA, Furquan Shaikh, Rizwan Qureshi, Tim Wawrzynczak, Angel Pons, Sridhar Siricilla, Patrick Rudolph. Hello build bot (Jenkins), SRIDHAR SIRICILLA, Furquan Shaikh, Rizwan Qureshi, Tim Wawrzynczak, Sridhar Siricilla, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52800 to look at the new patch set (#53). Change subject: soc/intel: Allow enable/disable ME via CMOS ...................................................................... soc/intel: Allow enable/disable ME via CMOS Added .enable method that will set the CSME state. State is based on me_state, with values of 0 and 1. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I374db3b7c0ded71cdc18f27970252fec7220cc20 --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 123 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/52800/53 -- To view, visit https://review.coreboot.org/c/coreboot/+/52800 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I374db3b7c0ded71cdc18f27970252fec7220cc20 Gerrit-Change-Number: 52800 Gerrit-PatchSet: 53 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: SRIDHAR SIRICILLA Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Attention: SRIDHAR SIRICILLA Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: configs: Add config file for Prodrive Hermes
by Angel Pons (Code Review) 06 Jul '21

06 Jul '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56108 ) Change subject: configs: Add config file for Prodrive Hermes ...................................................................... configs: Add config file for Prodrive Hermes Add a config file to build test the options Prodrive uses to build coreboot for their Hermes mainboard. This file can also be used as a base to automatically build complete coreboot images. Change-Id: I69ec088bf083c213b9165f948dd9cdd9fc29b660 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- A configs/config.prodrive_hermes 1 file changed, 17 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/56108/1 diff --git a/configs/config.prodrive_hermes b/configs/config.prodrive_hermes new file mode 100644 index 0000000..6eba6e3 --- /dev/null +++ b/configs/config.prodrive_hermes @@ -0,0 +1,17 @@ +CONFIG_TSEG_STAGE_CACHE=y +CONFIG_VENDOR_PRODRIVE=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Prodrive Technologies B.V." +CONFIG_POST_IO=y +# CONFIG_CONSOLE_POST is not set +# CONFIG_POST_DEVICE is not set +CONFIG_USE_LEGACY_8254_TIMER=y +CONFIG_HERMES_USES_SPS_FIRMWARE=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_SMMSTORE=y +CONFIG_SMMSTORE_V2=y +# CONFIG_BOOTBLOCK_CONSOLE is not set +# CONFIG_POSTCAR_CONSOLE is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3=y +CONFIG_MAINBOARD_SERIAL_NUMBER="N/A" -- To view, visit https://review.coreboot.org/c/coreboot/+/56108 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69ec088bf083c213b9165f948dd9cdd9fc29b660 Gerrit-Change-Number: 56108 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: include/types.h: #include <limits.h>
by Angel Pons (Code Review) 06 Jul '21

06 Jul '21

Attention is currently required from: Sean Rhodes, Nico Huber, Paul Menzel, Julius Werner, Kyösti Mälkki, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55320 ) Change subject: include/types.h: #include <limits.h> ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > Indirectly, 52800 need 55320. […] I'd suggest explicitly including limits.h in CB:52800 for now. -- To view, visit https://review.coreboot.org/c/coreboot/+/55320 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3ba189b998644c68068b85f25b11cff4d70c037d Gerrit-Change-Number: 55320 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 06 Jul 2021 12:18:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sean Rhodes <admin(a)starlabs.systems> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mainboard/google/herobrine: Configure SDCC clock
by Sajida Bhanu (Code Review) 06 Jul '21

06 Jul '21

Attention is currently required from: Shelley Chen, Ravi kumar, Paul Menzel, mturney mturney, Julius Werner. Sajida Bhanu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50585 ) Change subject: mainboard/google/herobrine: Configure SDCC clock ...................................................................... Patch Set 52: (1 comment) File src/mainboard/google/herobrine/mainboard.c: https://review.coreboot.org/c/coreboot/+/50585/comment/927aeca6_53025a2d PS51, Line 11: Coonfigure > Configure sure -- To view, visit https://review.coreboot.org/c/coreboot/+/50585 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8acbce58614add0228adc39289762da10937cbe2 Gerrit-Change-Number: 50585 Gerrit-PatchSet: 52 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Sajida Bhanu <sbhanu(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Tue, 06 Jul 2021 12:16:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: include/types.h: #include <limits.h>
by Sean Rhodes (Code Review) 06 Jul '21

06 Jul '21

Attention is currently required from: Nico Huber, Paul Menzel, Angel Pons, Julius Werner, Kyösti Mälkki, Patrick Rudolph. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55320 ) Change subject: include/types.h: #include <limits.h> ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > Are the soc/intel changes related? Indirectly, 52800 need 55320. I'm not sure how, but in an attempt to rebase 52800, the two changes have moved from 52800 to here. -- To view, visit https://review.coreboot.org/c/coreboot/+/55320 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3ba189b998644c68068b85f25b11cff4d70c037d Gerrit-Change-Number: 55320 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 06 Jul 2021 12:14:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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coreboot-gerrit July 2021