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Change subject: payloads/Linuxboot/u-root: Explicitly set GO111MODULE=off
......................................................................
Patch Set 2: Code-Review+1
(1 comment)
Patchset:
PS2:
Works for me.
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Attention is currently required from: Sean Rhodes, SRIDHAR SIRICILLA, Furquan Shaikh, Rizwan Qureshi, Tim Wawrzynczak, Angel Pons, Sridhar Siricilla, Patrick Rudolph.
Hello build bot (Jenkins), SRIDHAR SIRICILLA, Furquan Shaikh, Rizwan Qureshi, Tim Wawrzynczak, Sridhar Siricilla, Subrata Banik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/52800
to look at the new patch set (#53).
Change subject: soc/intel: Allow enable/disable ME via CMOS
......................................................................
soc/intel: Allow enable/disable ME via CMOS
Added .enable method that will set the CSME state.
State is based on me_state, with values of 0 and 1.
Signed-off-by: Sean Rhodes <sean(a)starlabs.systems>
Change-Id: I374db3b7c0ded71cdc18f27970252fec7220cc20
---
M src/soc/intel/common/block/cse/cse.c
M src/soc/intel/common/block/include/intelblocks/cse.h
2 files changed, 123 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/52800/53
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Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56108 )
Change subject: configs: Add config file for Prodrive Hermes
......................................................................
configs: Add config file for Prodrive Hermes
Add a config file to build test the options Prodrive uses to build
coreboot for their Hermes mainboard. This file can also be used as
a base to automatically build complete coreboot images.
Change-Id: I69ec088bf083c213b9165f948dd9cdd9fc29b660
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
A configs/config.prodrive_hermes
1 file changed, 17 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/56108/1
diff --git a/configs/config.prodrive_hermes b/configs/config.prodrive_hermes
new file mode 100644
index 0000000..6eba6e3
--- /dev/null
+++ b/configs/config.prodrive_hermes
@@ -0,0 +1,17 @@
+CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_VENDOR_PRODRIVE=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Prodrive Technologies B.V."
+CONFIG_POST_IO=y
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_POST_DEVICE is not set
+CONFIG_USE_LEGACY_8254_TIMER=y
+CONFIG_HERMES_USES_SPS_FIRMWARE=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_SMMSTORE=y
+CONFIG_SMMSTORE_V2=y
+# CONFIG_BOOTBLOCK_CONSOLE is not set
+# CONFIG_POSTCAR_CONSOLE is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3=y
+CONFIG_MAINBOARD_SERIAL_NUMBER="N/A"
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Change subject: include/types.h: #include <limits.h>
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
> Indirectly, 52800 need 55320. […]
I'd suggest explicitly including limits.h in CB:52800 for now.
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Change subject: include/types.h: #include <limits.h>
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
> Are the soc/intel changes related?
Indirectly, 52800 need 55320. I'm not sure how, but in an attempt to rebase 52800, the two changes have moved from 52800 to here.
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Change subject: sb/intel/common: Hide IFD options if !HAVE_IFD_BIN
......................................................................
Patch Set 1:
(1 comment)
File src/southbridge/intel/common/firmware/Kconfig:
https://review.coreboot.org/c/coreboot/+/56107/comment/c5011300_7f2e82e2
PS1, Line 27: config HAVE_ME_BIN
: bool "Add Intel ME/TXE firmware"
: depends on HAVE_IFD_BIN
: help
: The Intel processor in the selected system requires a special firmware
: for an integrated controller. This might be called the Management
: Engine (ME), the Trusted Execution Engine (TXE) or something else
: depending on the chip. This firmware might or might not be available
: in coreboot's 3rdparty/blobs repository. If it is not and if you don't
: have access to the firmware from elsewhere, you can still build
: coreboot without it. In this case however, you'll have to make sure
: that you don't overwrite your ME/TXE firmware on your flash ROM.
:
: config ME_BIN_PATH
: string "Path to management engine firmware"
: default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/me.bin"
: depends on HAVE_ME_BIN
:
: config CHECK_ME
: bool "Verify the integrity of the supplied ME/TXE firmware"
: default n
: depends on HAVE_ME_BIN && (NORTHBRIDGE_INTEL_IRONLAKE || \
: NORTHBRIDGE_INTEL_SANDYBRIDGE || \
: NORTHBRIDGE_INTEL_HASWELL || \
: SOC_INTEL_BROADWELL || SOC_INTEL_SKYLAKE || \
: SOC_INTEL_KABYLAKE || SOC_INTEL_BAYTRAIL || SOC_INTEL_BRASWELL)
: help
: Verify the integrity of the supplied Intel ME/TXE firmware before
: proceeding with the build, in order to prevent an accidental loading
: of a corrupted ME/TXE image.
:
: config ME_REGION_ALLOW_CPU_READ_ACCESS
: bool "Allows HOST/CPU read access to ME region"
: depends on HAVE_IFD_BIN
: default y if SOC_INTEL_CSE_LITE_SKU
: default n
: help
: The config ensures Host has read access to the ME region if it is locked
: through LOCK_MANAGEMENT_ENGINE config. This config is enabled when the CSE
: Lite SKU is integrated.
:
: config USE_ME_CLEANER
: bool "Strip down the Intel ME/TXE firmware"
: depends on HAVE_ME_BIN && (NORTHBRIDGE_INTEL_IRONLAKE || \
: NORTHBRIDGE_INTEL_SANDYBRIDGE || \
: NORTHBRIDGE_INTEL_HASWELL || \
: SOC_INTEL_BROADWELL || SOC_INTEL_SKYLAKE || \
: SOC_INTEL_KABYLAKE || SOC_INTEL_BAYTRAIL || SOC_INTEL_BRASWELL)
: help
: Use me_cleaner to remove all the non-fundamental code from the Intel
: ME/TXE firmware.
: The resulting Intel ME/TXE firmware will have only the code
: responsible for the very basic hardware initialization, leaving the
: ME/TXE subsystem essentially in a disabled state.
:
: Don't flash a modified ME/TXE firmware and a new coreboot image at the
: same time, test them in two different steps.
:
: WARNING: this tool isn't based on any official Intel documentation but
: only on reverse engineering and trial & error.
:
: See the project's page
: https://github.com/corna/me_cleaner
: or the wiki
: https://github.com/corna/me_cleaner/wiki/How-to-apply-me_cleaner
: https://github.com/corna/me_cleaner/wiki/How-does-it-work%3F
: https://github.com/corna/me_cleaner/wiki/me_cleaner-status
: for more info about this tool
:
: If unsure, say N.
:
: comment "Please test the modified ME/TXE firmware and coreboot in two steps"
: depends on USE_ME_CLEANER
:
: config ME_CLEANER_ARGS
: string
: depends on USE_ME_CLEANER
: default "-S"
:
: config MAINBOARD_USES_IFD_GBE_REGION
: def_bool n
:
: config HAVE_GBE_BIN
: bool "Add gigabit ethernet configuration"
: depends on HAVE_IFD_BIN && MAINBOARD_USES_IFD_GBE_REGION
: help
: The integrated gigabit ethernet controller needs a configuration
: file. Select this if you are going to use the PCH integrated
: controller and want to add that file.
:
: config GBE_BIN_PATH
: string "Path to gigabit ethernet configuration"
: depends on HAVE_GBE_BIN
: default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/gbe.bin"
:
: config MAINBOARD_USES_IFD_EC_REGION
: def_bool n
:
: config HAVE_EC_BIN
: bool "Add EC firmware"
: depends on HAVE_IFD_BIN && MAINBOARD_USES_IFD_EC_REGION
: help
: The embedded controller needs a firmware file.
:
: Select this if you are going to use the PCH integrated controller
: and have the EC firmware. EC firmware will be added to final image
: through ifdtool.
:
: config EC_BIN_PATH
: string "Path to EC firmware"
: depends on HAVE_EC_BIN
: default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/ec.bin"
:
: choice
: prompt "Protect flash regions" if HAVE_IFD_BIN
: default UNLOCK_FLASH_REGIONS if HAVE_IFD_BIN
: help
: This option allows you to protect flash regions.
:
: config DO_NOT_TOUCH_DESCRIPTOR_REGION
: bool "Use the preset values to protect the regions"
: help
: Read and write access permissions to different regions in the flash
: can be controlled via dedicated bitfields in the flash descriptor.
: These permissions can be modified with the Intel Flash Descriptor
: Tool (ifdtool). If you don't want to change these permissions and
: keep the ones provided in the initial descriptor, use this option.
:
: config LOCK_MANAGEMENT_ENGINE
: bool "Lock ME/TXE section"
: help
: The Intel Firmware Descriptor supports preventing write and read
: accesses from the host to the ME or TXE section. If the section
: is locked, it can only be overwritten with an external SPI flash
: programmer or HECI HMRFPO_ENABLE command needs to be sent to CSE
: before writing to the ME Section. If CSE Lite SKU is integrated,
: the Kconfig prevents only writing to the ME section.
:
: If unsure, select "Unlock flash regions".
:
: config UNLOCK_FLASH_REGIONS
: bool "Unlock flash regions"
: help
: All regions are completely unprotected and can be overwritten using
: a flash programming tool.
:
: endchoice
> This whole thing does not make sense without HAVE_IFD_BIN. […]
I'm not sure if the if-clause would make some symbols disappear. Plus, most options already depend on others (e.g. HAVE_ME_BIN depends on HAVE_IFD_BIN), so I'm not sure what the benefit would be.
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Change subject: sb/intel/common: Hide IFD options if !HAVE_IFD_BIN
......................................................................
Patch Set 1:
(1 comment)
File src/southbridge/intel/common/firmware/Kconfig:
https://review.coreboot.org/c/coreboot/+/56107/comment/cb7d4729_1e6a5814
PS1, Line 27: config HAVE_ME_BIN
: bool "Add Intel ME/TXE firmware"
: depends on HAVE_IFD_BIN
: help
: The Intel processor in the selected system requires a special firmware
: for an integrated controller. This might be called the Management
: Engine (ME), the Trusted Execution Engine (TXE) or something else
: depending on the chip. This firmware might or might not be available
: in coreboot's 3rdparty/blobs repository. If it is not and if you don't
: have access to the firmware from elsewhere, you can still build
: coreboot without it. In this case however, you'll have to make sure
: that you don't overwrite your ME/TXE firmware on your flash ROM.
:
: config ME_BIN_PATH
: string "Path to management engine firmware"
: default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/me.bin"
: depends on HAVE_ME_BIN
:
: config CHECK_ME
: bool "Verify the integrity of the supplied ME/TXE firmware"
: default n
: depends on HAVE_ME_BIN && (NORTHBRIDGE_INTEL_IRONLAKE || \
: NORTHBRIDGE_INTEL_SANDYBRIDGE || \
: NORTHBRIDGE_INTEL_HASWELL || \
: SOC_INTEL_BROADWELL || SOC_INTEL_SKYLAKE || \
: SOC_INTEL_KABYLAKE || SOC_INTEL_BAYTRAIL || SOC_INTEL_BRASWELL)
: help
: Verify the integrity of the supplied Intel ME/TXE firmware before
: proceeding with the build, in order to prevent an accidental loading
: of a corrupted ME/TXE image.
:
: config ME_REGION_ALLOW_CPU_READ_ACCESS
: bool "Allows HOST/CPU read access to ME region"
: depends on HAVE_IFD_BIN
: default y if SOC_INTEL_CSE_LITE_SKU
: default n
: help
: The config ensures Host has read access to the ME region if it is locked
: through LOCK_MANAGEMENT_ENGINE config. This config is enabled when the CSE
: Lite SKU is integrated.
:
: config USE_ME_CLEANER
: bool "Strip down the Intel ME/TXE firmware"
: depends on HAVE_ME_BIN && (NORTHBRIDGE_INTEL_IRONLAKE || \
: NORTHBRIDGE_INTEL_SANDYBRIDGE || \
: NORTHBRIDGE_INTEL_HASWELL || \
: SOC_INTEL_BROADWELL || SOC_INTEL_SKYLAKE || \
: SOC_INTEL_KABYLAKE || SOC_INTEL_BAYTRAIL || SOC_INTEL_BRASWELL)
: help
: Use me_cleaner to remove all the non-fundamental code from the Intel
: ME/TXE firmware.
: The resulting Intel ME/TXE firmware will have only the code
: responsible for the very basic hardware initialization, leaving the
: ME/TXE subsystem essentially in a disabled state.
:
: Don't flash a modified ME/TXE firmware and a new coreboot image at the
: same time, test them in two different steps.
:
: WARNING: this tool isn't based on any official Intel documentation but
: only on reverse engineering and trial & error.
:
: See the project's page
: https://github.com/corna/me_cleaner
: or the wiki
: https://github.com/corna/me_cleaner/wiki/How-to-apply-me_cleaner
: https://github.com/corna/me_cleaner/wiki/How-does-it-work%3F
: https://github.com/corna/me_cleaner/wiki/me_cleaner-status
: for more info about this tool
:
: If unsure, say N.
:
: comment "Please test the modified ME/TXE firmware and coreboot in two steps"
: depends on USE_ME_CLEANER
:
: config ME_CLEANER_ARGS
: string
: depends on USE_ME_CLEANER
: default "-S"
:
: config MAINBOARD_USES_IFD_GBE_REGION
: def_bool n
:
: config HAVE_GBE_BIN
: bool "Add gigabit ethernet configuration"
: depends on HAVE_IFD_BIN && MAINBOARD_USES_IFD_GBE_REGION
: help
: The integrated gigabit ethernet controller needs a configuration
: file. Select this if you are going to use the PCH integrated
: controller and want to add that file.
:
: config GBE_BIN_PATH
: string "Path to gigabit ethernet configuration"
: depends on HAVE_GBE_BIN
: default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/gbe.bin"
:
: config MAINBOARD_USES_IFD_EC_REGION
: def_bool n
:
: config HAVE_EC_BIN
: bool "Add EC firmware"
: depends on HAVE_IFD_BIN && MAINBOARD_USES_IFD_EC_REGION
: help
: The embedded controller needs a firmware file.
:
: Select this if you are going to use the PCH integrated controller
: and have the EC firmware. EC firmware will be added to final image
: through ifdtool.
:
: config EC_BIN_PATH
: string "Path to EC firmware"
: depends on HAVE_EC_BIN
: default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/ec.bin"
:
: choice
: prompt "Protect flash regions" if HAVE_IFD_BIN
: default UNLOCK_FLASH_REGIONS if HAVE_IFD_BIN
: help
: This option allows you to protect flash regions.
:
: config DO_NOT_TOUCH_DESCRIPTOR_REGION
: bool "Use the preset values to protect the regions"
: help
: Read and write access permissions to different regions in the flash
: can be controlled via dedicated bitfields in the flash descriptor.
: These permissions can be modified with the Intel Flash Descriptor
: Tool (ifdtool). If you don't want to change these permissions and
: keep the ones provided in the initial descriptor, use this option.
:
: config LOCK_MANAGEMENT_ENGINE
: bool "Lock ME/TXE section"
: help
: The Intel Firmware Descriptor supports preventing write and read
: accesses from the host to the ME or TXE section. If the section
: is locked, it can only be overwritten with an external SPI flash
: programmer or HECI HMRFPO_ENABLE command needs to be sent to CSE
: before writing to the ME Section. If CSE Lite SKU is integrated,
: the Kconfig prevents only writing to the ME section.
:
: If unsure, select "Unlock flash regions".
:
: config UNLOCK_FLASH_REGIONS
: bool "Unlock flash regions"
: help
: All regions are completely unprotected and can be overwritten using
: a flash programming tool.
:
: endchoice
This whole thing does not make sense without HAVE_IFD_BIN. Maybe add an if clause?
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