Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55128 )
Change subject: src/mainboard: Add Star Labs labtop series
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Patch Set 13:
(1 comment)
Patchset:
PS13:
> Thanks for the port Sean, it's always great to see new mainboards here! 🎉 […]
Thanks for your help :) I'll add it to the to-do list, should have a few more ports by then!
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Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55077 )
Change subject: sc7280: Add target specific GPIO pin definitions
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Patch Set 2:
(1 comment)
Patchset:
PS2:
Ravi, can you clean up the newlines at the end of addressmap.h so that Jenkins doesn't complain? Thanks!
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Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Angel Pons,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya: Remove I2C4 usage in devicetree.cb
......................................................................
mb/google/brya: Remove I2C4 usage in devicetree.cb
I2C4 is not used pn Brya hence make below changes:
1. Disable it in SerialIoI2cMode.
2. Remove I2C4 config in common_soc_config.
TEST=Make sure FSP is not programming I2C4.
Change-Id: I94c72b7fac9d8a001913b5faa2c0c8a3e8b701e9
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/mainboard/google/brya/variants/baseboard/devicetree.cb
1 file changed, 1 insertion(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/55170/4
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Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Angel Pons,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#3).
Change subject: mb/google/brya: Set SerialIoI2cMode for I2C4 as PchSerialIoDisabled
......................................................................
mb/google/brya: Set SerialIoI2cMode for I2C4 as PchSerialIoDisabled
I2C4 is not used on Brya. Thus, disable it in SerialIoI2cMode.
TEST=Make sure FSP is not programming I2C4.
Change-Id: I94c72b7fac9d8a001913b5faa2c0c8a3e8b701e9
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/mainboard/google/brya/variants/baseboard/devicetree.cb
1 file changed, 1 insertion(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/55170/3
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Swift Geek (Sebastian Grzywna) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55171 )
Change subject: mb/lenovo/t410: Update PCH PCIe RP comments
......................................................................
Patch Set 1: Code-Review+2
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Swift Geek (Sebastian Grzywna) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55169 )
Change subject: mb/lenovo/t410: Enable WLAN and WUSB PCIe ports
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Patch Set 2: Code-Review+2
(1 comment)
Patchset:
PS2:
To make it more clear to anyone having the device on hand:
J22 - WWAN slot (a slot with connection to UIM/SIM card slot) - Located on the same side as docking connector
J27 - WUSB slot (UWB led signal is pretty much the only thing that makes it special)
J32 - WLAN slot (a slot with controller link connection for intel wifi) - Located the closest to the CPU socket
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