June 2021 - coreboot-gerrit - mail.coreboot.org

Change in coreboot[master]: acpi/device: Add ability to generate proper _STA for PowerResource
by Raul Rangel (Code Review) June 3, 2021

June 3, 2021

Attention is currently required from: Lance Zhao, Furquan Shaikh, Tim Wawrzynczak. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55027 ) Change subject: acpi/device: Add ability to generate proper _STA for PowerResource ...................................................................... Patch Set 3: (2 comments) File src/acpi/device.c: https://review.coreboot.org/c/coreboot/+/55027/comment/7c6c9ffc_98d181e9 PS2, Line 649: 0x1 > Since a PowerResources uses the return value of _STA differently than a Device, how about adding new […] Done File src/include/acpi/acpi_device.h: https://review.coreboot.org/c/coreboot/+/55027/comment/2c325b6b_ba6eb81a PS2, Line 459: : /* Write a _STA method that checks the state of the GPIOs. Otherwise : * the _STA method will always return _ON. : */ : bool enable_status; > that's good, also +1. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/55027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I91410556db002c620fd9aaa99981457808da93a5 Gerrit-Change-Number: 55027 Gerrit-PatchSet: 3 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Thu, 03 Jun 2021 21:35:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Lance Zhao Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/pcie/rtd3/device: Add PCIe RTD3 driver
by Raul Rangel (Code Review) June 3, 2021

June 3, 2021

Attention is currently required from: Jason Glenesk, Furquan Shaikh, Marshall Dawson, Paul Menzel, Karthik Ramasubramanian, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Furquan Shaikh, Marshall Dawson, Tim Wawrzynczak, Karthik Ramasubramanian, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/54966 to look at the new patch set (#5). Change subject: drivers/pcie/rtd3/device: Add PCIe RTD3 driver ...................................................................... drivers/pcie/rtd3/device: Add PCIe RTD3 driver This driver was inspired from soc/intel/common/block/pci/rtd3. I decided to copy and modify it because the Intel driver has a lot of Intel specific code. This driver has been stripped down to only provide a power resource and set the StorageD3Enable property. This driver is SoC agnostic and does not handle suspending the actual PCIe root port. That should be implemented by an SoC specific driver. This is required for Guybrush to suspend/resume properly because the NVMe power is tied to the S0 power rails, so the kernel needs to place the device into D3. BUG=b:184617186 TEST=Guybrush is able to suspend/resume properly. Also see power resource get enabled / disabled. [ 56.075559] power-0416 __acpi_power_off : Power resource [RTD3] turned off [ 56.075562] device_pm-0279 device_set_power : Device [PXSX] transitioned to D3cold [ 56.075567] pci_pm_suspend_noirq: nvme 0000:02:00.0: PCI PM: Suspend power state: D3cold [ 56.075569] nvme 0000:02:00.0: pci_pm_suspend_noirq+0x0/0x413 returned 0 after 15978 usecs [ 123.464874] nvme 0000:02:00.0: calling pci_pm_resume_noirq+0x0/0x11d @ 7, parent: 0000:00:02.4 [ 123.464891] acpi_device_set_power: ACPI: \_SB_.PCI0.GP14.PXSX: Power state change: D3cold -> D0 [ 123.464982] power-0360 __acpi_power_on : Power resource [RTD3] turned on [ 123.464984] device_pm-0279 device_set_power : Device [PXSX] transitioned to D0 [ 123.465039] nvme 0000:02:00.0: pci_pm_resume_noirq+0x0/0x11d returned 0 after 158 usecs Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: I2adfc925183ff7a19ab97e89212bc87c40d552d0 --- A src/drivers/pcie/rtd3/device/Kconfig A src/drivers/pcie/rtd3/device/Makefile.inc A src/drivers/pcie/rtd3/device/chip.c A src/drivers/pcie/rtd3/device/chip.h 4 files changed, 204 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/54966/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/54966 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2adfc925183ff7a19ab97e89212bc87c40d552d0 Gerrit-Change-Number: 54966 Gerrit-PatchSet: 5 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Duncan Laurie <dlaurie(a)gmail.com> Gerrit-CC: Mario Limonciello <mario.limonciello(a)amd.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush/var/guybrush: Update GPIO configuration
by Karthik Ramasubramanian (Code Review) June 3, 2021

June 3, 2021

Attention is currently required from: Raul Rangel, Furquan Shaikh, Martin Roth, Karthik Ramasubramanian. Hello build bot (Jenkins), Raul Rangel, Martin Roth, Furquan Shaikh, Eric Peers, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55148 to look at the new patch set (#2). Change subject: mb/google/guybrush/var/guybrush: Update GPIO configuration ...................................................................... mb/google/guybrush/var/guybrush: Update GPIO configuration Some of the GPIOs are either re-purposed for different use-cases or are unused in upcoming board phase (board version 2). Update the GPIO configuration accordingly. Here are the GPIOs that are updated: GPIO Board Id 1 Board Id 2 ============================================= GPIO31 TP183 EN_SPKR GPIO69 EN_SPKR SD_AUX_REST_L GPIO70 SD_AUX_RESET_L Unused TP27 GPIO74 RAM_ID_CHAN_SEL Unused TP49 BUG=b:189327557, b:188542649, b:188542497 TEST=Build Guybrush mainboard. Change-Id: I31523b3e03d2b59577f33eae548747834cfc98aa Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/guybrush/variants/baseboard/gpio.c M src/mainboard/google/guybrush/variants/guybrush/gpio.c 2 files changed, 12 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/55148/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55148 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I31523b3e03d2b59577f33eae548747834cfc98aa Gerrit-Change-Number: 55148 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush: Override I2C3 pad configuration
by Karthik Ramasubramanian (Code Review) June 3, 2021

June 3, 2021

Attention is currently required from: Jason Glenesk, Furquan Shaikh, Martin Roth, Marshall Dawson, Felix Held. Hello build bot (Jenkins), Raul Rangel, Martin Roth, Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55149 to look at the new patch set (#2). Change subject: mb/google/guybrush: Override I2C3 pad configuration ...................................................................... mb/google/guybrush: Override I2C3 pad configuration I2C bus to Google Security Chip (GSC) should be at 1.8V level. By default, all the I2C buses are initialized to operate at 3.3 V. Override the I2C3 pad control configuration. BUG=b:188538373 TEST=Build and boot to OS in Guybrush. Ensure that the communication with GSC is fine. Change-Id: I595a64736fdac0274abffb68c5e521302275b845 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/amd/majolica/devicetree.cb M src/mainboard/google/guybrush/variants/baseboard/devicetree.cb M src/soc/amd/cezanne/chip.h M src/soc/amd/cezanne/i2c.c 4 files changed, 17 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/55149/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I595a64736fdac0274abffb68c5e521302275b845 Gerrit-Change-Number: 55149 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: lint: checkpatch: Add SUSPICIOUS_CODE_INDENT test
by Julius Werner (Code Review) June 3, 2021

June 3, 2021

Attention is currently required from: Nico Huber, Martin Roth, Felix Held. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51838 ) Change subject: lint: checkpatch: Add SUSPICIOUS_CODE_INDENT test ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: *ping* Any takers? If there are open concerns, anyone want to talk about them? -- To view, visit https://review.coreboot.org/c/coreboot/+/51838 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7bb90b56dfc7582271d2b82cb42a2c1df477054f Gerrit-Change-Number: 51838 Gerrit-PatchSet: 3 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 03 Jun 2021 21:31:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add PMC ACPI interface
by Furquan Shaikh (Code Review) June 3, 2021

June 3, 2021

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph, EricR Lai. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55172 ) Change subject: soc/intel/alderlake: Add PMC ACPI interface ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55172 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I59eae47e623587d35e394c9bff21481fcad2d6b0 Gerrit-Change-Number: 55172 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Thu, 03 Jun 2021 20:41:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS
by Sean Rhodes (Code Review) June 3, 2021

June 3, 2021

Attention is currently required from: Andy Pont, Tim Wawrzynczak, Paul Menzel, Arthur Heymans, Patrick Rudolph. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52800 ) Change subject: soc/intel: Allow enable/disable ME via CMOS ...................................................................... Patch Set 25: (1 comment) File src/soc/intel/common/block/cse/cse.c: https://review.coreboot.org/c/coreboot/+/52800/comment/33ccdf26_7bc68e07 PS20, Line 847: print_me_fw_version > > If the ME is enabled, and we want to disable it, we don't want to reset heci. It wont cover that. […] .enable seems to be too early, as disable_me() doesn't work when run there. Getting the firmware revision is something that, we at least, want to keep. It's a good sanity check. Happy to try it somewhere else if you have any suggestions? -- To view, visit https://review.coreboot.org/c/coreboot/+/52800 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I374db3b7c0ded71cdc18f27970252fec7220cc20 Gerrit-Change-Number: 52800 Gerrit-PatchSet: 25 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 03 Jun 2021 20:38:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sean Rhodes <admin(a)starlabs.systems> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add PMC ACPI interface
by Tim Wawrzynczak (Code Review) June 3, 2021

June 3, 2021

Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55172 ) Change subject: soc/intel/alderlake: Add PMC ACPI interface ...................................................................... soc/intel/alderlake: Add PMC ACPI interface This ACPI interface is required by e.g., the intel/common/pcie/rtd3 driver, which is used by some alderlake boards. BUG=b:190080798 TEST=disassemble SSDT and find \_SB.PCI0.PMC.IPCS Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: I59eae47e623587d35e394c9bff21481fcad2d6b0 --- M src/soc/intel/alderlake/pmc.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/55172/1 diff --git a/src/soc/intel/alderlake/pmc.c b/src/soc/intel/alderlake/pmc.c index 03399c3..6ee3ef1 100644 --- a/src/soc/intel/alderlake/pmc.c +++ b/src/soc/intel/alderlake/pmc.c @@ -12,6 +12,7 @@ #include <device/device.h> #include <drivers/intel/pmc_mux/chip.h> #include <intelblocks/pmc.h> +#include <intelblocks/pmc_ipc.h> #include <intelblocks/pmclib.h> #include <intelblocks/rtc.h> #include <soc/pci_devs.h> @@ -121,6 +122,10 @@ acpigen_write_mem32fixed(1, PCH_PWRM_BASE_ADDRESS, PCH_PWRM_BASE_SIZE); acpigen_write_resourcetemplate_footer(); + /* Define IPC Write Method */ + if (CONFIG(PMC_IPC_ACPI_INTERFACE)) + pmc_ipc_acpi_fill_ssdt(); + acpigen_pop_len(); /* PMC Device */ acpigen_pop_len(); /* Scope */ -- To view, visit https://review.coreboot.org/c/coreboot/+/55172 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I59eae47e623587d35e394c9bff21481fcad2d6b0 Gerrit-Change-Number: 55172 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: src/mainboard: Add Star Labs labtop series
by Tim Wawrzynczak (Code Review) June 3, 2021

June 3, 2021

Attention is currently required from: Sean Rhodes. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55128 ) Change subject: src/mainboard: Add Star Labs labtop series ...................................................................... Patch Set 14: Code-Review+2 (1 comment) Patchset: PS14: good eye as always Patrick ! -- To view, visit https://review.coreboot.org/c/coreboot/+/55128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iffa6061b0e600880b0c93746f35b1731e4841e31 Gerrit-Change-Number: 55128 Gerrit-PatchSet: 14 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Comment-Date: Thu, 03 Jun 2021 20:22:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: src/mainboard: Add Star Labs labtop series
by Patrick Georgi (Code Review) June 3, 2021

June 3, 2021

Attention is currently required from: Sean Rhodes. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55128 ) Change subject: src/mainboard: Add Star Labs labtop series ...................................................................... Patch Set 14: (1 comment) File Documentation/distributions.md: https://review.coreboot.org/c/coreboot/+/55128/comment/fc43d1c4_aa77ae73 PS13, Line 11: ### Purism > That paragraph doesn't belong in here I guess Done -- To view, visit https://review.coreboot.org/c/coreboot/+/55128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iffa6061b0e600880b0c93746f35b1731e4841e31 Gerrit-Change-Number: 55128 Gerrit-PatchSet: 14 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Comment-Date: Thu, 03 Jun 2021 20:12:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: comment

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